Commit a7cbe92c ("ARM: tegra: remove tegra EMC scaling driver")
removed the only user of TEGRA_EMC_SCALING_ENABLE. Remove its Kconfig
entry too.
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Few things were out of order:

- removed ARCH_BCM2835 duplicate
- shuffled ARCH_BCM_5301X, ARCH_U8500 and ARCH_U300 around so to keep the
  list sorted

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-by: NDomenico Andreoli <domenico.andreoli@linux.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

In commit ddb902cc (ARM: centralize common multi-platform kconfig
options), CLKSRC_OF was removed from some platforms, but not added to
ARCH_MULTIPLATFORM. Fix this.
Reported-by: NLauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

I get a build warning because spear_clocksource_init() calls
clocksource_mmio_init(), but it doesn't have an __init annotation.
Fix that.
Signed-off-by: NAlex Elder <elder@linaro.org>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

hx4700 needs the same fix as in
9705e746
"ARM: pxa: fix various compilation problems"

Fix build errors. Initial one is:
/linux/arch/arm/mach-pxa/include/mach/hx4700.h:18:32: error:
 'PXA_NR_BUILTIN_GPIO' undeclared here (not in a function)
|  #define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO

Cc: stable@vger.kernel.org # v3.13+
Signed-off-by: NAndrea Adami <andrea.adami@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

To obtain exact pixel clocks, allow the DI clock selectors to influence
the PLLs that they are derived from.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Tested-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Route the video PLL to the display interface clocks via the di_pre_sel
and di_sel muxes by default.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Tested-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Per bindings of fixed-clock, #clock-cells is a required property.  Let's
add it for those fixed rate clocks.
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

This is likely a copy-and-paste error from the
ARM GIC documentation, that has already been fixed.

address-cells should have been set to 0, as with the size
cells. As having those properties set to 0 is the
same thing as not specifying them, drop them completely.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

In case the bootloader has incorrectly configured the ALT mode of
MX6SL_PAD_ECSPI1_SS0 pad, we end up with the following probe error:

m25p80 spi0.0: found mr25h256, expected m25p32
m25p80 spi0.0: mr25h256 (32 Kbytes)

In order to avoid this issue, add an entry for MX6SL_PAD_ECSPI1_SS0 pad, so
that kernel configures the ECSPI chip select as GPIO functionality, which
results in correct SPI NOR probe.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

The 'remote-endpoint' property should point back to ipu_di1_lvds1
rather than ipu_di0_lvds0.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Since commit (655b43cc staging: imx-drm-core: Use OF graph to find
components and connections between encoder and crtcs), 'crtcs' becomes a
dead property.  Remove it.
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
Acked-by: NTim Harvey <tharvey@gateworks.com>

With the recent imx-drm device tree binding changes, we need to add IPU
DI ports and endpoints for adapting.
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
Acked-by: NLothar Waßmann <LW@KARO-electronics.de>

Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

GPIO7_12 switches the D+/D- USB lines on and off. When we use this as
VBUS regulator it means that USB device mode can never work as VBUS is
never turned on in Device mode.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Bit 6,7 are marked as reserved for the ethernet RGMII pins, so avoid
setting these bits.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Allows fror proper refcounting of the parent clocks
when enabling the clock output on CLK1/2 pads.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Reviewed-by: NMarek Vasut <marex@denx.de>
Acked-by: NRichard Zhu <r65037@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Those two properties should have been set to zero, which
is the same as not specifying them.

Having address-cells set to 1 causes OF interrupt
mapping routines to add 1 to the interrupt-cells
property and as result fail because all calculations
are off by one.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Fix bindings for STMPE touchscreen controller to match the documented
bindings and the actual bindings used by the driver.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Reviewed-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

On m53evk there are two DRAM chip selects:

CS0 at 0x70000000
CS1 at 0xb0000000

Each bank has a 512MB DRAM, giving a total of 1GB of system DRAM.

Fix the memory layout to describe the hardware appropriately.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

On mx53qsb there are two DRAM chip selects:

CS0 at 0x70000000
CS1 at 0xb0000000

Each bank has a 512MB DRAM, giving a total of 1GB of system DRAM.

Fix the memory layout to describe the hardware appropriately.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

As defined by the common PCI bindings.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The patch adds asm macros for inc_preempt_count and dec_preempt_count_ti
(which also gets the current thread_info) instead of open-coding them in
arch/arm/vfp/*.S files.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NArun KS <getarunks@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

asm/assembler.h is a better place for this macro since it is used by
asm files outside arch/arm/kernel/
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NArun KS <getarunks@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus,
pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(PJ4 and no-PJ4)
can use code.
Signed-off-by: NChao Xie <chao.xie@marvell.com>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NMatt Porter <mporter@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The patch add cpu_is_pj4 at arch/arm/include/asm/cputype.h
PJ4 has some differences with V7, for example the coprocessor.
To disinguish this kind of situation. cpu_is_pj4 is needed.
Signed-off-by: NChao Xie <chao.xie@marvell.com>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NMatt Porter <mporter@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

arm_pm_restart(), arm_pm_idle() and soft_restart() are all declared in
system_misc.h, but this file is not included in process.c.  Add this
missing include.  Found via sparse:

arch/arm/kernel/process.c:98:6: warning: symbol 'soft_restart' was not declared. Should it be static?
arch/arm/kernel/process.c:127:6: warning: symbol 'arm_pm_restart' was not declared. Should it be static?
arch/arm/kernel/process.c:134:6: warning: symbol 'arm_pm_idle' was not declared. Should it be static?
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

If the renamed symbol is defined lib/iomap.c implements ioport_map and
ioport_unmap and currently (nearly) all platforms define the port
accessor functions outb/inb and friend unconditionally.  So
HAS_IOPORT_MAP is the better name for this.

Consequently NO_IOPORT is renamed to NO_IOPORT_MAP.

The motivation for this change is to reintroduce a symbol HAS_IOPORT
that signals if outb/int et al are available.  I will address that at
least one merge window later though to keep surprises to a minimum and
catch new introductions of (HAS|NO)_IOPORT.

The changes in this commit were done using:

	$ git grep -l -E '(NO|HAS)_IOPORT' | xargs perl -p -i -e 's/\b((?:CONFIG_)?(?:NO|HAS)_IOPORT)\b/$1_MAP/'
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The mvmdio driver accesses some register of the Ethernet unit. It
therefore takes a reference and enables a clock. However, on Armada
38x, no clock specification was given in the Device Tree, which leads
the mvmdio driver to fail when being used as a module and loaded
before the mvneta driver: it tries to access a register from a
hardware unit that isn't clocked.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1395790439-21332-3-git-send-email-thomas.petazzoni@free-electrons.comAcked-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The mvmdio driver accesses some register of the Ethernet unit. It
therefore takes a reference and enables a clock. However, on Armada
370/XP, no clock specification was given in the Device Tree, which
leads the mvmdio driver to fail when being used as a module and loaded
before the mvneta driver: it tries to access a register from a
hardware unit that isn't clocked.

Cc: stable@vger.kernel.org
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1395790439-21332-2-git-send-email-thomas.petazzoni@free-electrons.comAcked-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Add vendor prefixes to compatible strings where they are missing.

Both the I2C and MTD framework ignore the prefix, so adding them has
no effect on backwards compatibility.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1395492360-1865-6-git-send-email-andrew@lunn.chSigned-off-by: NJason Cooper <jason@lakedaemon.net>

The documented vendor prefix for Atmel is 'atmel' not 'at' as used in
these .dts[i] files.

The i2c framework actually ignores the prefix, so making this change
does not cause compatibility issues.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1395492360-1865-4-git-send-email-andrew@lunn.chSigned-off-by: NJason Cooper <jason@lakedaemon.net>

Strictly speaking this call is a no-op on the platform where dcscb.c is
used since it only has architected caches.  The call was there as a hint
to people inspired by this code when writing their own backend, but the
hint might not always be correct.

For example, if a PL310 were to be used it wouldn't be safe to call
the regular outer_flush_all() as atomic instructions for locking
are involved in that case and those instructions cannot be assumed to
still be operational after v7_exit_coherency_flush() has returned.
Given no other CPUs (in the cluster) should be running at that point
then standard concurrency concerns wouldn't apply.

So let's simply kill this call for now and enhance the existing comment.
Signed-off-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

On non-LPAE ARMv6+, read-only PMD bits are defined with the combination
"PMD_SECT_APX | PMD_SECT_AP_WRITE". Adjusted the bit masks to correctly
report this.
Signed-off-by: NKees Cook <keescook@chromium.org>
Tested-by: NLaura Abbott <lauraa@codeaurora.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

When we configure CONFIG_ARM_LPAE=y, pfn << PAGE_SHIFT will
overflow if pfn >= 0x100000 in copy_oldmem_page.
So use __pfn_to_phys for converting.
Signed-off-by: NLiu Hua <sdu.liu@huawei.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Use of tracers in local_irq_disable is causes abort loops when called
with irqs disabled using a temporary stack.  Replace local_irq_disable
with raw_local_irq_disable instead to avoid tracers.
Signed-off-by: NSebastian Capella <sebastian.capella@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The patch changes fimd node status to OK.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>