- 12 6月, 2014 1 次提交
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由 Rafael J. Wysocki 提交于
After relatively recent changes in the ACPI-based PCI hotplug (ACPIPHP) code, the acpiphp_check_host_bridge() executed for PCI host bridges via acpi_pci_root_scan_dependent() doesn't do anything useful, because those bridges do not have hotplug contexts. That happens by mistake, so fix it by making acpiphp_enumerate_slots() add hotplug contexts to PCI host bridges too and modify acpiphp_remove_slots() to drop those contexts for host bridges as appropriate. Link: https://bugzilla.kernel.org/show_bug.cgi?id=76901 Fixes: 2d8b1d56 (ACPI / hotplug / PCI: Get rid of check_sub_bridges()) Reported-and-tested-by: NGavin Guo <gavin.guo@canonical.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Cc: 3.15+ <stable@vger.kernel.org> # 3.15+ Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 31 5月, 2014 6 次提交
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由 Will Deacon 提交于
Add support for a generic PCI host controller, such as a firmware-initialised device with static windows or an emulation by something such as kvmtool. The controller itself has no configuration registers and has its address spaces described entirely by the device-tree (using the bindings from ePAPR). Both CAM and ECAM are supported for Config Space accesses. Add corresponding documentation for the DT binding. [bhelgaas: currently uses the ARM-specific pci_common_init_dev() interface] Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NLiviu Dudau <liviu.dudau@arm.com>
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由 Lucas Stach 提交于
This patch adds support for Message Signaled Interrupts in the imx6-pcie driver. Signed-off-by: NHarro Haan <hrhaan@gmail.com> Signed-off-by: NJuergen Beisert <jbe@pengutronix.de> Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRichard Zhu <r65037@freescale.com>
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由 Lucas Stach 提交于
On i.MX6 the host controller MSI IRQ is shared with PCI legacy INTD. Make sure we don't bail too early from the IRQ handler. The issue is fairly theoretical as it would require a system setup with a PCIe switch where one connected device is using legacy INTD and another one using MSI, but better fix it now. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NRichard Zhu <r65037@freescale.com>
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由 Lucas Stach 提交于
They are dropped with the new binding. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRichard Zhu <r65037@freescale.com>
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由 Lucas Stach 提交于
We don't need this anymore. The IRQs are now properly mapped through the DT. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRichard Zhu <r65037@freescale.com>
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由 Lucas Stach 提交于
As defined in the new binding. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRichard Zhu <r65037@freescale.com>
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- 30 5月, 2014 3 次提交
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由 Sachin Kamat 提交于
imx6_add_pcie_port() is called only from from imx6_pcie_probe() which is annotated with __init. Thus it makes sense to annotate imx6_add_pcie_port() with __init to avoid section mismatch warnings. [bhelgaas: changelog] Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Sean Cross <xobs@kosagi.com>
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由 Yijing Wang 提交于
pci_bus_add_device() always returns 0, so there's no point in returning anything at all. Make it a void function and remove the tests of the return value from the callers. [bhelgaas: changelog, remove unused "err" from i82875p_setup_overfl_dev()] Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Sachin Kamat 提交于
add_pcie_port() is called only from exynos_pcie_probe(), which is annotated with __init. Thus it makes sense to annotate add_pcie_port() with __init to avoid the following section mismatch warning: WARNING: drivers/pci/built-in.o(.text.unlikely+0xf8): Section mismatch in reference from the function add_pcie_port() to the function .init.text:dw_pcie_host_init() The function add_pcie_port() references the function __init dw_pcie_host_init(). This is often because add_pcie_port lacks a __init annotation or the annotation of dw_pcie_host_init is wrong. [bhelgaas: changelog] Reported-by: Nkbuild test robot <fengguang.wu@intel.com> Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJingoo Han <jg1.han@samsung.com>
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- 29 5月, 2014 1 次提交
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由 Alex Williamson 提交于
The driver_override field allows us to specify the driver for a device rather than relying on the driver to provide a positive match of the device. This shortcuts the existing process of looking up the vendor and device ID, adding them to the driver new_id, binding the device, then removing the ID, but it also provides a couple advantages. First, the above existing process allows the driver to bind to any device matching the new_id for the window where it's enabled. This is often not desired, such as the case of trying to bind a single device to a meta driver like pci-stub or vfio-pci. Using driver_override we can do this deterministically using: echo pci-stub > /sys/bus/pci/devices/0000:03:00.0/driver_override echo 0000:03:00.0 > /sys/bus/pci/devices/0000:03:00.0/driver/unbind echo 0000:03:00.0 > /sys/bus/pci/drivers_probe Previously we could not invoke drivers_probe after adding a device to new_id for a driver as we get non-deterministic behavior whether the driver we intend or the standard driver will claim the device. Now it becomes a deterministic process, only the driver matching driver_override will probe the device. To return the device to the standard driver, we simply clear the driver_override and reprobe the device: echo > /sys/bus/pci/devices/0000:03:00.0/driver_override echo 0000:03:00.0 > /sys/bus/pci/devices/0000:03:00.0/driver/unbind echo 0000:03:00.0 > /sys/bus/pci/drivers_probe Another advantage to this approach is that we can specify a driver override to force a specific binding or prevent any binding. For instance when an IOMMU group is exposed to userspace through VFIO we require that all devices within that group are owned by VFIO. However, devices can be hot-added into an IOMMU group, in which case we want to prevent the device from binding to any driver (override driver = "none") or perhaps have it automatically bind to vfio-pci. With driver_override it's a simple matter for this field to be set internally when the device is first discovered to prevent driver matches. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 28 5月, 2014 16 次提交
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由 Ben Dooks 提交于
Add device tree probing support to the 'pci-rcar-gen2' driver. [Sergei: numerous fixes/cleanups/additions] [bhelgaas: whitespace fix] Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Rickard Strandqvist 提交于
There is otherwise a risk of a null pointer dereference. Found by cppcheck, a static code analysis program. Signed-off-by: NRickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Phil Edworthy 提交于
Add MSI support to the R-Car PCIe driver. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Phil Edworthy 提交于
This PCIe Host driver currently does not support MSI, so cards fall back to INTx interrupts. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Gavin Shan 提交于
The PCI user-space config accessors pci_user_{read,write}_config_*() return negative error numbers, which were introduced by commit 34e32072 ("PCI: handle positive error codes"). That patch converted all positive error numbers from platform-specific PCI config accessors to -EINVAL, which means the callers don't know anything about the specific cause of the failure. The patch fixes the issue by converting the positive PCIBIOS_* error values to generic negative error numbers with pcibios_err_to_errno(). [bhelgaas: changelog] Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NGreg Thelen <gthelen@google.com>
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由 Jingoo Han 提交于
The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Hanjun Guo 提交于
pcibios_penalize_isa_irq() is only implemented by x86 now, and legacy ISA is not used by some architectures. Make pcibios_penalize_isa_irq() a __weak function to simplify the code. This removes the need for new platforms to add stub implementations of pcibios_penalize_isa_irq(). [bhelgaas: changelog, comments] Signed-off-by: NHanjun Guo <hanjun.guo@linaro.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Alex Williamson 提交于
When a PCI-to-PCIe bridge is stacked on a PCIe-to-PCI bridge, we can have PCIe endpoints masked by a conventional PCI bus. This makes the extended config space of the PCIe endpoint inaccessible. The PCIe-to-PCI bridge is supposed to handle any type 1 configuration transactions where the extended config offset bits are non-zero as an Unsupported Request rather than forward it to the secondary interface. As noted here, there are a couple known offenders to this rule. These bridges drop the extended offset bits, resulting in the conventional config space being aliased many times across the extended config space. For Intel NICs, this alias often seems to expose a bogus SR-IOV cap. Stacking bridges may seem like an uncommon scenario, but note that any conventional PCI slot in a modern PC is already the secondary interface of an onboard PCIe-to-PCI bridge. The user need only add a PCI-to-PCIe adapter and PCIe device to encounter this problem. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
Use pci_is_bridge() to simplify code. No functional change. Requires: 326c1cda PCI: Rename pci_is_bridge() to pci_has_subordinate() Requires: 1c86438c PCI: Add new pci_is_bridge() interface Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
Use pci_is_bridge() to simplify code. No functional change. Requires: 326c1cda PCI: Rename pci_is_bridge() to pci_has_subordinate() Requires: 1c86438c PCI: Add new pci_is_bridge() interface Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
Use pci_is_bridge() to simplify code. No functional change. Requires: 326c1cda PCI: Rename pci_is_bridge() to pci_has_subordinate() Requires: 1c86438c PCI: Add new pci_is_bridge() interface Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
Use pci_is_bridge() to simplify code. No functional change. Requires: 326c1cda PCI: Rename pci_is_bridge() to pci_has_subordinate() Requires: 1c86438c PCI: Add new pci_is_bridge() interface Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
Use pci_is_bridge() to simplify code. No functional change. Requires: 326c1cda PCI: Rename pci_is_bridge() to pci_has_subordinate() Requires: 1c86438c PCI: Add new pci_is_bridge() interface Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Yijing Wang 提交于
Use pci_is_bridge() to simplify code. No functional change. Requires: 326c1cda PCI: Rename pci_is_bridge() to pci_has_subordinate() Requires: 1c86438c PCI: Add new pci_is_bridge() interface Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
Previously, pci_is_bridge() returned true only when a subordinate bus existed. Rename pci_is_bridge() to pci_has_subordinate() to better indicate what we're checking. No functional change. [bhelgaas: changelog] Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Keith Busch 提交于
Notify a PCI device driver when its device's access is about to be disabled for an impending reset attempt, then after the attempt completes and device access is restored. The notification is via the pci_error_handlers interface. Signed-off-by: NKeith Busch <keith.busch@intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 24 5月, 2014 11 次提交
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由 Bjorn Helgaas 提交于
Add comments in the code to match the allocation strategy of 7c671426dfc3 ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources"). No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
If an allocation succeeds, we can return success immediately. Then we don't have to test for success in the subsequent code. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
pbus_size_mem() previously returned 0 for failure and 1 for success. Change it to return -ENOSPC for failure and 0 for success. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yinghai Lu 提交于
This patch changes the way we handle 64-bit prefetchable bridge windows to make it more likely that we can assign space to all devices. Previously we put all prefetchable resources in the prefetchable bridge window. If any of those resources was 32-bit only, we restricted the window to be below 4GB. After this patch, we only put 64-bit prefetchable resources in a 64-bit prefetchable window. We put all 32-bit prefetchable resources in the non-prefetchable window, even if there are no 64-bit prefetchable resources. With the previous approach, if there was a 32-bit prefetchable resource behind a bridge, we forced the bridge's prefetchable window below 4GB, which meant that even if there was plenty of space above 4GB available, we couldn't use it, and assignment of large 64-bit resources could fail, as in the bugzilla below. The new strategy is: 1) If the prefetchable window is 64 bits wide, we put only 64-bit prefetchable resources in it. Any 32-bit prefetchable resources go in the non-prefetchable window. 2) If the prefetchable window is 32 bits wide, we put both 32- and 64-bit prefetchable resources in it. 3) If there is no prefetchable window, all MMIO resources go in the non-prefetchable window. This reduces performance for 32-bit prefetchable resources below a bridge with a 64-bit prefetchable window. We previously assigned prefetchable space, but now we'll assign non-prefetchable space. This is the case even if there are no 64-bit prefetchable resources, or if they would all fit below 4GB. In those cases, the old strategy would work and would have better performance. [bhelgaas: write changelog, add bugzilla link, fold in mem64_mask removal] Link: https://bugzilla.kernel.org/show_bug.cgi?id=74151Tested-by: NGuo Chao <yan@linux.vnet.ibm.com> Tested-by: NWei Yang <weiyang@linux.vnet.ibm.com> Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Alan 提交于
This is needed for some of the Xeon Phi type systems. [bhelgaas: added Nikhil, use ARRAY_SIZE() to connect with decl, folded in Kevin's "order < 0" fix to ARRAY_SIZE() usage] Signed-off-by: NNikhil P Rao <nikhil.rao@intel.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
For a subtractive decode bridge, we previously added and printed all resources of the primary bus, even if they were not valid. In the example below, the bridge 00:1c.3 has no windows enabled, so there are no valid resources on bus 02. But since 02:00.0 is subtractive decode bridge, we add and print all those invalid resources, which don't really make sense: pci 0000:00:1c.3: PCI bridge to [bus 02-03] pci 0000:02:00.0: PCI bridge to [bus 03] (subtractive decode) pci 0000:02:00.0: bridge window [??? 0x00000000 flags 0x0] (subtractive decode) Add and print the subtractively-decoded resources only if they are valid. There's an example in the dmesg log attached to the bugzilla below (but this patch doesn't fix the bug reported there). Link: https://bugzilla.kernel.org/show_bug.cgi?id=73141Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
If the console is a PCI device, and we try to print to it while its decoding is disabled, the system will hang. This particular printk hasn't caused a problem yet, but it could, so this fixes it. See also 0ff9514b ("PCI: Don't print anything while decoding is disabled"). Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
If a BAR is above 4GB and our dma_addr_t is too small, don't clear the BAR to zero: that doesn't disable the BAR, and it makes it more likely that the BAR will conflict with things if we turn on the memory enable bit (as we will at "out:" if the device was already enabled at the handoff). We should also print the BAR info and its original size so we can follow the process when we try to assign space to it. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
If dma_addr_t is too small to represent the BAR value, pcibios_bus_to_resource() will fail, so just remember the BAR size directly in the resource. The resource is already marked UNSET, so we know the address isn't valid anyway. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
We can only handle BARs above 4GB if dma_addr_t (not resource_size_t) is 64 bits wide. If we have a 64-bit resource_size_t and a 32-bit dma_addr_t, we can't deal with BARs above 4GB. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
We can only handle BARs larger than 4GB if both dma_addr_t and resource_size_t are 64 bits wide. If dma_addr_t is 32 bits, we can't represent all the bus addresses, and if resource_size_t is 32 bits, we can't represent all the CPU addresses. Previously we cleared res->flags (at "fail:") for resources that were too large. That means we think the BAR doesn't exist at all, which in turn means that we could enable the device even though we can't keep track of where the BAR is and we can't make sure it doesn't overlap something else. This preserves the type flags (MEM/IO) so we can keep from enabling the device. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 23 5月, 2014 1 次提交
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由 Sebastian Ott 提交于
Remove pcibios_add_platform_entries(). Architecture-specific attributes can be achieved by setting pdev->dev.groups. Link: https://lkml.kernel.org/r/alpine.LFD.2.11.1404141101500.1529@denkbrettSigned-off-by: NSebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 21 5月, 2014 1 次提交
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由 Alex Williamson 提交于
INTx masking does not work on this device. To see this, configure the network device UP on an active network, note that the interrupt count continues to increment for the device in /proc/interrupts. Use setpci to set the PCI_COMMAND_INTX_DISABLE bit in the PCI_COMMAND register. As expected, the interrupt count ceases to increment. However, reading the PCI_STATUS_INTERRUPT bit of the PCI_STATUS register does not indicate that interrupts are pending and clearing PCI_COMMAND_INTX_DISABLE in the PCI_COMMAND register does not allow the device to continue operation. This does not affect operation of the host r8169 driver, but it does prevent the device from being functional when assigned to a VM, such as with QEMU and VFIO. The guest driver successfully probes the device, but there is no traffic. Mark INTx masking as broken, allowing the more restrictive APIC masking to be used instead. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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