1. 06 8月, 2011 1 次提交
  2. 27 7月, 2011 1 次提交
  3. 13 7月, 2011 3 次提交
  4. 11 7月, 2011 2 次提交
    • N
      x86, ioapic: Also print Dest field · 7fece832
      Naga Chumbalkar 提交于
      The code in setup_ioapic_irq() determines the Destination Field,
      so why not also include it in the debug printk output that gets
      displayed when the boot parameter "apic=debug" is used.
      
      Before the change, "dmesg" will show:
      
       IOAPIC[0]: Set routing entry (8-1 -> 0x31 -> IRQ 1 Mode:0 Active:0)
       IOAPIC[0]: Set routing entry (8-2 -> 0x30 -> IRQ 0 Mode:0 Active:0)
       IOAPIC[0]: Set routing entry (8-3 -> 0x33 -> IRQ 3 Mode:0 Active:0) ...
      
      After the change, you will see:
      
       IOAPIC[0]: Set routing entry (8-1 -> 0x31 -> IRQ 1 Mode:0 Active:0 Dest:0)
       IOAPIC[0]: Set routing entry (8-2 -> 0x30 -> IRQ 0 Mode:0 Active:0 Dest:0)
       IOAPIC[0]: Set routing entry (8-3 -> 0x33 -> IRQ 3 Mode:0 Active:0 Dest:0) ...
      Signed-off-by: NNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Link: http://lkml.kernel.org/r/20110708184603.2734.91071.sendpatchset@nchumbalkar.americas.cpqcorp.netSigned-off-by: NIngo Molnar <mingo@elte.hu>
      7fece832
    • N
      x86, ioapic: Format clean up for IOAPIC output · bd6a46e0
      Naga Chumbalkar 提交于
      When IOAPIC data is displayed in "dmesg" with the help of the
      boot parameter "apic=debug" certain values are not formatted
      correctly wrt their size.
      
      In the "dmesg" snippet below, note that the output for "max
      redirection entries", and "IO APIC version" which are each
      defined to be just 8-bits long are displayed as 2 bytes in
      length. Similarly, "Dst" under the "IRQ redirection table"
      should only be 8-bits long.
      
      IO APIC #0......
      ...
      ...
      .... register #01: 00170020
      .......     : max redirection entries: 0017
      .......     : PRQ implemented: 0
      .......     : IO APIC version: 0020
      ...
      ...
      .... IRQ redirection table:
       NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
       00 000 1    0    0   0   0    0    0    00
       01 000 0    0    0   0   0    0    0    31
       02 000 0    0    0   0   0    0    0    30
       03 000 1    0    0   0   0    0    0    33
      ...
      ...
      
      Do some formatting clean up, so you will see output like below:
      
      IO APIC #0......
      ...
      ...
      .... register #01: 00170020
      .......     : max redirection entries: 17
      .......     : PRQ implemented: 0
      .......     : IO APIC version: 20
      ...
      ...
      .... IRQ redirection table:
       NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
       00 00  1    0    0   0   0    0    0    00
       01 00  0    0    0   0   0    0    0    31
       02 00  0    0    0   0   0    0    0    30
       03 00  1    0    0   0   0    0    0    33
      ...
      ...
      Signed-off-by: NNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Link: http://lkml.kernel.org/r/20110708184557.2734.61830.sendpatchset@nchumbalkar.americas.cpqcorp.netSigned-off-by: NIngo Molnar <mingo@elte.hu>
      bd6a46e0
  5. 09 7月, 2011 1 次提交
    • V
      x86, boot: Wait for boot cpu to show up if nr_cpus limit is about to hit · 14cb6dcf
      Vivek Goyal 提交于
      nr_cpus allows one to specify number of possible cpus in the system.
      Current assumption seems to be that first cpu to show up is boot cpu
      and this assumption will be broken in kdump scenario where we can be
      booting on a non boot cpu with nr_cpus=1.
      
      It might happen that first cpu we parse is not the cpu we boot on and
      later we ignore boot cpu. Though code later seems to recognize this
      anomaly and forcibly sets boot cpu in physical cpu map with following
      warning.
      
      if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
              printk(KERN_WARNING
                      "weird, boot CPU (#%d) not listed by the BIOS.\n",
                      hard_smp_processor_id());
      
              physid_set(hard_smp_processor_id(), phys_cpu_present_map);
      }
      
      This patch waits for boot cpu to show up and starts ignoring the cpus
      once we have hit (nr_cpus - 1) number of cpus. So effectively we are
      reserving one slot out of nr_cpus for boot cpu explicitly.
      Signed-off-by: NVivek Goyal <vgoyal@redhat.com>
      Acked-by: NYinghai Lu <yinghai@kernel.org>
      Link: http://lkml.kernel.org/r/20110708171926.GF2930@redhat.comSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      14cb6dcf
  6. 08 7月, 2011 1 次提交
    • N
      x86: print APIC data a little later during boot · ded1f6ab
      Naga Chumbalkar 提交于
      To view IOAPIC data you could boot with "apic=debug".
      
      When booting in such a way then the kernel will dump the
      IO-APIC's registers, for example:
      
      NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
       00 000 1    0    0   0   0    0    0    00
       01 000 0    0    0   0   0    0    0    31
       02 000 0    0    0   0   0    0    0    30
       03 000 0    0    0   0   0    0    0    33
       04 000 0    0    0   0   0    0    0    34
       05 000 0    0    0   0   0    0    0    35
       06 000 0    0    0   0   0    0    0    36
       07 000 0    0    0   0   0    0    0    37
       08 000 0    0    0   0   0    0    0    38
       09 000 0    1    0   0   0    0    0    39
       0a 000 0    0    0   0   0    0    0    3A
       0b 000 0    0    0   0   0    0    0    3B
       0c 000 0    0    0   0   0    0    0    3C
       0d 000 0    0    0   0   0    0    0    3D
       0e 000 0    0    0   0   0    0    0    3E
       0f 000 0    0    0   0   0    0    0    3F
       10 000 1    0    0   0   0    0    0    00
       11 000 1    0    0   0   0    0    0    00
       12 000 1    0    0   0   0    0    0    00
       13 000 1    0    0   0   0    0    0    00
       14 000 1    0    0   0   0    0    0    00
       15 000 1    0    0   0   0    0    0    00
       16 000 1    0    0   0   0    0    0    00
       17 000 1    0    0   0   0    0    0    00
      
      Delaying the call to print_ICs() gives better results:
      
      NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
       00 000 1    0    0   0   0    0    0    00
       01 000 0    0    0   0   0    0    0    31
       02 000 0    0    0   0   0    0    0    30
       03 000 1    0    0   0   0    0    0    33
       04 000 1    0    0   0   0    0    0    34
       05 000 1    0    0   0   0    0    0    35
       06 000 1    0    0   0   0    0    0    36
       07 000 1    0    0   0   0    0    0    37
       08 000 0    0    0   0   0    0    0    38
       09 000 0    1    0   0   0    0    0    39
       0a 000 1    0    0   0   0    0    0    3A
       0b 000 1    0    0   0   0    0    0    3B
       0c 000 0    0    0   0   0    0    0    3C
       0d 000 1    0    0   0   0    0    0    3D
       0e 000 1    0    0   0   0    0    0    3E
       0f 000 1    0    0   0   0    0    0    3F
       10 000 1    1    0   1   0    0    0    29
       11 000 1    0    0   0   0    0    0    00
       12 000 1    0    0   0   0    0    0    00
       13 000 1    0    0   0   0    0    0    00
       14 000 0    1    0   1   0    0    0    51
       15 000 1    0    0   0   0    0    0    00
       16 000 0    1    0   1   0    0    0    61
       17 000 0    1    0   1   0    0    0    59
      
      Notice that the entries beyond interrupt input signal 0x0f also
      get populated and arent just the hw-initialization default of
      all zeroes.
      Signed-off-by: NNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Link: http://lkml.kernel.org/r/20110708083555.2598.42216.sendpatchset@nchumbalkar.americas.hpqcorp.netSigned-off-by: NIngo Molnar <mingo@elte.hu>
      ded1f6ab
  7. 14 6月, 2011 1 次提交
  8. 09 6月, 2011 2 次提交
  9. 30 5月, 2011 1 次提交
  10. 25 5月, 2011 2 次提交
  11. 24 5月, 2011 1 次提交
  12. 23 5月, 2011 1 次提交
  13. 22 5月, 2011 4 次提交
  14. 20 5月, 2011 14 次提交
  15. 10 5月, 2011 1 次提交
    • J
      x86, UV: Fix NMI handler for UV platforms · 1d44e828
      Jack Steiner 提交于
      This fixes problems seen on UV systems handling NMIs from the
      node controller.
      
      I isolated the "dazed..." messages that I saw earlier to a bug in
      the BMC on our platform. It was sending NMIs w/o properly setting
      a register that indicated the source of NMI.
      
      So rather than _assuming_ any unhandled NMI came from the UV system
      maintenance console (SMC), add a check to verify that the SMC actually
      sent the NMI.
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      Cc: gorcunov@gmail.com
      Cc: dzickus@redhat.com
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1d44e828
  16. 02 5月, 2011 4 次提交
    • T
      x86-32, NUMA: Update numaq to use new NUMA init protocol · 299a180a
      Tejun Heo 提交于
      Update numaq such that it calls numa_add_memblk() and sets
      numa_nodes_parsed instead of directly diddling with NUMA states.  The
      original get_memcfg_numaq() is renamed to numaq_numa_init() and new
      get_memcfg_numaq() is created in numa_32.c.
      
      The shim numa_add_memblk() implementation handles node_start/end_pfn[]
      and node_set_online() for nodes with memory.  The new
      get_memcfg_numaq() exactly the same with get_memcfg_from_srat() other
      than calling the numaq init function.  Things get_memcfgs_numaq() do
      are not strictly necessary for numaq but added for consistency and to
      help unifying NUMA init handling.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: David Rientjes <rientjes@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      299a180a
    • T
      x86-32, NUMA: use sparse_memory_present_with_active_regions() · 797390d8
      Tejun Heo 提交于
      Instead of calling memory_present() for each region from NUMA init,
      call sparse_memory_present_with_active_regions() from paging_init()
      similarly to x86-64.
      
      For flat and numaq, this results in exactly the same memory_present()
      calls.  For srat, if there are multiple memory chunks for a node,
      after this change, memory_present() will be called separately for each
      chunk instead of being called once to encompass the whole range, which
      doesn't cause any harm and actually is the better behavior.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: David Rientjes <rientjes@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      797390d8
    • T
      x86-32, NUMA: Make apic->x86_32_numa_cpu_node() optional · 84914ed0
      Tejun Heo 提交于
      NUMAQ is the only meaningful user of this callback and
      setup_local_APIC() the only callsite.  Stop torturing everyone else by
      making the callback optional and removing all the boilerplate
      implementations and assignments.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: David Rientjes <rientjes@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      84914ed0
    • T
      x86-32, NUMA: Automatically set apicid -> node in setup_local_APIC() · c4b90c11
      Tejun Heo 提交于
      Some x86-32 NUMA implementations (NUMAQ) don't initialize apicid ->
      node mapping using set_apicid_to_node() during NUMA init but implement
      custom apic->x86_32_numa_cpu_node() instead.
      
      This patch automatically initializes the default apic -> node mapping
      table from apic->x86_32_numa_cpu_node() from setup_local_APIC() such
      that the mapping table is in sync with the actual mapping.
      
      As the table isn't used by custom implementations, this doesn't make
      any difference at this point.  This is in preparation of unifying
      numa_cpu_node() between x86-32 and 64.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: David Rientjes <rientjes@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      c4b90c11