Various boot loaders go to various extents to thwart the initrd detection
logic (mostly on account of not being able to be bothered with adhering
to the established boot ABI), so we make the detection logic a bit more
robust. This makes it possible to work around the SDK7786's firmware's
attempts to thwart compressed image booting. Victory is mine.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

arch/sh/kernel/smp.c:164: error: conflicting types for 'native_cpu_disable'
/home/matt/src/kernels/sh-2.6/arch/sh/include/asm/smp.h:48: error: previous declaration of 'native_cpu_disable' was here
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add CONFIG_VIRTUALIZATION to the SH architecture
and include the virtio code there. Used to enable
the virtio drivers under QEMU.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The UP dependency was inherited from ARM, which seems to have run in to
it due to the stacktrace code not being available for SMP in certain
cases, as we don't have this particular limitation there is no specific
need to block on the SMP dependency.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This wires up CPU hotplug for SH-X3 SMP CPUs. Presently only secondary
cores can be hotplugged given that the boot CPU has to contend with the
broadcast timer. When real local timers are implemented this restriction
can be lifted.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds preliminary support for CPU hotplug for SH SMP systems.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This provides a cache of the secondary CPUs idle loop for the cases where
hotplug simply enters a low power state instead of resetting or powering
off the core.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

smp_store_cpu_info() is presently flagged as __init, but is called by
start_secondary() which is __cpuinit, fix it up.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This provides percpu CPU states in preparation for CPU hotplug and the
associated notifier chains.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This iterates over the maximum number of CPUs we plan to support and
makes sure they're all set in the present CPU map.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This converts from cpu_set() for the online map to set_cpu_online().
The two online map modifiers were the last remaining manual map
manipulation bits, with this in place everything now goes through
cpumask.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

With the platform ops migration, the definitions still need to be
included in the CONFIG_SMP=n case, so make the asm/smp.h include
explicit.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

When registering CPUs in the topology initialization ensure that all of
the present CPUs are flagged as hotpluggable.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Now that compressed image loading is possible for sdk7786, drop the
vmlinux.bin default image target and update the defconfig accordingly.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch updates the sh7751 pci code to handle io ports
correctly. The code is based on the sh7788x implementation.

Tested on a R2D-1 board with CONFIG_8139TOO_PIO=y.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Update the R2D defconfigs to bump up the maximum
number of SCIF ports on the system.

Fixes a broken serial console regression added
by cd5f1076.
Reported-by: NShin-ichiro KAWASAKI <kawasaki@juno.dti.ne.jp>
Signed-off-by: NMagnus Damm <damm@opensource.se>
Tested-by: NAlexandre Courbot <alex@dcl.info.waseda.ac.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

CHCR_TS_HIGH_SHIFT is defined as a shift of TS high bits in CHCR register,
relative to low bits. The TS_INDEX2VAL() macro has to take this into account.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Lists of DMA channels and slaves are not changed, make them constant. Besides,
SH7724 channel and slave configuration of both DMA controllers is identical,
remove the extra copy of the configuration data.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

As explained in commit 1c0fe6e3, we want to call the architecture independent
oom killer when getting an unexplained OOM from handle_mm_fault, rather than
simply killing current.

Cc: linux-sh@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Signed-off-by: NNick Piggin <npiggin@suse.de>
Acked-by: NDavid Rientjes <rientjes@google.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Previously we were masking the PMB DATA array values with the value of
__MEMORY_START | PMB_V, which misses some PFN bits off the mask.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

There is a logic error in pmb_merge() that means we will incorrectly try
to merge two 128MB PMB mappings into one mapping. However, 256MB isn't a
valid PMB map size and pmb_merge() will actually drop the second 128MB
mapping.

This patch allows my SDK7786 board to boot when configured with
CONFIG_MEMORY_SIZE=0x10000000.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

We can't necessarily use the P1SEG region to access RAM when running in
32BIT mode, so use CONFIG_MEMORY_START as the base address.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

When running in 32BIT mode the P1SEG region doesn't necessarily provide
a window onto RAM (it depends how the bootloader setup the PMB). The
correct location to place the decompressed kernel is the physical
address of _text.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

This patch defines ___pa and ___va which return the physical and virtual
address of an address, respectively. These macros are suitable for
calling from assembly because they don't include the C casts required by
__pa and __va.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

This cribs the MIPS plat_smp_ops approach for wrapping up the platform
ops. This will allow for mixing and matching different ops on the same
platform in the future.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

All of the regular CPU init path needs to be __cpuinit annotated for CPU
hotplug.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This does a detect_cpu_and_cache_system() -> cpu_probe() rename, tidies
up the unused return value, and stuffs it under __cpuinit in preparation
for CPU hotplug.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This follows the x86 change and kills off the unthrottle stub. As the x86
change killed off the generic callback it isn't used anymore anyways.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This zeroes out the number of cache aliases in the cache info descriptors
when hardware alias avoidance is enabled. This cuts down on the amount of
flushing taken care of by common code, and also permits coherency control
to be disabled for the single CPU and 4k page size case.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Previously the struct module definition was pulled in from other headers,
but we want the reference to be explicit. Fixes up randconfig build
issues.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This enables support for the hardware synonym avoidance handling on SH-X3
CPUs for the case where dcache aliases are possible. icache handling is
retained, but we flip on broadcasting of the block invalidations due to
the lack of coherency otherwise on SMP.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This wires up power-off support for the SDK7786 board.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This implements support for hardware-managed IRQ balancing as implemented
by SH-X3 cores (presently only hooked up for SH7786, but can probably be
carried over to other SH-X3 cores, too).

CPUs need to specify their distribution register along with the mask
definitions, as these follow the same format. Peripheral IRQs that don't
opt out of balancing will be automatically distributed at the whim of the
hardware block, while each CPU needs to verify whether it is handling the
IRQ or not, especially before clearing the mask.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Make sure that the timer IRQs and IPIs aren't enabled for IRQ balancing.
IPIs are disabled as a result of being percpu while the timers simply
disable balancing outright.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds support for hardware-assisted userspace irq masking for
special priority levels. Due to the SR.IMASK interactivity, only some
platforms implement this in hardware (including but not limited to
SH-4A interrupt controllers, and ARM-based SH-Mobile CPUs). Each CPU
needs to wire this up on its own, for now only SH7786 is wired up as an
example.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Hook up DMAC0 on SH7786.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Presently address translation is default-enabled regardless of whether
CONFIG_MMU is set or not in the SH-4 case, this fixes it up, and also
makes the control init word a bit more readable in the process.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

While the MMUCR.URB and ITLB/UTLB differentiation works fine for all SH-4
and later TLBs, these features are absent on SH-3. This splits out
local_flush_tlb_all() in to SH-4 and PTEAEX copies while restoring the
old SH-3 one, subsequently fixing up the build.

This will probably want some further reordering and tidying in the
future, but that's out of scope at present.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This is needed with some of the tracing code built as modules, so provide
the export.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>