1. 10 9月, 2012 11 次提交
  2. 09 3月, 2012 8 次提交
    • G
      powerpc/eeh: pseries platform config space access in EEH · 3780444c
      Gavin Shan 提交于
      With the original EEH implementation, the access to config space of
      the corresponding PCI device is done by RTAS sensitive function. That
      depends on pci_dn heavily. That would limit EEH extension to other
      platforms like powernv because other platforms might have different
      ways to access PCI config space.
      
      The patch splits those functions used to access PCI config space
      and implement them in platform related EEH component. It would be
      helpful to support EEH on multiple platforms simutaneously in future.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      3780444c
    • G
      powerpc/eeh: Introduce EEH device · eb740b5f
      Gavin Shan 提交于
      Original EEH implementation depends on struct pci_dn heavily. However,
      EEH shouldn't depend on that actually because EEH needn't share much
      information with other PCI components. That's to say, EEH should have
      worked independently.
      
      The patch introduces struct eeh_dev so that EEH core components needn't
      be working based on struct pci_dn in future. Also, struct pci_dn, struct
      eeh_dev instances are created in dynamic fasion and the binding with EEH
      device, OF node, PCI device is implemented as well.
      
      The EEH devices are created after PHBs are detected and initialized, but
      PCI emunation hasn't started yet. Apart from that, PHB might be created
      dynamically through DLPAR component and the EEH devices should be creatd
      as well. Another case might be OF node is created dynamically by DR
      (Dynamic Reconfiguration), which has been defined by PAPR. For those OF
      nodes created by DR, EEH devices should be also created accordingly. The
      binding between EEH device and OF node is done while the EEH device is
      initially created.
      
      The binding between EEH device and PCI device should be done after PCI
      emunation is done. Besides, PCI hotplug also needs the binding so that
      the EEH devices could be traced from the newly coming PCI buses or PCI
      devices.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      eb740b5f
    • G
      powerpc/eeh: pseries platform EEH error log retrieval · 8d633291
      Gavin Shan 提交于
      On RTAS compliant pSeries platform, one dedicated RTAS call has
      been introduced to retrieve EEH temporary or permanent error log.
      
      The patch implements the function of retriving EEH error log through
      RTAS call. Besides, it has been abstracted by struct eeh_ops::get_log
      so that EEH core components could support multiple platforms in future.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8d633291
    • G
      powerpc/eeh: pseries platform EEH reset PE · 2652481f
      Gavin Shan 提交于
      On RTAS compliant pSeries platform, there is a dedicated RTAS call
      (ibm,set-slot-reset) to reset the specified PE. Furthermore, two
      types of resets are supported: hot and fundamental. the type of
      reset is to be used actually depends on the included PCI device's
      requirements.
      
      The patch implements resetting PE on pSeries platform through RTAS
      call. Besides, it has been abstracted through struct eeh_ops::reset
      so that EEH core components could support multiple platforms in future.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2652481f
    • G
      powerpc/eeh: pseries platform PE state retrieval · eb594a47
      Gavin Shan 提交于
      On pSeries platform, there're 2 dedicated RTAS calls introduced to
      retrieve the corresponding PE's state: ibm,read-slot-reset-state and
      ibm,read-slot-reset-state2.
      
      The patch implements the retrieval of PE's state according to the
      given PE address. Besides, the implementation has been abstracted by
      struct eeh_ops::get_state so that EEH core components could support
      multiple platforms in future.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      eb594a47
    • G
      powerpc/eeh: pseries platform EEH operations · 8fb8f709
      Gavin Shan 提交于
      There're 4 EEH operations that are covered by the dedicated RTAS
      call <ibm,set-eeh-option>: enable or disable EEH, enable MMIO and
      enable DMA. At early stage of system boot, the EEH would be tried
      to enable on PCI device related device node. MMIO and DMA for
      particular PE should be enabled when doing recovery on EEH errors
      so that the PE could function properly again.
      
      The patch implements it and abstract that through struct
      eeh_ops::set_eeh. It would be help for EEH to support multiple
      platforms in future.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8fb8f709
    • G
      powerpc/eeh: Platform dependent EEH operations · aa1e6374
      Gavin Shan 提交于
      EEH has been implemented on RTAS-compliant pSeries platform.
      That's to say, the EEH operations will be implemented through RTAS
      calls eventually. The situation limited feasible extension on EEH.
      In order to support EEH on multiple platforms like pseries and powernv
      simutaneously. We have to split the platform dependent EEH options
      up out of current implementation.
      
      The patch addresses supporting EEH on multiple platforms. The pseries
      platform dependent EEH operations will be abstracted by struct eeh_ops.
      EEH core components will be built based on the registered EEH operations.
      With the mechanism, what the individual platform needs to do is implement
      platform dependent EEH operations.
      
      For now, the pseries platform is covered under the mechanism. That means
      we have to think about other platforms to support EEH, like powernv.
      Besides, we only have framework for the mechanism and we have to implement
      it for pseries platform later.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      aa1e6374
    • G
      powerpc/eeh: Cleanup comments in the EEH core · cb3bc9d0
      Gavin Shan 提交于
      The EEH has been implemented on pSeries platform. The original
      code looks a little bit nasty. The patch does cleanup on the
      current EEH implementation so that it looks more clean.
      
              * Duplicated comments have been removed from the corresponding
                header files.
              * Comments have been reorganized so that it looks more clean.
              * The leading comments of functions are adjusted for a little
                bit so that the result of "make pdfdocs" would be more
                unified.
              * Function definitions and calls have unified format as "xxx()".
                That means the format "xxx ()" has been replaced by "xxx()".
              * There're multiple functions implemented for resetting PE. The
                position of those functions have been move around so that they
                are adjacent to each other to reflect their relationship.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      cb3bc9d0
  3. 06 11月, 2008 1 次提交
    • B
      powerpc/pci: Split pcibios_fixup_bus() into bus setup and device setup · 8b8da358
      Benjamin Herrenschmidt 提交于
      Currently, our PCI code uses the pcibios_fixup_bus() callback, which
      is called by the generic code when probing PCI buses, for two
      different things.
      
      One is to set up things related to the bus itself, such as reading
      bridge resources for P2P bridges, fixing them up, or setting up the
      iommu's associated with bridges on some platforms.
      
      The other is some setup for each individual device under that bridge,
      mostly setting up DMA mappings and interrupts.
      
      The problem is that this approach doesn't work well with PCI hotplug
      when an existing bus is re-probed for new children.  We fix this
      problem by splitting pcibios_fixup_bus into two routines:
      
      	pcibios_setup_bus_self() is now called to setup the bus itself
      
      	pcibios_setup_bus_devices() is now called to setup devices
      
      pcibios_fixup_bus() is then modified to call these two after reading the
      bridge bases, and the OF based PCI probe is modified to avoid calling
      into the first one when rescanning an existing bridge.
      
      [paulus@samba.org - fixed eeh.h for 32-bit compile now that pci-common.c
      is including it unconditionally.]
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      8b8da358
  4. 04 8月, 2008 1 次提交
  5. 04 12月, 2006 2 次提交
    • B
      [POWERPC] Merge 32 and 64 bits asm-powerpc/io.h · 68a64357
      Benjamin Herrenschmidt 提交于
      powerpc: Merge 32 and 64 bits asm-powerpc/io.h
      
      The rework on io.h done for the new hookable accessors made it easier,
      so I just finished the work and merged 32 and 64 bits io.h for arch/powerpc.
      
      arch/ppc still uses the old version in asm-ppc, there is just too much gunk
      in there that I really can't be bothered trying to cleanup.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      68a64357
    • B
      [POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits · 4cb3cee0
      Benjamin Herrenschmidt 提交于
      This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
      and PIO) and provides a generic way for other platforms to do so (we
      have need to do that for various other platforms).
      
      While reworking the IO ops, I ended up doing some spring cleaning in
      io.h and eeh.h which I might want to split into 2 or 3 patches (among
      others, eeh.h had a lot of useless stuff in it).
      
      A side effect is that EEH for PIO should work now (it used to pass IO
      ports down to the eeh address check functions which is bogus).
      
      Also, new are MMIO "repeat" ops, which other archs like ARM already had,
      and that we have too now: readsb, readsw, readsl, writesb, writesw,
      writesl.
      
      In the long run, I might also make EEH use the hooks instead
      of wrapping at the toplevel, which would make things even cleaner and
      relegate EEH completely in platforms/iseries, but we have to measure the
      performance impact there (though it's really only on MMIO reads)
      
      Since I also need to hook on ioremap, I shuffled the functions a bit
      there. I introduced ioremap_flags() to use by drivers who want to pass
      explicit flags to ioremap (and it can be hooked). The old __ioremap() is
      still there as a low level and cannot be hooked, thus drivers who use it
      should migrate unless they know they want the low level version.
      
      The patch "arch provides generic iomap missing accessors" (should be
      number 4 in this series) is a pre-requisite to provide full iomap
      API support with this patch.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      4cb3cee0
  6. 13 9月, 2006 1 次提交
    • P
      [POWERPC] Fix MMIO ops to provide expected barrier behaviour · f007cacf
      Paul Mackerras 提交于
      This changes the writeX family of functions to have a sync instruction
      before the MMIO store rather than after, because the generally expected
      behaviour is that the device receiving the MMIO store can be guaranteed
      to see the effects of any preceding writes to normal memory.
      
      To preserve ordering between writeX and readX, and to preserve ordering
      between preceding stores and the readX, the readX family of functions
      have had an sync added before the load.
      
      Although writeX followed by spin_unlock is not officially guaranteed
      to keep the writeX inside the spin-locked region unless an mmiowb()
      is used, there are currently drivers that depend on the previous
      behaviour on powerpc, which was that the mmiowb wasn't actually required.
      Therefore we have a per-cpu flag that is set by writeX, cleared by
      __raw_spin_lock and mmiowb, and tested by __raw_spin_unlock.  If it is
      set, __raw_spin_unlock does a sync and clears it.
      
      This changes both 32-bit and 64-bit readX/writeX.  32-bit already has a
      sync in __raw_spin_unlock (since lwsync doesn't exist on 32-bit), and thus
      doesn't need the per-cpu flag.
      
      Tested on G5 (PPC970) and POWER5.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      f007cacf
  7. 26 4月, 2006 1 次提交
  8. 22 4月, 2006 1 次提交
  9. 01 4月, 2006 1 次提交
  10. 09 3月, 2006 1 次提交
    • M
      [PATCH] powerpc: restore eeh_add_device_late() prototype stub · 1c6cc5fd
      Mark Fasheh 提交于
      We fixed this:
      
      arch/powerpc/platforms/pseries/eeh.c: In function `eeh_add_device_tree_late':
      arch/powerpc/platforms/pseries/eeh.c:901: warning: implicit declaration of function `eeh_add_device_late'
      arch/powerpc/platforms/pseries/eeh.c: At top level:
      arch/powerpc/platforms/pseries/eeh.c:918: error: conflicting types for 'eeh_add_device_late'
      arch/powerpc/platforms/pseries/eeh.c:901: error: previous implicit declaration of 'eeh_add_device_late' was here
      make[2]: *** [arch/powerpc/platforms/pseries/eeh.o] Error 1
      
      But we forgot the !CONFIG_EEH stub.
      Signed-off-by: NMark Fasheh <mark.fasheh@oracle.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      1c6cc5fd
  11. 02 3月, 2006 1 次提交
  12. 28 2月, 2006 1 次提交
  13. 10 1月, 2006 1 次提交
  14. 09 1月, 2006 3 次提交
  15. 17 11月, 2005 1 次提交
  16. 14 11月, 2005 1 次提交
  17. 10 11月, 2005 1 次提交
    • L
      [PATCH] ppc64: PCI error event dispatcher · 172ca926
      Linas Vepstas 提交于
      12-eeh-event-dispatcher.patch
      
      ppc64: EEH Recovery dispatcher thread
      
      This patch adds a mechanism to create recovery threads when an
      EEH event is received.  Since an EEH freeze state may be detected
      within an interrupt context, we need to get out of the interrupt
      context before starting recovery. This dispatcher does this in
      two steps: first, it uses a workqueue to get out, and then
      lanuches a kernel thread, so that the recovery routine can
      sleep for exteded periods without upseting the keventd.
      
      A kernel thread is created with each EEH event, rather than
      having one long-running daemon started at boot time.  This is
      because it is anticipated that EEH events will be very rare
      (very very rare, ideally) and so its pointless to cluter the
      process tables with a daemon that will almost never run.
      Signed-off-by: NLinas Vepstas <linas@austin.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      172ca926
  18. 10 9月, 2005 1 次提交
  19. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4