The patch is needed since there is some IBS code in add_ibs_begin()
that handles more than one sample per iteration. This requires calling
get_slots() during each loop.

This fixes the current problem, but a proper solution that reworks the
cpu buffer synchronization is needed here in the future.
Signed-off-by: NBarry Kasindorf <barry.kasindorf@amd.com>
Signed-off-by: NRobert Richter <robert.richter@amd.com>

This patch addresses problems when hotplugging cpus while
profiling. Instead of allocating only online cpus, all possible cpu
buffers are allocated, which allows cpus to be onlined during
operation. If a cpu is offlined before profiling is shutdown
wq_sync_buffer checks for this condition then cancels this work and
does not sync this buffer.
Signed-off-by: NChris J Arges <arges@linux.vnet.ibm.com>
Signed-off-by: NRobert Richter <robert.richter@amd.com>

Signed-off-by: NRobert Richter <robert.richter@amd.com>

Signed-off-by: NRobert Richter <robert.richter@amd.com>

Signed-off-by: NRobert Richter <robert.richter@amd.com>

Signed-off-by: NRobert Richter <robert.richter@amd.com>

Code looks much more cleaner now.
Signed-off-by: NRobert Richter <robert.richter@amd.com>

It needs the WM97xx touchscreen driver to be compiled in, not as a
module.  And it cannot itself be a module, due to some unfortunate
interactions with platform data.
Reported-by: NHerbert Xu <herbert@gondor.apana.org.au>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Commit ed458df4 ("PnP: move
pnpacpi/pnpbios_init to after PCI init") moved the PnP RTC discovery
later, and now the ACPI RTC glue code doesn't find it any more, breaking
the RTC wakealarm sysfs interfaces, as reported by Rafael.

This really is fairly messy, and we have several annoying ordering
constraints here - the PnP code that sets up the RTC resources wants to
run after the PCI resources have to be registered, which in turn needs
to run after ACPI has at least enumerated the root PCI buses etc.  Our
initcall ordering is not fine-grained enough to make this all painless.

So this moves the ACPI RTC glue ("acpi_rtc_init()") down to a regular
module call, which fixes the problem Rafael has.  The reason this isn't
wonderful is that we really should do acpi_rtc_init before we do the
rtc_cmos init, and now those two are in the same module_init() section.

Which happens to work, but only because drivers/rtc is linked after
drivers/acpi.  In other words, we still have a very subtle ordering
issue here. Grr.
Reported-and-tested-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NDavid Brownell <david-b@pacbell.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Move the prototypes from the generic kernel.h header to the more
appropriate include/asm-x86/bios_ebda.h header file.

Also, remove the check from the power management code - this is a
pure x86 matter for now.
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Hard-coded timeout values of 250ms for writes and 100ms for reads are
currently used for MMC transactions over SPI. The spec states that the
timeout values from the card should be used.
Signed-off-by: NMatthew Fleming <matthew.fleming@imgtec.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The MMC spec states that the timeout for accessing the CSD and CID
registers is 64 clock cycles.
Signed-off-by: NMatthew Fleming <matthew.fleming@imgtec.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The variable 'scratch' is always initialized before it's used. The
conditional which is responsible for initialization of 'scratch' will
always evaluate 'true' when the first loop iteration occurs, and thus,
it's properly initialized. GCC doesn't see this, of course, so using
the uninitialized_var() macro seems to work for silencing this case.
Signed-off-by: NSteven Noonan <steven@uplinklabs.net>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

We use 512 byte blocks on all cards, and newer cards support nothing
else, so hard code it and make the code less complex.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some high speed capable controllers forget to set the high speed
capability bit. Make sure we enable the functionality anyway.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

We do not support PC (SCSI) commands, so don't pretend we do by
letting them through.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The MMC block driver services requests one at a time and in strict
order. Indicate this to the block layer so that it can handle barriers
in an efficient manner.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Make sure we consider the maximum block count when we tell the block
layer about the maximum sector count. That way we don't have to chop
up the request ourselves.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

There is one thread per host controller so make sure they all get
unique names.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Make sure we can be woken from the forced sleep that is done on errors.
Removing a card often results in -ENOMEDIUM or -EILSEQ so we previously
locked up the removal process for a second.

We could completely exit on -ENOMEDIUM, but it might be a transient
glitch so treat it like any other error.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The card detection delay was added early when the behaviour of the
card interrupt was still very much unknown (i.e. before there was a
public specification). As it is now known that it is a debounced signal,
reduce the delay to something more sensible.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The sdhci controllers can interrupt us when the busy state from the
card has ended, saving CPU cycles and power.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

If an external PHY is found the driver falls through to the default
case in the switch and overwrites the PHY ID. Add the missing break.
Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This patch changes e1000 to set vlan_features so TSO and CSUM
offload can be used by VLAN devices, similar as with the other
Intel drivers.
Signed-off-by: NPatrick McHardy <kaber@trash.net>
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

NULL function pointers are very bad security wise. This one got caught by
kerneloops.org quite a few times, so it's happening in the field....

Fix is simple, check the function pointer for NULL, like 6 other places
in the same function are already doing.
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Update myri10ge driver version number to 1.4.3-1.369.
Signed-off-by: NBrice Goglin <brice@myri.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

Taken from Realtek's 8.007.00 r8168 driver.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Fixed-by: NIvan Vecera <ivecera@redhat.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

Taken from Realtek's 8.007.00 r8168 driver.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Fixed-by: NIvan Vecera <ivecera@redhat.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

The addition of a new device has so far implied a specialization of
these masks. While they identify 8168c devices, they can be expected
to be further refined as they have been by Realtek so far.

The change should bring the driver closer to the version 8.006.00 of
Realtek's 8168 driver.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

Taken from Realtek's 8.006.00 r8168 driver.

I have left some bits related to jumbo frame aside for now.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

Taken from Realtek's 8.006.00 r8168 driver.

I have left some bits related to jumbo frame aside for now.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

Taken from Realtek's 8.006.00 r8168 driver.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

This part of the driver should be reasonably in line with Realtek's
8.006.00 driver.

I have left some bits related to jumbo frame and optional features
aside for now.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

Broadly speaking the 8168c* share some common code which will
be factored in __rtl_hw_start_8168cp. The 8168b* share some
code too but it will be a bit different.

Any change of behavior should be confined to the currently
unidentified 8168 chipsets. They will not be applied the Tx
performance tweak and will emit a warning instead.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>

I can not argue strongly for (or against) a specific ordering
on a purely technical ground but the patch avoids to swallow
Realtek's changes in one big, hard-to-read gulp.

Let aside the way the RxConfig register is written (see
rtl_set_rx_tx_config_registers / RxConfig / rtl_set_rx_mode),
this change brings the registers write ordering closer with
Realtek's driver one (version 8.006.00) for the 8168 chipsets.

More 8168 specific code which touches the Configx registers will
be added in the section covered by Cfg9346_UnLock / Cfg9346_Lock.

This code should not be the cause of regression for 810x and
8110 users.
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>