- 04 11月, 2015 1 次提交
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由 Caesar Wang 提交于
The "init" pinctrl is defined we'll set pinctrl to this state before probe and then "default" after probe. Add the "init" and "sleep" pinctrl as the OTP gpio state, since we need switch the pin to gpio state before the TSADC controller is reset. AFAIK, the TSADC controller is reset, the tshut polarity will be a *low* signal in a short period of time for some devices. Says: The TSADC get the temperature on rockchip thermal. If T(current temperature) < (setting temperature), the OTP output the *high* signal. If T(current temperature) > (setting temperature), the OTP output the *low* Signal. In some cases, the OTP pin is connected to the PMIC, maybe the PMIC can accept the reset response time to avoid this issue. In other words, the system will be always reboot if we make the OTP pin is connected the others IC to control the power. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NCaesar Wang <wxt@rock-chips.com> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
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- 25 11月, 2014 1 次提交
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由 Caesar Wang 提交于
This add the necessary binding documentation for the thermal found on Rockchip SoCs Signed-off-by: Nzhaoyifeng <zyf@rock-chips.com> Signed-off-by: NCaesar Wang <caesar.wang@rock-chips.com> Reviewed-by: NDmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
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