1. 04 9月, 2013 1 次提交
    • C
      drm/i915: Do not add an interrupt for a context switch · c0321e2c
      Chris Wilson 提交于
      We use the request to ensure we hold a reference to the context for the
      duration that it remains in use by the ring. Each request only holds a
      reference to the current context, hence we emit a request after
      switching contexts with the final reference to the old context. However,
      the extra interrupt caused by that request is not useful (no timing
      critical function will wait for the context object), instead the overhead
      of servicing the IRQ shows up in some (lightweight) benchmarks. In order
      to keep the useful property of using the request to manage the context
      lifetime, we want to add a dummy request that is associated with the
      interrupt from the subsequent real request following the batch.
      
      The extra interrupt was added as a side-effect of using
      i915_add_request() in
      
      commit 112522f6
      Author: Chris Wilson <chris@chris-wilson.co.uk>
      Date:   Thu May 2 16:48:07 2013 +0300
      
          drm/i915: put context upon switching
      
      v2: Daniel convinced me that the request here was solely for context
      lifetime tracking and that we have the active ref to keep the object
      alive whilst the MI_SET_CONTEXT. So the only concern then is which
      context should get the blame for MI_SET_CONTEXT failing. The old scheme
      added a request for the old context so that any hang upto and including
      the switch away would mark the old context as guilty. Now any hang here
      implicates the new context. However since we have already gone through a
      complete flush with the last context in its last request, and all that
      lies in no-man's-land is an invalidate flush and the MI_SET_CONTEXT, we
      should be safe in not unduly placing blame on the new context.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Ben Widawsky <ben@bwidawsk.net>
      Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c0321e2c
  2. 08 8月, 2013 1 次提交
    • B
      drm/i915: mm_list is per VMA · ca191b13
      Ben Widawsky 提交于
      formerly: "drm/i915: Create VMAs (part 5) - move mm_list"
      
      The mm_list is used for the active/inactive LRUs. Since those LRUs are
      per address space, the link should be per VMx .
      
      Because we'll only ever have 1 VMA before this point, it's not incorrect
      to defer this change until this point in the patch series, and doing it
      here makes the change much easier to understand.
      
      Shamelessly manipulated out of Daniel:
      "active/inactive stuff is used by eviction when we run out of address
      space, so needs to be per-vma and per-address space. Bound/unbound otoh
      is used by the shrinker which only cares about the amount of memory used
      and not one bit about in which address space this memory is all used in.
      Of course to actual kick out an object we need to unbind it from every
      address space, but for that we have the per-object list of vmas."
      
      v2: only bump GGTT LRU in i915_gem_object_set_to_gtt_domain (Chris)
      
      v3: Moved earlier in the series
      
      v4: Add dropped message from v3
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      [danvet: Frob patch to apply and use vma->node.size directly as
      discused with Ben. Also drop a needles BUG_ON before move_to_inactive,
      the function itself has the same check.]
      [danvet 2nd: Rebase on top of the lost "drm/i915: Cleanup more of VMA
      in destroy", specifically unlink the vma from the mm_list in
      vma_unbind (to keep it symmetric with bind_to_vm) instead of
      vma_destroy.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ca191b13
  3. 06 8月, 2013 2 次提交
  4. 16 7月, 2013 1 次提交
  5. 09 7月, 2013 1 次提交
    • B
      drm/i915: Getter/setter for object attributes · f343c5f6
      Ben Widawsky 提交于
      Soon we want to gut a lot of our existing assumptions how many address
      spaces an object can live in, and in doing so, embed the drm_mm_node in
      the object (and later the VMA).
      
      It's possible in the future we'll want to add more getter/setter
      methods, but for now this is enough to enable the VMAs.
      
      v2: Reworked commit message (Ben)
      Added comments to the main functions (Ben)
      sed -i "s/i915_gem_obj_set_color/i915_gem_obj_ggtt_set_color/" drivers/gpu/drm/i915/*.[ch]
      sed -i "s/i915_gem_obj_bound/i915_gem_obj_ggtt_bound/" drivers/gpu/drm/i915/*.[ch]
      sed -i "s/i915_gem_obj_size/i915_gem_obj_ggtt_size/" drivers/gpu/drm/i915/*.[ch]
      sed -i "s/i915_gem_obj_offset/i915_gem_obj_ggtt_offset/" drivers/gpu/drm/i915/*.[ch]
      (Daniel)
      
      v3: Rebased on new reserve_node patch
      Changed DRM_DEBUG_KMS to actually work (will need fixing later)
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      f343c5f6
  6. 01 7月, 2013 1 次提交
    • B
      drm/i915: Fix context sizes on HSW · a0de80a0
      Ben Widawsky 提交于
      With updates to the spec, we can actually see the context layout, and
      how many dwords are allocated. That table suggests we need 70720 bytes
      per HW context. Rounded up, this is 18 pages. Looking at what lives
      after the current 4 pages we use, I can't see too much important (mostly
      it's d3d related), but there are a couple of things which look scary. I
      am hopeful this can explain some of our odd HSW failures.
      
      v2: Make the context only 17 pages. The power context space isn't used
      ever, and execlists aren't used in our driver, making the actual total
      66944 bytes.
      
      v3: Add a comment to the code. (Jesse & Paulo)
      Reported-by: N"Azad, Vinit" <vinit.azad@intel.com>
      Cc: stable@vger.kernel.org
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      a0de80a0
  7. 13 6月, 2013 2 次提交
  8. 01 6月, 2013 1 次提交
    • B
      drm/i915: context debug messages · bb036413
      Ben Widawsky 提交于
      Add some debug messages to help figure out what goes wrong on context
      initialization.
      
      Later in the PPGTT series, I ended up having a lot of failures after
      reset. In many cases it was extra difficult to debug because I hadn't
      even realized that contexts failed to reinitialize after reset (again an
      artifact of some later patches).
      
      This fairly benign patch does help debug some potential issues which
      arise later.
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      bb036413
  9. 11 5月, 2013 1 次提交
  10. 06 5月, 2013 2 次提交
  11. 04 5月, 2013 1 次提交
  12. 01 5月, 2013 1 次提交
    • M
      drm/i915: reference count for i915_hw_contexts · dce3271b
      Mika Kuoppala 提交于
      Enabling PPGTT and also the need to track which context was guilty of
      gpu hang (arb robustness enabling) have put pressure for struct i915_hw_context
      to be more than just a placeholder for hw context state.
      
      In order to track object lifetime properly in a multi peer usage, add reference
      counting for i915_hw_context.
      
      v2: track i915_hw_context pointers instead of using ctx_ids
      (from Chris Wilson)
      
      v3 (Ben): Get rid of do_release() and handle refcounting more compactly.
      (recommended by Chis)
      
      v4: kref_* put inside static inlines (Daniel Vetter)
      remove code duplication on freeing context (Chris Wilson)
      
      v5: idr_remove and ctx->file_priv = NULL in destroy ioctl (Chris)
      This actually will cause a problem if one destroys a context and later
      refers to the idea of the context (multiple contexts may have the same
      id, but only 1 will exist in the idr).
      
      v6: Strip out the request related stuff. Reworded commit message.
      Got rid of do_destroy and introduced i915_gem_context_release_handle,
      suggested by Chris Wilson.
      
      v7: idr_remove can't be called inside idr_for_each (Chris Wilson)
      
      Signed-off-by: Ben Widawsky <ben@bwidawsk.net> (v5)
      Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> (v7)
      Reviewed-by: NBen Widawsky <ben@bwidawsk.net>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      [danvet: Squash sob lines, the patch ping-ponged between Ben and Mika
      a bit ...]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      dce3271b
  13. 18 4月, 2013 1 次提交
    • C
      drm/i915: Use MLC (l3$) for context objects · 4615d4c9
      Chris Wilson 提交于
      Enabling context support increases SwapBuffers latency by about 20%
      (measured on an i7-3720qm). We can offset that loss slightly by enabling
      faster caching for the contexts. As they are not backed by any
      particular cache (such as the sampler or render caches) our only option
      is to select the generic mid-level cache. This reduces the latency of
      the swap by about 5%.
      
      Oddly this effect can be observed running smokin-guns on IVB at
      1280x1024:
      Using BLT copies for swaps: 151.67 fps
      Using Render copies for swaps (unpatched):  141.70 fps
      With contexts disabled: 150.23 fps
      With contexts in L3$: 150.77 fps
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Ben Widawsky <ben@bwidawsk.net>
      Cc: Kenneth Graunke <kenneth@whitecape.org>
      Reviewed-by: NKenneth Graunke <kenneth@whitecape.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4615d4c9
  14. 28 2月, 2013 1 次提交
  15. 15 2月, 2013 2 次提交
  16. 29 11月, 2012 1 次提交
    • C
      drm/i915: Preallocate next seqno before touching the ring · 9d773091
      Chris Wilson 提交于
      Based on the work by Mika Kuoppala, we realised that we need to handle
      seqno wraparound prior to committing our changes to the ring. The most
      obvious point then is to grab the seqno inside intel_ring_begin(), and
      then to reuse that seqno for all ring operations until the next request.
      As intel_ring_begin() can fail, the callers must already be prepared to
      handle such failure and so we can safely add further checks.
      
      This patch looks like it should be split up into the interface
      changes and the tweaks to move seqno wrapping from the execbuffer into
      the core seqno increment. However, I found no easy way to break it into
      incremental steps without introducing further broken behaviour.
      
      v2: Mika found a silly mistake and a subtle error in the existing code;
      inside i915_gem_retire_requests() we were resetting the sync_seqno of
      the target ring based on the seqno from this ring - which are only
      related by the order of their allocation, not retirement. Hence we were
      applying the optimisation that the rings were synchronised too early,
      fortunately the only real casualty there is the handling of seqno
      wrapping.
      
      v3: Do not forget to reset the sync_seqno upon module reinitialisation,
      ala resume.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=863861
      Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> [v2]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      9d773091
  17. 12 11月, 2012 1 次提交
  18. 03 10月, 2012 1 次提交
  19. 02 10月, 2012 1 次提交
    • C
      drm/i915: Actually invalidate the TLB for the SandyBridge HW contexts w/a · ac82ea2e
      Chris Wilson 提交于
      A side-effect of commit 7d54a904
      Author: Chris Wilson <chris@chris-wilson.co.uk>
      Date:   Fri Aug 10 10:18:10 2012 +0100
      
          drm/i915: Apply post-sync write for pipe control invalidates
      
      was that only a request to emit invalidate flush would result in the
      TLB being invalidated (since it requires synchronisation and so incurs a
      performance penalty). However, the stated w/a for hardware contexts is
      that the TLBs must be invalidated prior to a MI_SET_CONTEXT, yet the w/a
      itself did not request the TLBs to be invalidated...
      
      Note this w/a does not prevent the hard system hang I experience when
      using hw contexts (with rc6 enabled) on SNB GT1.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Ben Widawsky <ben@bwidawsk.net>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ac82ea2e
  20. 24 8月, 2012 1 次提交
  21. 06 8月, 2012 1 次提交
  22. 26 7月, 2012 2 次提交
  23. 25 7月, 2012 3 次提交
  24. 20 7月, 2012 1 次提交
  25. 30 6月, 2012 1 次提交
  26. 20 6月, 2012 6 次提交
  27. 18 6月, 2012 1 次提交
  28. 14 6月, 2012 1 次提交