1. 17 2月, 2010 10 次提交
    • D
      powerpc/booke: Add definitions for advanced debug registers · 99396ac1
      Dave Kleikamp 提交于
      powerpc/booke: Add definitions for advanced debug registers
      
      From: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
      
      Based on patches originally written by Torez Smith.
      
      This patch adds additional definitions for BookE Debug Registers
      to the reg_booke.h header file.
      Signed-off-by: NDave Kleikamp <shaggy@linux.vnet.ibm.com>
      Acked-by: NDavid Gibson <dwg@au1.ibm.com>
      Cc: Torez Smith  <lnxtorez@linux.vnet.ibm.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
      Cc: Kumar Gala <galak@kernel.crashing.org>
      Cc: Sergio Durigan Junior <sergiodj@br.ibm.com>
      Cc: Thiago Jung Bauermann <bauerman@br.ibm.com>
      Cc: linuxppc-dev list <Linuxppc-dev@ozlabs.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      99396ac1
    • D
      powerpc: Extended ptrace interface · 3162d92d
      Dave Kleikamp 提交于
      powerpc: Extended ptrace interface
      
      From: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
      
      Based on patches originally written by Torez Smith.
      
      Add a new extended ptrace interface so that user-space has a single
      interface for powerpc, without having to know the specific layout
      of the debug registers.
      
      Implement:
      PPC_PTRACE_GETHWDEBUGINFO
      PPC_PTRACE_SETHWDEBUG
      PPC_PTRACE_DELHWDEBUG
      Signed-off-by: NDave Kleikamp <shaggy@linux.vnet.ibm.com>
      Acked-by: NDavid Gibson <dwg@au1.ibm.com>
      Cc: Torez Smith  <lnxtorez@linux.vnet.ibm.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
      Cc: Kumar Gala <galak@kernel.crashing.org>
      Cc: Sergio Durigan Junior <sergiodj@br.ibm.com>
      Cc: Thiago Jung Bauermann <bauerman@br.ibm.com>
      Cc: linuxppc-dev list <Linuxppc-dev@ozlabs.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      3162d92d
    • A
      powerpc: Use lwsync for acquire barrier if CPU supports it · 5a0e9b57
      Anton Blanchard 提交于
      Nick Piggin discovered that lwsync barriers around locks were faster than isync
      on 970. That was a long time ago and I completely dropped the ball in testing
      his patches across other ppc64 processors.
      
      Turns out the idea helps on other chips. Using a microbenchmark that
      uses a lot of threads to contend on a global pthread mutex (and therefore a
      global futex), POWER6 improves 8% and POWER7 improves 2%. I checked POWER5
      and while I couldn't measure an improvement, there was no regression.
      
      This patch uses the lwsync patching code to replace the isyncs with lwsyncs
      on CPUs that support the instruction. We were marking POWER3 and RS64 as lwsync
      capable but in reality they treat it as a full sync (ie slow). Remove the
      CPU_FTR_LWSYNC bit from these CPUs so they continue to use the faster isync
      method.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      5a0e9b57
    • A
      powerpc: Rename LWSYNC_ON_SMP to PPC_RELEASE_BARRIER, ISYNC_ON_SMP to PPC_ACQUIRE_BARRIER · f10e2e5b
      Anton Blanchard 提交于
      For performance reasons we are about to change ISYNC_ON_SMP to sometimes be
      lwsync. Now that the macro name doesn't make sense, change it and LWSYNC_ON_SMP
      to better explain what the barriers are doing.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      f10e2e5b
    • A
      powerpc: Use lwarx/ldarx hint in bit locks · 864b9e6f
      Anton Blanchard 提交于
      This patch implements the lwarx/ldarx hint bit for bit locks.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      864b9e6f
    • A
      powerpc: Use lwarx hint in spinlocks · 4e14a4d1
      Anton Blanchard 提交于
      Recent versions of the PowerPC architecture added a hint bit to the larx
      instructions to differentiate between an atomic operation and a lock operation:
      
      > 0 Other programs might attempt to modify the word in storage addressed by EA
      > even if the subsequent Store Conditional succeeds.
      >
      > 1 Other programs will not attempt to modify the word in storage addressed by
      > EA until the program that has acquired the lock performs a subsequent store
      > releasing the lock.
      
      To avoid a binutils dependency this patch create macros for the extended lwarx
      format and uses it in the spinlock code. To test this change I used a simple
      test case that acquires and releases a global pthread mutex:
      
      	pthread_mutex_lock(&mutex);
      	pthread_mutex_unlock(&mutex);
      
      On a 32 core POWER6, running 32 test threads we spend almost all our time in
      the futex spinlock code:
      
          94.37%     perf  [kernel]                     [k] ._raw_spin_lock
                     |
                     |--99.95%-- ._raw_spin_lock
                     |          |
                     |          |--63.29%-- .futex_wake
                     |          |
                     |          |--36.64%-- .futex_wait_setup
      
      Which is a good test for this patch. The results (in lock/unlock operations per
      second) are:
      
      before: 1538203 ops/sec
      after:  2189219 ops/sec
      
      An improvement of 42%
      
      A 32 core POWER7 improves even more:
      
      before: 1279529 ops/sec
      after:  2282076 ops/sec
      
      An improvement of 78%
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      4e14a4d1
    • A
      powerpc: Convert global "BAD" interrupt to per cpu spurious · 17081102
      Anton Blanchard 提交于
      I often get asked if BAD interrupts are really bad. On some boxes (eg
      IBM machines running a hypervisor) there are valid cases where are
      presented with an interrupt that is not for us. These cases are common
      enough to show up as thousands of BAD interrupts a day.
      
      Tone them down by calling them spurious. Since they can be a significant cause
      of OS jitter, we may as well log them per cpu so we know where they are
      occurring.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      17081102
    • A
      powerpc: Add timer, performance monitor and machine check counts to /proc/interrupts · 89713ed1
      Anton Blanchard 提交于
      With NO_HZ it is useful to know how often the decrementer is going off. The
      patch below adds an entry for it and also adds it into the /proc/stat
      summaries.
      
      While here, I added performance monitoring and machine check exceptions.
      I found it useful to keep an eye on the PMU exception rate
      when using the perf tool. Since it's possible to take a completely
      handled machine check on a System p box it also sounds like a good idea to
      keep a machine check summary.
      
      The event naming matches x86 to keep gratuitous differences to a minimum.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      89713ed1
    • A
      powerpc: Reduce footprint of irq_stat · 8c007bfd
      Anton Blanchard 提交于
      PowerPC is currently using asm-generic/hardirq.h which statically allocates an
      NR_CPUS irq_stat array. Switch to an arch specific implementation which uses
      per cpu data:
      
      On a kernel with NR_CPUS=1024, this saves quite a lot of memory:
      
         text    data     bss      dec         hex    filename
      8767938 2944132 1636796 13348866         cbb002 vmlinux.baseline
      8767779 2944260 1505724 13217763         c9afe3 vmlinux.irq_cpustat
      
      A saving of around 128kB.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8c007bfd
    • B
      powerpc/eeh: Fix a bug when pci structure is null · 8d3d50bf
      Breno Leitao 提交于
      During a EEH recover, the pci_dev structure can be null, mainly if an
      eeh event is detected during cpi config operation. In this case, the
      pci_dev will not be known (and will be null) the kernel will crash
      with the following message:
      
      Unable to handle kernel paging request for data at address 0x000000a0
      Faulting instruction address: 0xc00000000006b8b4
      Oops: Kernel access of bad area, sig: 11 [#1]
      
      NIP [c00000000006b8b4] .eeh_event_handler+0x10c/0x1a0
      LR [c00000000006b8a8] .eeh_event_handler+0x100/0x1a0
      Call Trace:
      [c0000003a80dff00] [c00000000006b8a8] .eeh_event_handler+0x100/0x1a0
      [c0000003a80dff90] [c000000000031f1c] .kernel_thread+0x54/0x70
      
      The bug occurs because pci_name() tries to access a null pointer.
      This patch just guarantee that pci_name() is not called on Null pointers.
      Signed-off-by: NBreno Leitao <leitao@linux.vnet.ibm.com>
      Signed-off-by: NLinas Vepstas <linasvepstas@gmail.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8d3d50bf
  2. 09 2月, 2010 1 次提交
  3. 03 2月, 2010 2 次提交
  4. 01 2月, 2010 1 次提交
  5. 15 1月, 2010 1 次提交
    • A
      powerpc: cpumask_of_node() should handle -1 as a node · c81b812a
      Anton Blanchard 提交于
      pcibus_to_node can return -1 if we cannot determine which node a pci bus
      is on. If passed -1, cpumask_of_node will negatively index the lookup array
      and pull in random data:
      
      # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus
      00000000,00000003,00000000,00000000
      # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist
      64-65
      
      Change cpumask_of_node to check for -1 and return cpu_all_mask in this
      case:
      
      # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus
      ffffffff,ffffffff,ffffffff,ffffffff
      # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist
      0-127
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c81b812a
  6. 18 12月, 2009 1 次提交
  7. 16 12月, 2009 3 次提交
  8. 15 12月, 2009 6 次提交
  9. 13 12月, 2009 2 次提交
  10. 12 12月, 2009 2 次提交
  11. 11 12月, 2009 1 次提交
  12. 09 12月, 2009 6 次提交
    • R
      powerpc: Make "intspec" pointers in irq_host->xlate() const · 40d50cf7
      Roman Fietze 提交于
      Writing a driver using SCLPC on the MPC5200B I detected, that the
      intspec arrays to map irqs to Linux virq cannot be const, because the
      mapping and xlate functions only take non const pointers. All those
      functions do not modify the intspec, so a const pointer could be used.
      Signed-off-by: NRoman Fietze <roman.fietze@telemotive.de>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      40d50cf7
    • J
      powerpc/8xx: Restore _PAGE_WRITETHRU · 0c466169
      Joakim Tjernlund 提交于
      8xx has not had WRITETHRU due to lack of bits in the pte.
      After the recent rewrite of the 8xx TLB code, there are
      two bits left. Use one of them to WRITETHRU.
      
      Perhaps use the last SW bit to PAGE_SPECIAL or PAGE_FILE?
      Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      0c466169
    • J
      powerpc/8xx: Update TLB asm so it behaves as linux mm expects. · fe11dc3f
      Joakim Tjernlund 提交于
      Update the TLB asm to make proper use of _PAGE_DIRY and _PAGE_ACCESSED.
      Get rid of _PAGE_HWWRITE too.
      Pros:
       - I/D TLB Miss never needs to write to the linux pte.
       - _PAGE_ACCESSED is only set on TLB Error fixing accounting
       - _PAGE_DIRTY is mapped to 0x100, the changed bit, and is set directly
          when a page has been made dirty.
       - Proper RO/RW mapping of user space.
       - Free up 2 SW TLB bits in the linux pte(add back _PAGE_WRITETHRU ?)
       - kernel RO/user NA support.
      Cons:
       - A few more instructions in the TLB Miss routines.
      Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      fe11dc3f
    • N
      sysfs/cpu: Add probe/release files · 12633e80
      Nathan Fontenot 提交于
      Version 3 of this patch is updated with documentation added to
      Documentation/ABI.  There are no changes to any of the C code from v2
      of the patch.
      
      In order to support kernel DLPAR of CPU resources we need to provide an
      interface to add (probe) and remove (release) the resource from the system.
      This patch Creates new generic probe and release sysfs files to facilitate
      cpu probe/release.  The probe/release interface provides for allowing each
      arch to supply their own routines for implementing the backend of adding
      and removing cpus to/from the system.
      
      This also creates the powerpc specific stubs to handle the arch callouts
      from writes to the sysfs files.
      
      The creation and use of these files is regulated by the
      CONFIG_ARCH_CPU_PROBE_RELEASE option so that only architectures that need the
      capability will have the files created.
      Signed-off-by: NNathan Fontenot <nfont@austin.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      12633e80
    • N
      powerpc/pseries: Kernel DLPAR Infrastructure · ab519a01
      Nathan Fontenot 提交于
      The Dynamic Logical Partitioning capabilities of the powerpc pseries platform
      allows for the addition and removal of resources (i.e. CPU's, memory, and PCI
      devices) from a partition. The removal of a resource involves
      removing the resource's node from the device tree and then returning the
      resource to firmware via the rtas set-indicator call.  To add a resource, it
      is first obtained from firmware via the rtas set-indicator call and then a
      new device tree node is created using the ibm,configure-coinnector rtas call
      and added to the device tree.
      
      This patch provides the kernel DLPAR infrastructure in a new filed named
      dlpar.c.  The functionality provided is for acquiring and releasing a resource
      from firmware and the parsing of information returned from the
      ibm,configure-connector rtas call.  Additionally this exports the pSeries
      reconfiguration notifier chain so that it can be invoked when device tree
      updates are made.
      Signed-off-by: NNathan Fontenot <nfont@austin.ibm.com>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ab519a01
    • B
      powerpc/macio: Rework hotplug media bay support · d58b0c39
      Benjamin Herrenschmidt 提交于
      The hotplug mediabay has tendrils deep into drivers/ide code
      which makes a libata port reather difficult. In addition it's
      ugly and could be done better.
      
      This reworks the interface between the mediabay and the rest
      of the world so that:
      
         - Any macio_driver can now have a mediabay_event callback
      which will be called when that driver sits on a mediabay and
      it's been either plugged or unplugged. The device type is
      passed as an argument. We can now move all the IDE cruft
      into the IDE driver itself
      
         - A check_media_bay() function can be used to take a peek
      at the type of device currently in the bay if any, a cleaner
      variant of the previous function with the same name.
      
         - A pair of lock/unlock functions are exposed to allow the
      IDE driver to block the hotplug callbacks during the initial
      setup and probing of the bay in order to avoid nasty race
      conditions.
      
         - The mediabay code no longer needs to spin on the status
      register of the IDE interface when it detects an IDE device,
      this is done just fine by the IDE code itself
      
      Overall, less code, simpler, and allows for another driver
      than our old drivers/ide based one.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d58b0c39
  13. 08 12月, 2009 4 次提交