1. 04 10月, 2006 1 次提交
  2. 30 9月, 2006 2 次提交
  3. 27 9月, 2006 2 次提交
  4. 26 9月, 2006 2 次提交
  5. 19 9月, 2006 1 次提交
    • L
      Revert mmiocfg heuristics and blacklist changes · 79e453d4
      Linus Torvalds 提交于
      This reverts commits 11012d41 and
      40dd2d20, which allowed us to use the
      MMIO accesses for PCI config cycles even without the area being marked
      reserved in the e820 memory tables.
      
      Those changes were needed for EFI-environment Intel macs, but broke some
      newer Intel 965 boards, so for now it's better to revert to our old
      2.6.17 behaviour and at least avoid introducing any new breakage.
      
      Andi Kleen has a set of patches that work with both EFI and the broken
      Intel 965 boards, which will be applied once they get wider testing.
      
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Edgar Hucek <hostmaster@ed-soft.at>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      79e453d4
  6. 18 9月, 2006 1 次提交
  7. 31 8月, 2006 1 次提交
  8. 01 8月, 2006 1 次提交
  9. 15 7月, 2006 1 次提交
  10. 04 7月, 2006 1 次提交
    • I
      [PATCH] lockdep: locking API self tests · cae2ed9a
      Ingo Molnar 提交于
      Introduce DEBUG_LOCKING_API_SELFTESTS, which uses the generic lock debugging
      code's silent-failure feature to run a matrix of testcases.  There are 210
      testcases currently:
      
        +-----------------------
        | Locking API testsuite:
        +------------------------------+------+------+------+------+------+------+
                                       | spin |wlock |rlock |mutex | wsem | rsem |
        -------------------------------+------+------+------+------+------+------+
                           A-A deadlock:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
                       A-B-B-A deadlock:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
                   A-B-B-C-C-A deadlock:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
                   A-B-C-A-B-C deadlock:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
               A-B-B-C-C-D-D-A deadlock:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
               A-B-C-D-B-D-D-A deadlock:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
               A-B-C-D-B-C-D-A deadlock:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
                          double unlock:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
                       bad unlock order:  ok  |  ok  |  ok  |  ok  |  ok  |  ok  |
        --------------------------------------+------+------+------+------+------+
                    recursive read-lock:             |  ok  |             |  ok  |
        --------------------------------------+------+------+------+------+------+
                      non-nested unlock:  ok  |  ok  |  ok  |  ok  |
        --------------------------------------+------+------+------+
           hard-irqs-on + irq-safe-A/12:  ok  |  ok  |  ok  |
           soft-irqs-on + irq-safe-A/12:  ok  |  ok  |  ok  |
           hard-irqs-on + irq-safe-A/21:  ok  |  ok  |  ok  |
           soft-irqs-on + irq-safe-A/21:  ok  |  ok  |  ok  |
             sirq-safe-A => hirqs-on/12:  ok  |  ok  |  ok  |
             sirq-safe-A => hirqs-on/21:  ok  |  ok  |  ok  |
               hard-safe-A + irqs-on/12:  ok  |  ok  |  ok  |
               soft-safe-A + irqs-on/12:  ok  |  ok  |  ok  |
               hard-safe-A + irqs-on/21:  ok  |  ok  |  ok  |
               soft-safe-A + irqs-on/21:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #1/123:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #1/123:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #1/132:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #1/132:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #1/213:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #1/213:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #1/231:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #1/231:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #1/312:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #1/312:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #1/321:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #1/321:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #2/123:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #2/123:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #2/132:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #2/132:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #2/213:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #2/213:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #2/231:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #2/231:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #2/312:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #2/312:  ok  |  ok  |  ok  |
          hard-safe-A + unsafe-B #2/321:  ok  |  ok  |  ok  |
          soft-safe-A + unsafe-B #2/321:  ok  |  ok  |  ok  |
            hard-irq lock-inversion/123:  ok  |  ok  |  ok  |
            soft-irq lock-inversion/123:  ok  |  ok  |  ok  |
            hard-irq lock-inversion/132:  ok  |  ok  |  ok  |
            soft-irq lock-inversion/132:  ok  |  ok  |  ok  |
            hard-irq lock-inversion/213:  ok  |  ok  |  ok  |
            soft-irq lock-inversion/213:  ok  |  ok  |  ok  |
            hard-irq lock-inversion/231:  ok  |  ok  |  ok  |
            soft-irq lock-inversion/231:  ok  |  ok  |  ok  |
            hard-irq lock-inversion/312:  ok  |  ok  |  ok  |
            soft-irq lock-inversion/312:  ok  |  ok  |  ok  |
            hard-irq lock-inversion/321:  ok  |  ok  |  ok  |
            soft-irq lock-inversion/321:  ok  |  ok  |  ok  |
            hard-irq read-recursion/123:  ok  |
            soft-irq read-recursion/123:  ok  |
            hard-irq read-recursion/132:  ok  |
            soft-irq read-recursion/132:  ok  |
            hard-irq read-recursion/213:  ok  |
            soft-irq read-recursion/213:  ok  |
            hard-irq read-recursion/231:  ok  |
            soft-irq read-recursion/231:  ok  |
            hard-irq read-recursion/312:  ok  |
            soft-irq read-recursion/312:  ok  |
            hard-irq read-recursion/321:  ok  |
            soft-irq read-recursion/321:  ok  |
        --------------------------------+-----+----------------
        Good, all 210 testcases passed! |
        --------------------------------+
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      cae2ed9a
  11. 29 6月, 2006 1 次提交
  12. 28 6月, 2006 1 次提交
    • I
      [PATCH] vdso: randomize the i386 vDSO by moving it into a vma · e6e5494c
      Ingo Molnar 提交于
      Move the i386 VDSO down into a vma and thus randomize it.
      
      Besides the security implications, this feature also helps debuggers, which
      can COW a vma-backed VDSO just like a normal DSO and can thus do
      single-stepping and other debugging features.
      
      It's good for hypervisors (Xen, VMWare) too, which typically live in the same
      high-mapped address space as the VDSO, hence whenever the VDSO is used, they
      get lots of guest pagefaults and have to fix such guest accesses up - which
      slows things down instead of speeding things up (the primary purpose of the
      VDSO).
      
      There's a new CONFIG_COMPAT_VDSO (default=y) option, which provides support
      for older glibcs that still rely on a prelinked high-mapped VDSO.  Newer
      distributions (using glibc 2.3.3 or later) can turn this option off.  Turning
      it off is also recommended for security reasons: attackers cannot use the
      predictable high-mapped VDSO page as syscall trampoline anymore.
      
      There is a new vdso=[0|1] boot option as well, and a runtime
      /proc/sys/vm/vdso_enabled sysctl switch, that allows the VDSO to be turned
      on/off.
      
      (This version of the VDSO-randomization patch also has working ELF
      coredumping, the previous patch crashed in the coredumping code.)
      
      This code is a combined work of the exec-shield VDSO randomization
      code and Gerd Hoffmann's hypervisor-centric VDSO patch. Rusty Russell
      started this patch and i completed it.
      
      [akpm@osdl.org: cleanups]
      [akpm@osdl.org: compile fix]
      [akpm@osdl.org: compile fix 2]
      [akpm@osdl.org: compile fix 3]
      [akpm@osdl.org: revernt MAXMEM change]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NArjan van de Ven <arjan@infradead.org>
      Cc: Gerd Hoffmann <kraxel@suse.de>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Zachary Amsden <zach@vmware.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: Jan Beulich <jbeulich@novell.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      e6e5494c
  13. 27 6月, 2006 3 次提交
  14. 18 6月, 2006 1 次提交
    • J
      [SECMARK]: Add new packet controls to SELinux · 4e5ab4cb
      James Morris 提交于
      Add new per-packet access controls to SELinux, replacing the old
      packet controls.
      
      Packets are labeled with the iptables SECMARK and CONNSECMARK targets,
      then security policy for the packets is enforced with these controls.
      
      To allow for a smooth transition to the new controls, the old code is
      still present, but not active by default.  To restore previous
      behavior, the old controls may be activated at runtime by writing a
      '1' to /selinux/compat_net, and also via the kernel boot parameter
      selinux_compat_net.  Switching between the network control models
      requires the security load_policy permission.  The old controls will
      probably eventually be removed and any continued use is discouraged.
      
      With this patch, the new secmark controls for SElinux are disabled by
      default, so existing behavior is entirely preserved, and the user is
      not affected at all.
      
      It also provides a config option to enable the secmark controls by
      default (which can always be overridden at boot and runtime).  It is
      also noted in the kconfig help that the user will need updated
      userspace if enabling secmark controls for SELinux and that they'll
      probably need the SECMARK and CONNMARK targets, and conntrack protocol
      helpers, although such decisions are beyond the scope of kernel
      configuration.
      Signed-off-by: NJames Morris <jmorris@namei.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4e5ab4cb
  15. 01 4月, 2006 4 次提交
  16. 31 3月, 2006 1 次提交
    • L
      [ACPI] document cmdline acpi_os_name= · a1f9e65e
      Len Brown 提交于
      This can sometimes be used to work around broken BIOS.
      Use "Microsoft Windows" to take the same path
      through the BIOS as Windows98 would.
      
      The default is "Microsoft Windows NT", which
      is what NT and later versions of Windows use,
      and is the most tested path through most BIOS.
      
      Set it to anything else, including "Linux", at your
      own risk, as it seems that virtually no BIOS
      has been tested with anything but the two options above.
      
      Note that this uses the legacy _OS interface, so
      we don't expect this to ever change.
      Signed-off-by: NLen Brown <len.brown@intel.com>
      a1f9e65e
  17. 26 3月, 2006 1 次提交
  18. 24 3月, 2006 1 次提交
  19. 23 3月, 2006 2 次提交
  20. 09 3月, 2006 2 次提交
    • A
      [PATCH] i386: port ATI timer fix from x86_64 to i386 II · f9262c12
      Andi Kleen 提交于
      ATI chipsets tend to generate double timer interrupts for the local APIC
      timer when both the 8254 and the IO-APIC timer pins are enabled.  This is
      because they route it to both and the result is anded together and the CPU
      ends up processing it twice.
      
      This patch changes check_timer to disable the 8254 routing for interrupt 0.
      
      I think it would be safe on all chipsets actually (i tested it on a couple
      and it worked everywhere) and Windows seems to do it in a similar way, but
      to be conservative this patch only enables this mode on ATI (and adds
      options to enable/disable too)
      
      Ported over from a similar x86-64 change.
      
      I reused the ACPI earlyquirk infrastructure for the ATI bridge check, but
      tweaked it a bit to work even without ACPI.
      
      Inspired by a patch from Chuck Ebbert, but redone.
      
      Cc: Chuck Ebbert <76306.1226@compuserve.com>
      Cc: "Brown, Len" <len.brown@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      f9262c12
    • D
      [PATCH] rcu batch tuning · 21a1ea9e
      Dipankar Sarma 提交于
      This patch adds new tunables for RCU queue and finished batches.  There are
      two types of controls - number of completed RCU updates invoked in a batch
      (blimit) and monitoring for high rate of incoming RCUs on a cpu (qhimark,
      qlowmark).
      
      By default, the per-cpu batch limit is set to a small value.  If the input
      RCU rate exceeds the high watermark, we do two things - force quiescent
      state on all cpus and set the batch limit of the CPU to INTMAX.  Setting
      batch limit to INTMAX forces all finished RCUs to be processed in one shot.
       If we have more than INTMAX RCUs queued up, then we have bigger problems
      anyway.  Once the incoming queued RCUs fall below the low watermark, the
      batch limit is set to the default.
      Signed-off-by: NDipankar Sarma <dipankar@in.ibm.com>
      Cc: "Paul E. McKenney" <paulmck@us.ibm.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      21a1ea9e
  21. 28 2月, 2006 1 次提交
  22. 18 2月, 2006 1 次提交
  23. 16 2月, 2006 1 次提交
  24. 15 1月, 2006 2 次提交
  25. 13 1月, 2006 1 次提交
    • A
      [PATCH] scheduler cache-hot-autodetect · 198e2f18
      akpm@osdl.org 提交于
      )
      
      From: Ingo Molnar <mingo@elte.hu>
      
      This is the latest version of the scheduler cache-hot-auto-tune patch.
      
      The first problem was that detection time scaled with O(N^2), which is
      unacceptable on larger SMP and NUMA systems. To solve this:
      
      - I've added a 'domain distance' function, which is used to cache
        measurement results. Each distance is only measured once. This means
        that e.g. on NUMA distances of 0, 1 and 2 might be measured, on HT
        distances 0 and 1, and on SMP distance 0 is measured. The code walks
        the domain tree to determine the distance, so it automatically follows
        whatever hierarchy an architecture sets up. This cuts down on the boot
        time significantly and removes the O(N^2) limit. The only assumption
        is that migration costs can be expressed as a function of domain
        distance - this covers the overwhelming majority of existing systems,
        and is a good guess even for more assymetric systems.
      
        [ People hacking systems that have assymetries that break this
          assumption (e.g. different CPU speeds) should experiment a bit with
          the cpu_distance() function. Adding a ->migration_distance factor to
          the domain structure would be one possible solution - but lets first
          see the problem systems, if they exist at all. Lets not overdesign. ]
      
      Another problem was that only a single cache-size was used for measuring
      the cost of migration, and most architectures didnt set that variable
      up. Furthermore, a single cache-size does not fit NUMA hierarchies with
      L3 caches and does not fit HT setups, where different CPUs will often
      have different 'effective cache sizes'. To solve this problem:
      
      - Instead of relying on a single cache-size provided by the platform and
        sticking to it, the code now auto-detects the 'effective migration
        cost' between two measured CPUs, via iterating through a wide range of
        cachesizes. The code searches for the maximum migration cost, which
        occurs when the working set of the test-workload falls just below the
        'effective cache size'. I.e. real-life optimized search is done for
        the maximum migration cost, between two real CPUs.
      
        This, amongst other things, has the positive effect hat if e.g. two
        CPUs share a L2/L3 cache, a different (and accurate) migration cost
        will be found than between two CPUs on the same system that dont share
        any caches.
      
      (The reliable measurement of migration costs is tricky - see the source
      for details.)
      
      Furthermore i've added various boot-time options to override/tune
      migration behavior.
      
      Firstly, there's a blanket override for autodetection:
      
      	migration_cost=1000,2000,3000
      
      will override the depth 0/1/2 values with 1msec/2msec/3msec values.
      
      Secondly, there's a global factor that can be used to increase (or
      decrease) the autodetected values:
      
      	migration_factor=120
      
      will increase the autodetected values by 20%. This option is useful to
      tune things in a workload-dependent way - e.g. if a workload is
      cache-insensitive then CPU utilization can be maximized by specifying
      migration_factor=0.
      
      I've tested the autodetection code quite extensively on x86, on 3
      P3/Xeon/2MB, and the autodetected values look pretty good:
      
      Dual Celeron (128K L2 cache):
      
       ---------------------
       migration cost matrix (max_cache_size: 131072, cpu: 467 MHz):
       ---------------------
                 [00]    [01]
       [00]:     -     1.7(1)
       [01]:   1.7(1)    -
       ---------------------
       cacheflush times [2]: 0.0 (0) 1.7 (1784008)
       ---------------------
      
      Here the slow memory subsystem dominates system performance, and even
      though caches are small, the migration cost is 1.7 msecs.
      
      Dual HT P4 (512K L2 cache):
      
       ---------------------
       migration cost matrix (max_cache_size: 524288, cpu: 2379 MHz):
       ---------------------
                 [00]    [01]    [02]    [03]
       [00]:     -     0.4(1)  0.0(0)  0.4(1)
       [01]:   0.4(1)    -     0.4(1)  0.0(0)
       [02]:   0.0(0)  0.4(1)    -     0.4(1)
       [03]:   0.4(1)  0.0(0)  0.4(1)    -
       ---------------------
       cacheflush times [2]: 0.0 (33900) 0.4 (448514)
       ---------------------
      
      Here it can be seen that there is no migration cost between two HT
      siblings (CPU#0/2 and CPU#1/3 are separate physical CPUs). A fast memory
      system makes inter-physical-CPU migration pretty cheap: 0.4 msecs.
      
      8-way P3/Xeon [2MB L2 cache]:
      
       ---------------------
       migration cost matrix (max_cache_size: 2097152, cpu: 700 MHz):
       ---------------------
                 [00]    [01]    [02]    [03]    [04]    [05]    [06]    [07]
       [00]:     -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
       [01]:  19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
       [02]:  19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
       [03]:  19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1)
       [04]:  19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1)
       [05]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1)
       [06]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1)
       [07]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -
       ---------------------
       cacheflush times [2]: 0.0 (0) 19.2 (19281756)
       ---------------------
      
      This one has huge caches and a relatively slow memory subsystem - so the
      migration cost is 19 msecs.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Signed-off-by: NKen Chen <kenneth.w.chen@intel.com>
      Cc: <wilder@us.ibm.com>
      Signed-off-by: NJohn Hawkes <hawkes@sgi.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      198e2f18
  26. 11 1月, 2006 2 次提交
  27. 08 1月, 2006 1 次提交
    • D
      [SERIAL] Make the number of UARTs registered configurable. · a61c2d78
      Dave Jones 提交于
      Also add a nr_uarts module option to the 8250 code to override
      this, up to a maximum of CONFIG_SERIAL_8250_NR_UARTS
      
      This should appease people who complain about a proliferation
      of /dev/ttyS & /sysfs nodes whilst at the same time allowing
      a single kernel image to support the rarer occasions of
      lots of devices.
      Signed-off-by: NDave Jones <davej@redhat.com>
      a61c2d78
  28. 07 1月, 2006 1 次提交