The shift operator used here to convert from bytes to 32-bit words is
backwards.
Signed-off-by: NDavid Hunter <hunterd42@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Symptom:
device_suspend(): mtd_cls_suspend+0x0/0x58 returns -11
PM: Device mtd14 failed to suspend: error -11
PM: Some devices failed to suspend

This patch enables other chips to be suspended if the active chip of
the controller has been suspended.
Signed-off-by: NJin Qing <b24347@freescale.com>
Signed-off-by: NLi Yang <leoli@freescale.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

SST 39VF160x/39VF320x and some old SST chips need a special command
sequence to enter CFI QueRY mode [1].
This patch adds the relevant sequence to cfi_qry_mode_on().
Tested with 39VF3201.
Signed-off-by: NGuillaume LECERF <glecerf@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This one sits in my tree for more than two years...
Using device code found on page 12 (http://www.btdesigner.com/pdfs/M29W800D.pdf)
and unlock address from page 15 MTD subsytem happily detects ST M29W800DB
in 16-bit mode. I do believe original author used only 8-bit mode and thus
didn't hit this bug.
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Non MM subsystem must not use PF_MEMALLOC. Memory reclaim need few
memory, anyone must not prevent it. Otherwise the system cause
mysterious hang-up and/or OOM Killer invokation.
Signed-off-by: NKOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The existing NAND infrastructure allows the default main and
mirror bad block tables to be overridden in nand_default_bbt().
However, the davinci_nand driver does not support this.  Add
that support by adding fields to the davinci driver's platform
data so platform code can pass in their own bbt's and make the
davinci_nand driver honor them.
Signed-off-by: NMark A. Greer <mgreer@mvista.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

CAT25 chips (as manufactured by On Semiconductor, previously Catalyst
Semiconductor) are similar to the original M25Px0 chips, except:

- Address width can vary (1-2 bytes, in contrast to 3 bytes in M25P
  chips). So, implement convenient m25p_addr2cmd() and m25p_cmdsz()
  calls, and place address width information into flash_info struct;

- Page size can vary, therefore we shouldn't hardcode it, so get rid
  of FLASH_PAGESIZE definition, and place the page size information
  into flash_info struct;

- CAT25 EEPROMs don't need to be erased, so add NO_ERASE flag, and
  propagate it to the mtd subsystem.

[dwmw2: Fix up for conflicts with DMA safety patch]
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Previosly the driver always tried JEDEC probing, assuming that non-JEDEC
chips will return '0'. But truly non-JEDEC chips (like CAT25) won't do
that, their behaviour on RDID command is undefined, so the driver should
not call jedec_probe() for these chips.

Also, be less strict on error conditions, don't fail to probe if JEDEC
found a chip that is different from what platform code told, instead
just print some warnings and use an information obtained via JEDEC. In
that case we should not trust partitions any longer, but they might be
still useful (i.e. they could protect some parts of the chip).
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch converts the m25p80 driver so that now it uses .id_table
for device matching, making it properly detect devices on OpenFirmware
platforms (prior to this patch the driver misdetected non-JEDEC chips,
seeing all chips as "m25p80").

Also, now jedec_probe() only does jedec probing, nothing else. If it
is not able to detect a chip, NULL is returned and the driver fall
backs to the information specified by the platform (platform_data, or
exact ID).
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The mtd_pagetest test did not initialize the pgsize variable, which
basically means it did not work. This problem was reported by
Török Edwin <edwintorok@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The function mxcnd_remove is defined using __devexit, so don't use
__exit_p but __devexit_p to wrap it.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The function excite_nand_remove is used only wrapped by __devexit_p so
define it using __devexit.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

MAX_SUMMARY_SIZE was meant as a limit, not as a minimum
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Erase-suspend for writing is required to avoid blocking applications
that wish to write some data (to a NOR block other than the one being
erased). Particularly, it solves some huge delays that an application
(which writes to a UBIFS) will experience if UBI attaches to empty NOR
flash. In this case the UBI background thread will erase a lot of blocks
and the application can be blocked for minutes because of the "MTD/CFI
chip lock".

This feature has been disabled for years. Maybe this was because the old
code turned it on for erase-suspend read-only chips also
(cfip->EraseSuspend & 0x1). This is wrong and corrected now.

This patch was tweaked by Norbert van Bolhuis.
Signed-off-by: NNorbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

We want error information even if the kernel hasn't been built for verbose
debugging.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Currently, the program and erase sequences do not wait for completion,
instead relying on a subsequent waitfunc() callback.  However, this causes
the chipselect to be deasserted while the NAND chip is still asserting the
busy pin, which can corrupt activity on other chipselects.

This patch switches to using the sequences recommended by the manual,
in which a wait is performed within the initial command sequence.  We can
now re-use the status byte from the initial command sequence, rather than
having to do another status read in the waitfunc.

Since we're already touching the command sequences, it also cleans up some
cruft in SEQIN that isn't needed since we cannot program partial pages
outside of OOB.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Reported-by: NSuchit Lepcha <suchit.lepcha@freescale.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

When a NAND operation is in progress, all other localbus operations
(including NOR flash) will have to wait for access to the bus.  However, the
NAND operation may take longer to complete than the default timeout.  Thus,
if NOR is accessed while a NAND operation is in progress, the NAND operation
will fail.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The returned error should stay negative
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Return a negative error value instead of a positive
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch moves the MANUFACTURER_ST and MANUFACTURER_INTEL to the
include/linux/mtd/cfi.h header file and renames them to CFI_MFR_ST and
CFI_MFR_INTEL. CFI_MFR_ST was already present there.

All references in drivers/mtd/chips/cfi_cmdset_0001.c are updated to reflect
this.
Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Acked-by: NNicolas Pitre <nico@fluxnic.net>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch sets the MTD_POWERUP_LOCK flag for AT49BV640D and AT49BV640DT
devices, since the devices are locked when powered up and needs to be unlocked
before interfaced.

Quote datasheet; "At power-up and reset, all sectors have their Softlock
protection mode enabled.".

Tested on AVR32 hardware platform with an AT49BV640D flash device.
Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Acked-by: NNicolas Pitre <nico@fluxnic.net>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The index is signed, make sure it is not negative
when we read the array element.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

spi_write() requires the buffer to be DMA-safe, kmalloc()
it seperately to ensure this.
Signed-off-by: NJohannes Stezenbach <js@sig21.net>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Update the nand information passed to the core from the platform data to
setup the initial option value, so that flags such as NAND_SCAN_SILENT_NODEV
can pass through.
Signed-off-by: NBen Dooks <ben@simtec.co.uk>
Signed-off-by: NSimtec Linux Team <linux@simtec.co.uk>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add NAND_SCAN_SILENT_NODEV to chip->options to the user-worrying messages
'No NAND device found!!!'. This message often worries users (was three
exclamation marks really necessary?) and especially in systems such as the
Simtec Osiris where there may be optional NAND devices which are not
known until probe time.

Revised version of the original NAND_PROBE_SPECULATIVE patch after comments
by Artem Bityutskiy about adding a whole new call.
Signed-off-by: NBen Dooks <ben@simtec.co.uk>
Signed-off-by: NSimtec Linux Team <linux@simtec.co.uk>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch fixes memory leak on chip->bbt and chip->buffers.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Use the resource_size inline function instead of manually calculating
the resource size. This reduces the chance of introducing off-by-one
errors.
Signed-off-by: NTobias Klauser <tklauser@distanz.ch>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This is a quick and dirty patch to add panic_write for NAND flashes. The
patch seems to work OK on my CRIS board running a 2.6.26 kernel with a
ID: 0x20, Chip ID: 0xf1 (ST Micro NAND 128MiB 3,3V 8-bit), and also on a
OpenRD base (Marvell Kirkwood) board with a Toshiba NAND 512MiB 3,3V
8-bit flash with 2.6.32-pre1.
Signed-off-by: NEdgar E. Iglesias <edgar@axis.com>
Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NMika Korhonen <ext-mika.2.korhonen@nokia.com>
Reviewed-by: NAdrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add support for multiblock erase command. OneNANDs (excluding Flex-OneNAND)
are capable of simultaneous erase of up to 64 eraseblocks which is much faster.

This changes the erase requests for regions covering multiple eraseblocks
to be performed using multiblock erase.
Signed-off-by: NMika Korhonen <ext-mika.2.korhonen@nokia.com>
Reviewed-by: NAdrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Separate the actual execution of erase to a new function:
onenand_block_by_block_erase(). This is done in preparation for
the multiblock erase support.
Signed-off-by: NMika Korhonen <ext-mika.2.korhonen@nokia.com>
Reviewed-by: NAdrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This module tests NAND ECC functions.

The test is simple.

1. Create a 256 or 512 bytes block of data filled with random bytes (data)
2. Duplicate the data block and inject single bit error (error_data)
3. Try to correct error_data
4. Compare data and error_data
Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
Acked-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add __nand_calculate_ecc() which does not take struct mtd_info.
The built-in 256/512 software ECC calculation and correction tester
will use it.
Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
Acked-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

What is OTP in OneNAND?
The device includes,
1. one block-sized OTP (One Time Programmable) area and
2. user-controlled 1st block OTP(Block 0)
that can be used to increase system security or to provide
identification capabilities.

What is done?
In OneNAND, one block of the NAND Array is set aside as an OTP
memory area, and 1st Block (Block 0) can be used as OTP area.
This area, available to the user, can be configured and locked
with secured user information. The OTP block can be read,
programmed and locked using the same operations as any other NAND
Flash Array memory block. After issuing an OTP-Lock, OTP block
cannot be erased. OTP block is fully-guaranteed to be a good
block.

Why it is done?
Locking the 1st Block OTP has the effect of a 'Write-protect' to
guard against accidental re-programming of data stored in the 1st
block and OTP Block.

Which problem it solves?
OTP support is provided in the existing implementation of
OneNAND/Flex-OneNAND driver, but it is not working with OneNAND
devices. Have observed the following in current OTP OneNAND Implmentation,
1. DataSheet specific sequence to lock the OTP Area is not followed.
2. Certain functions are quiet generic to cope with OTP specific activity.
This patch re-implements OTP support for OneNAND device.

How it is done?
For all blocks, 8th word is available to the user.
However, in case of OTP Block, 8th word of sector 0, page 0 is reserved as
OTP Locking Bit area. Therefore, in case of OTP Block, user usage on this
area is prohibited. Condition specific values are entered in the 8th word,
sector0, page 0 of the OTP block during the process of issuing an OTP-Lock.
The possible conditions are:
1. Only 1st Block Lock
2. Only OTP Block Lock
3. Lock both the 1st Block and the OTP Block

What Other feature additions have been done in this patch?
This patch adds feature for:
1. Only 1st Block Lock
2. Lock both the 1st Block and the OTP Blocks

Re-implemented OTP support for OneNAND
Added following features to OneNAND
	1. Lock only 1st Block in OneNAND
	2. Lock BOTH 1st Block and OTP Block in OneNAND

[comments were slightly tweaked by Artem]
Signed-off-by: NAmul Kumar Saha <amul.saha@samsung.com>
Reviewed-by: NAdrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Use hweight_long instead of Brian Kernighan's/Peter Wegner's method
Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Commit 4b56ffca ("mtd: Fix kernel NULL
pointer dereference in physmap.c") introduced a couple of bugs.

It neglected to run the loop of map_destroy() calls in
physmap_flash_remove(), if !info->cmtd, which would happen if that
function was called to clean up errors during probe.

It also failed to compile if CONFIG_MTD_PARTITIONS was not defined.
Reported-By: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This reverts commit 71b7d0d9.

The problem which that commit attempted to fix was a bootloader issue,
which had been misunderstood. The 'fix' causes lots of false bad blocks
for existing users with sane firmware.

Thanks to Mathieu Berland for diagnosing the problem coherently.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

In register_mtd_blktrans(), the symbol 'ret' is already declared
as an int at the start of the function.  The inner loop declaration
is unnecessary.  Quiets the following sparse warning:

  warning: symbol 'ret' shadows an earlier one
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>