- 31 1月, 2012 2 次提交
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由 Francois Romieu 提交于
- atomic bit operations are globally visible - pending status is always cleared before execution - scheduled works are either idempotent or only required to happen once after a series of originating events, say link events for instance Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Suggested-by: NMichał Mirosław <mirqus@gmail.com> Cc: Hayes Wang <hayeswang@realtek.com>
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由 Francois Romieu 提交于
With infinite gratitude to Eric Dumazet for allowing me to identify the error. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Acked-by: NEric Dumazet <eric.dumazet@gmail.com> Cc: Hayes Wang <hayeswang@realtek.com>
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- 28 1月, 2012 2 次提交
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由 Francois Romieu 提交于
The irq handler was a mess. See 7ab87ff4 ("via-rhine: move work from irq handler to softirq and beyond") for similar changes. One can notice: - all non-napi tasks are explicitely scheduled trough a single work queue. - hiding software tx queue start behind the rtl_hw_start method is mildly natural. Move it in the caller where needed. - as can be seen from the heavy use of bh disabling locks, the driver is not safe for irq context messages with netconsole. It is still quite usable for general messaging though. Tested ok with concurrent registers dump (ethtool -d) + background traffic + "echo t > /proc/sysrq-trigger". Tested with old PCI chipset, PCIe 8168 and 810x: - XID 0c900800 RTL8168evl/8111evl - XID 18000000 RTL8168b/8111b - XID 98000000 RTL8169sc/8110sc - XID 083000c0 RTL8168d/8111d - XID 081000c0 RTL8168d/8111d - XID 00b00000 RTL8105e - XID 04a00000 RTL8102e As a side note, the comments in f11a377b ("r8169: avoid losing MSI interrupts") does not seem completely clear: if I hack the driver further to stop acking the irq link event bit, MSI interrupts keep being delivered (RTL8168b/8111b, XID 18000000). Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com>
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- 27 1月, 2012 5 次提交
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com>
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由 Francois Romieu 提交于
Though motivated by the move of the driver to a single work queue of sequential events and removal of hard irq processing, it looks safe as a standalone change. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com>
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由 Francois Romieu 提交于
I see no good reason to keep both rtl8169_reinit_task and rtl8169_reset_task: - rtl8169_reinit_task adds a software failure point which does relate to any hardware state - they handle hardware the same. Remember that rtl8169_reinit_task was introduced in the 8169 only era to handle PCI errors way before the 8168 asked for pll and firmware ops and compare : rtl8169_reinit_task | rtl8169_reset_task ----------------------------+-------------------------- rtl8169_wait_for_quiescence | rtl8169_hw_reset rtl8169_update_counters | rtl8169_wait_for_quiescence rtl8169_hw_reset | rtl_hw_start rtl8169_rx_missed | rtl8169_check_link_status rtl_pll_power_down | rtl_request_firmware | rtl8169_init_phy | rtl_pll_power_up | rtl_hw_start | rtl8169_check_link_status | Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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- 20 12月, 2011 1 次提交
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由 françois romieu 提交于
The MSIEnable bit is only available for the 8169. Avoid Config2 writes for the post-8169 8168 and 810x. Reported-by: NSu Kang Yin <cantona@cantona.net> Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 12月, 2011 2 次提交
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由 françois romieu 提交于
Since 92fc43b4, rtl8169_tx_timeout ends up resetting Rx and Tx indexes and thus racing with the NAPI handler via -> rtl8169_hw_reset -> rtl_hw_reset -> rtl8169_init_ring_indexes What about returning to the original state ? rtl_hw_reset is only used by rtl8169_hw_reset and rtl8169_init_one. The latter does not need rtl8169_init_ring_indexes because the indexes still contain their original values from the newly allocated network device private data area (i.e. 0). rtl8169_hw_reset is used by: 1. rtl8169_down Helper for rtl8169_close. rtl8169_open explicitely inits the indexes anyway. 2. rtl8169_pcierr_interrupt Indexes are set by rtl8169_reinit_task. 3. rtl8169_interrupt rtl8169_hw_reset is needed when the device goes down. See 1. 4. rtl_shutdown System shutdown handler. Indexes are irrelevant. 5. rtl8169_reset_task Indexes must be set before rtl_hw_start is called. 6. rtl8169_tx_timeout Indexes should not be set. This is the job of rtl8169_reset_task anyway. The removal of rtl8169_hw_reset in rtl8169_tx_timeout and its move in rtl8169_reset_task do not change the analysis. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: hayeswang <hayeswang@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 françois romieu 提交于
Realtek has specified that the post 8168c gigabit chips and the post 8105e fast ethernet chips recover automatically from a Rx FIFO overflow. The driver does not need to clear the RxFIFOOver bit of IntrStatus and it should rather avoid messing it. The implementation deserves some explanation: 1. events outside of the intr_event bit mask are now ignored. It enforces a no-processing policy for the events that either should not be there or should be ignored. 2. RxFIFOOver was already ignored in rtl_cfg_infos[RTL_CFG_1] for the whole 8168 line of chips with two exceptions: - RTL_GIGA_MAC_VER_22 since b5ba6d12 ("use RxFIFO overflow workaround for 8168c chipset."). This one should now be correctly handled. - RTL_GIGA_MAC_VER_11 (8168b) which requires a different Rx FIFO overflow processing. Though it does not conform to Realtek suggestion above, the updated driver includes no change for RTL_GIGA_MAC_VER_12 and RTL_GIGA_MAC_VER_17. Both are 8168b. RTL_GIGA_MAC_VER_12 is common and a bit old so I'd rather wait for experimental evidence that the change suggested by Realtek really helps or does not hurt in unexpected ways. Removed case statements in rtl8169_interrupt are only 8168 relevant. 3. RxFIFOOver is masked for post 8105e 810x chips, namely the sole 8105e (RTL_GIGA_MAC_VER_30) itself. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: hayeswang <hayeswang@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 11月, 2011 1 次提交
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由 Rick Jones 提交于
Round-up some wayward "N/A" fw_version dust bunnies as part of that clean-up. Signed-off-by: NRick Jones <rick.jones2@hp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 11月, 2011 2 次提交
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由 Joe Perches 提交于
Reduce the number of #defines, use the normal #define from if_ether.h Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michał Mirosław 提交于
v2: add couple missing conversions in drivers split unexporting netdev_fix_features() implemented %pNF convert sock::sk_route_(no?)caps Signed-off-by: NMichał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 11月, 2011 2 次提交
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由 Rick Jones 提交于
Per the mention made by Ben Hutchings that strlcpy is now the preferred string copy routine for a .get_drvinfo routine, do a bit of floor sweeping and convert some of the as-yet unconverted ethernet drivers to it. Signed-off-by: NRick Jones <rick.jones2@hp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 hayeswang 提交于
The link down would occur when reseting PHY. And it would take about 2 ~ 5 seconds from link down to link up. If the delay of pm_schedule_suspend is not long enough, the device would enter runtime_suspend before link up. After link up, the device would wake up and reset PHY again. Then, you would find the driver keep in a loop of runtime_suspend and rumtime_resume. Signed-off-by: NHayes Wang <hayeswang@realtek.com> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 10月, 2011 1 次提交
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由 Eric Dumazet 提交于
To ease skb->truesize sanitization, its better to be able to localize all references to skb frags size. Define accessors : skb_frag_size() to fetch frag size, and skb_frag_size_{set|add|sub}() to manipulate it. Signed-off-by: NEric Dumazet <eric.dumazet@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 9月, 2011 4 次提交
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由 Francois Romieu 提交于
- fix features : jumbo frames and checksumming can not be used at the same time. - introduce hw_jumbo_{enable / disable} helpers. Their content has been creatively extracted from Realtek's own drivers. As an illustration, it would be nice to know how/if the MaxTxPacketSize register operates when the device can work with a 9k jumbo frame as its documentation (8168c) can not be applied beyond ~7k. - rtl_tx_performance_tweak is moved forward. No change. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Francois Romieu 提交于
8168d and above allow jumbo frames beyond 8k. Bump the received packet length check before enabling jumbo frames on these chipsets. Frame length indication covers bits 0..13 of the first Rx descriptor 32 bits for the 8169 and 8168. I only have authoritative documentation for the allowed use of the extra (13) bit with the 8169 and 8168c. Realtek's drivers use the same mask for the 816x and the fast ethernet only 810x. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Hayes Wang 提交于
Support new chips of RTL8111F. Signed-off-by: NHayes Wang <hayeswang@realtek.com>
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由 Hayes Wang 提交于
For RTL8111EVL, the register of MaxTxPacketSize doesn't acctually limit the tx size. It influnces the feature of early tx. Signed-off-by: NHayes Wang <hayeswang@realtek.com>
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- 16 9月, 2011 1 次提交
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由 Ian Campbell 提交于
Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Cc: Realtek linux nic maintainers <nic_swsd@realtek.com> Cc: Francois Romieu <romieu@fr.zoreil.com> Cc: netdev@vger.kernel.org Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 8月, 2011 1 次提交
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由 Jiri Pirko 提交于
replace it by ndo_set_rx_mode Signed-off-by: NJiri Pirko <jpirko@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 8月, 2011 1 次提交
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由 Jeff Kirsher 提交于
Move the Realtek drivers into drivers/net/ethernet/realtek/ and make the necessary Kconfig and Makefile changes. CC: Realtek linux nic maintainers <nic_swsd@realtek.com> CC: Francois Romieu <romieu@fr.zoreil.com> CC: Jeff Garzik <jgarzik@pobox.com> CC: Donald Becker <becker@scyld.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 03 8月, 2011 1 次提交
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由 françois romieu 提交于
Addresses https://bugzilla.kernel.org/show_bug.cgi?id=39252 Hayes suggested that the usual MAC{0, 4} register writes be completed with writes to extended GigaMAC registers : - 0xe0 .. 0xe5 - 0xf2 .. 0xf7 Registers 0xf0 and 0xf1 should be set to 0. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 7月, 2011 1 次提交
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由 Lennart Sorensen 提交于
The D-Link DGE-530T rev C1 is a re-badged Realtek 8169 named DLG10028C, unlike the previous revisions which were skge based. It is probably the same as the discontinued DGE-528T (0x4300) other than the PCI ID. The PCI ID is 0x1186:0x4302. Adding it to r8169.c where 0x1186:0x4300 is already found makes the card be detected and work. This fixes https://bugzilla.kernel.org/show_bug.cgi?id=38862Signed-off-by: NLen Sorensen <lsorense@csclub.uwaterloo.ca> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 7月, 2011 1 次提交
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由 Sergei Shtylyov 提交于
The driver reads PCI subsystem IDs from the PCI configuration registers while they are already stored by the PCI subsystem in the 'subsystem_{vendor|device}' fields of 'struct pci_dev'... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 7月, 2011 1 次提交
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由 Phil Carmody 提交于
All these are instances of #define NAME value; or #define NAME(params_opt) value; These of course fail to build when used in contexts like if(foo $OP NAME) while(bar $OP NAME) and may silently generate the wrong code in contexts such as foo = NAME + 1; /* foo = value; + 1; */ bar = NAME - 1; /* bar = value; - 1; */ baz = NAME & quux; /* baz = value; & quux; */ Reported on comp.lang.c, Message-ID: <ab0d55fe-25e5-482b-811e-c475aa6065c3@c29g2000yqd.googlegroups.com> Initial analysis of the dangers provided by Keith Thompson in that thread. There are many more instances of more complicated macros having unnecessary trailing semicolons, but this pile seems to be all of the cases of simple values suffering from the problem. (Thus things that are likely to be found in one of the contexts above, more complicated ones aren't.) Signed-off-by: NPhil Carmody <ext-phil.2.carmody@nokia.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 19 7月, 2011 1 次提交
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由 Francois Romieu 提交于
e542a226 (r8169: adjust the RxConfig settings) broke the return from promiscuous mode to physical address match mode. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Signed-off-by: Hayes Wang <hayeswang@realtek.com>
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- 15 7月, 2011 7 次提交
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由 Hayes Wang 提交于
Set the init value before reset in probe function. And then just modify the relative bits and keep the init settings. For 8110S, 8110SB, and 8110SC series, the initial value of RxConfig needs to be set after the tx/rx is enabled. Signed-off-by: NHayes Wang <hayeswang@realtek.com> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Hayes Wang 提交于
Only 8111b needs to enable rx when shutdowning with WoL. Signed-off-by: NHayes Wang <hayeswang@realtek.com> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Hayes Wang 提交于
Only 8111E needs enable RxConfig bit 0 ~ 3 when suspending or shutdowning for wake on lan. Signed-off-by: NHayes Wang <hayeswang@realtek.com> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Hayes Wang 提交于
Signed-off-by: NHayes Wang <hayeswang@realtek.com> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Hayes Wang 提交于
Add the ERI functions which would be used by the new chips. Signed-off-by: NHayes Wang <hayeswang@realtek.com> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Hayes Wang 提交于
- Disable tx and rx by resetting hw, so replace rtl8169_asic_down with rtl8169_hw_reset. - RxConfig bits 0 ~ 5 have to be cleared before hw reset to avoid receiving spurious data. - Certain chips need to do some checking before reset. - Remove hw reset which is done before hw_start. It is done in close, down or device probe functions. - Move rtl8169_init_ring_indexes function into rtl_hw_reset function. The indexes of tx and rx only need to be zero when the hw resets. Signed-off-by: NHayes Wang <hayeswang@realtek.com> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Hayes Wang 提交于
Define new registers and modify some existing ones. Signed-off-by: NHayes Wang <hayeswang@realtek.com> Acked-by: NFrancois Romieu <romieu@fr.zoreil.com>
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- 28 6月, 2011 1 次提交
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由 Jon Mason 提交于
The PCIE capability offset is saved during PCI bus walking. Use the value from pci_dev instead of checking in the driver and saving it off the the driver specific structure. Also, it will remove an unnecessary search in the PCI configuration space if this value is referenced instead of reacquiring it. Signed-off-by: NJon Mason <jdmason@kudzu.us> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 6月, 2011 1 次提交
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Realtek linux nic maintainers <nic_swsd@realtek.com>
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- 18 6月, 2011 1 次提交
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由 Francois Romieu 提交于
Firmware checking is only performed when the firmware is loaded instead of each time the driver inits the phy. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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