1. 13 12月, 2008 1 次提交
    • R
      cpumask: centralize cpu_online_map and cpu_possible_map · 98a79d6a
      Rusty Russell 提交于
      Impact: cleanup
      
      Each SMP arch defines these themselves.  Move them to a central
      location.
      
      Twists:
      1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
         CONFIG_INIT_ALL_POSSIBLE for this rather than break them.
      
      2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
         Those archs simply have phys_cpu_present_map replaced everywhere.
      
      3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
         so I just manipulate them both in sync.
      
      4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
         declarations.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      Reviewed-by: NGrant Grundler <grundler@parisc-linux.org>
      Tested-by: NTony Luck <tony.luck@intel.com>
      Acked-by: NIngo Molnar <mingo@elte.hu>
      Cc: Mike Travis <travis@sgi.com>
      Cc: ink@jurassic.park.msu.ru
      Cc: rmk@arm.linux.org.uk
      Cc: starvik@axis.com
      Cc: tony.luck@intel.com
      Cc: takata@linux-m32r.org
      Cc: ralf@linux-mips.org
      Cc: grundler@parisc-linux.org
      Cc: paulus@samba.org
      Cc: schwidefsky@de.ibm.com
      Cc: lethal@linux-sh.org
      Cc: wli@holomorphy.com
      Cc: davem@davemloft.net
      Cc: jdike@addtoit.com
      Cc: mingo@redhat.com
      98a79d6a
  2. 11 9月, 2008 1 次提交
  3. 09 9月, 2008 1 次提交
    • M
      kernel/cpu.c: create a CPU_STARTING cpu_chain notifier · e545a614
      Manfred Spraul 提交于
      Right now, there is no notifier that is called on a new cpu, before the new
      cpu begins processing interrupts/softirqs.
      Various kernel function would need that notification, e.g. kvm works around
      by calling smp_call_function_single(), rcu polls cpu_online_map.
      
      The patch adds a CPU_STARTING notification. It also adds a helper function
      that sends the message to all cpu_chain handlers.
      
      Tested on x86-64.
      All other archs are untested. Especially on sparc, I'm not sure if I got
      it right.
      Signed-off-by: NManfred Spraul <manfred@colorfullife.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e545a614
  4. 26 8月, 2008 1 次提交
  5. 13 8月, 2008 1 次提交
    • T
      [IA64] Ensure cpu0 can access per-cpu variables in early boot code · 10617bbe
      Tony Luck 提交于
      ia64 handles per-cpu variables a litle differently from other architectures
      in that it maps the physical memory allocated for each cpu at a constant
      virtual address (0xffffffffffff0000). This mapping is not enabled until
      the architecture specific cpu_init() function is run, which causes problems
      since some generic code is run before this point. In particular when
      CONFIG_PRINTK_TIME is enabled, the boot cpu will trap on the access to
      per-cpu memory at the first printk() call so the boot will fail without
      the kernel printing anything to the console.
      
      Fix this by allocating percpu memory for cpu0 in the kernel data section
      and doing all initialization to enable percpu access in head.S before
      calling any generic code.
      
      Other cpus must take care not to access per-cpu variables too early, but
      their code path from start_secondary() to cpu_init() is all in arch/ia64
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      10617bbe
  6. 26 6月, 2008 2 次提交
  7. 28 5月, 2008 1 次提交
  8. 30 4月, 2008 1 次提交
  9. 10 4月, 2008 1 次提交
  10. 07 2月, 2008 2 次提交
    • A
      idle_regs() must be __cpuinit · 6b2fb3c6
      Adrian Bunk 提交于
      Fix the following section mismatch with CONFIG_HOTPLUG=n,
      CONFIG_HOTPLUG_CPU=y:
      
      WARNING: vmlinux.o(.text+0x399a6): Section mismatch: reference to .init.text.5:idle_regs (between 'fork_idle' and 'get_task_mm')
      Signed-off-by: NAdrian Bunk <bunk@kernel.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      6b2fb3c6
    • A
      calibrate_delay() must be __cpuinit · 6c81c32f
      Adrian Bunk 提交于
      calibrate_delay() must be __cpuinit, not __{dev,}init.
      
      I've verified that this is correct for all users.
      
      While doing the latter, I also did the following cleanups:
      - remove pointless additional prototypes in C files
      - ensure all users #include <linux/delay.h>
      
      This fixes the following section mismatches with CONFIG_HOTPLUG=n,
      CONFIG_HOTPLUG_CPU=y:
      
      WARNING: vmlinux.o(.text+0x1128d): Section mismatch: reference to .init.text.1:calibrate_delay (between 'check_cx686_slop' and 'set_cx86_reorder')
      WARNING: vmlinux.o(.text+0x25102): Section mismatch: reference to .init.text.1:calibrate_delay (between 'smp_callin' and 'cpu_coregroup_map')
      Signed-off-by: NAdrian Bunk <bunk@kernel.org>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Christian Zankel <chris@zankel.net>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      6c81c32f
  11. 06 2月, 2008 1 次提交
  12. 30 10月, 2007 1 次提交
    • A
      [IA64] /proc/cpuinfo "physical id" field cleanups · 113134fc
      Alex Chiang 提交于
      Clean up the process for presenting the "physical id" field in
      /proc/cpuinfo.
      
      	- remove global smp_num_cpucores, as it is mostly useless
      
      	- remove check_for_logical_procs(), since we do the same
      	  functionality in identify_siblings()
      
      	- reflow logic in identify_siblings(). If an older CPU
      	  does not implement PAL_LOGICAL_TO_PHYSICAL, we may still
      	  be able to get useful information from SAL_PHYSICAL_ID_INFO
      
      	- in identify_siblings(), threads/cores are a property of
      	  the CPU, not the platform
      
      	- remove useless printk's about multi-core / thread
      	  capability in identify_siblings(), as that information
      	  is readily available in /proc/cpuinfo, and printing for
      	  the BSP only adds little value
      
      	- smp_num_siblings is now meaningful if any CPU in the
      	  system supports threads, not just the BSP
      
      	- expose "physical id" field, even on CPUs that are not
      	  multi-core / multi-threaded (as long as we have a valid
      	  value). Now we know what sockets Madisons live in too.
      Signed-off-by: NAlex Chiang <achiang@hp.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      113134fc
  13. 17 10月, 2007 1 次提交
  14. 01 9月, 2007 1 次提交
  15. 26 7月, 2007 1 次提交
  16. 18 7月, 2007 1 次提交
    • Y
      [IA64] Add mapping table between irq and vector · e1b30a39
      Yasuaki Ishimatsu 提交于
      Add mapping tables between irqs and vectors, and its management code.
      This is necessary for supporting multiple vector domain because 1:1
      mapping between irq and vector will be changed to n:1.
      
      The irq == vector relationship between irqs and vectors is explicitly
      remained for percpu interrupts, platform interrupts, isa IRQs and
      vectors assigned using assign_irq_vector() because some programs might
      depend on it.
      
      And I should consider the following problem.
      
      When pci drivers enabled/disabled devices dynamically, its irq number
      is changed to the different one. Therefore, suspend/resume code may
      happen problem.
      
      To fix this problem, I bound gsi to irq.
      Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NYasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      e1b30a39
  17. 24 5月, 2007 1 次提交
  18. 12 5月, 2007 1 次提交
  19. 09 5月, 2007 1 次提交
  20. 30 3月, 2007 1 次提交
  21. 06 12月, 2006 1 次提交
  22. 27 9月, 2006 1 次提交
  23. 04 7月, 2006 1 次提交
  24. 01 7月, 2006 1 次提交
  25. 30 6月, 2006 2 次提交
    • I
      [PATCH] genirq: cleanup: remove irq_descp() · a8553acd
      Ingo Molnar 提交于
      Cleanup: remove irq_descp() - explicit use of irq_desc[] is shorter and more
      readable.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      a8553acd
    • I
      [PATCH] genirq: rename desc->handler to desc->chip · d1bef4ed
      Ingo Molnar 提交于
      This patch-queue improves the generic IRQ layer to be truly generic, by adding
      various abstractions and features to it, without impacting existing
      functionality.
      
      While the queue can be best described as "fix and improve everything in the
      generic IRQ layer that we could think of", and thus it consists of many
      smaller features and lots of cleanups, the one feature that stands out most is
      the new 'irq chip' abstraction.
      
      The irq-chip abstraction is about describing and coding and IRQ controller
      driver by mapping its raw hardware capabilities [and quirks, if needed] in a
      straightforward way, without having to think about "IRQ flow"
      (level/edge/etc.) type of details.
      
      This stands in contrast with the current 'irq-type' model of genirq
      architectures, which 'mixes' raw hardware capabilities with 'flow' details.
      The patchset supports both types of irq controller designs at once, and
      converts i386 and x86_64 to the new irq-chip design.
      
      As a bonus side-effect of the irq-chip approach, chained interrupt controllers
      (master/slave PIC constructs, etc.) are now supported by design as well.
      
      The end result of this patchset intends to be simpler architecture-level code
      and more consolidation between architectures.
      
      We reused many bits of code and many concepts from Russell King's ARM IRQ
      layer, the merging of which was one of the motivations for this patchset.
      
      This patch:
      
      rename desc->handler to desc->chip.
      
      Originally i did not want to do this, because it's a big patch.  But having
      both "desc->handler", "desc->handle_irq" and "action->handler" caused a
      large degree of confusion and made the code appear alot less clean than it
      truly is.
      
      I have also attempted a dual approach as well by introducing a
      desc->chip alias - but that just wasnt robust enough and broke
      frequently.
      
      So lets get over with this quickly.  The conversion was done automatically
      via scripts and converts all the code in the kernel.
      
      This renaming patch is the first one amongst the patches, so that the
      remaining patches can stay flexible and can be merged and split up
      without having some big monolithic patch act as a merge barrier.
      
      [akpm@osdl.org: build fix]
      [akpm@osdl.org: another build fix]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      d1bef4ed
  26. 25 3月, 2006 1 次提交
    • F
      [IA64] New IA64 core/thread detection patch · 4129a953
      Fenghua Yu 提交于
      IPF SDM 2.2 changes definition of PAL_LOGICAL_TO_PHYSICAL to add
      proc_number=-1 to get core/thread mapping info on the running processer.
      
      Based on this change, we had better to update existing core/thread
      detection in IA64 kernel correspondingly. The attached patch implements
      this change. It simplifies detection code and eliminates potential race
      condition. It also runs a bit faster and has better scalability especially
      when cores and threads number grows up in one package.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      4129a953
  27. 15 2月, 2006 1 次提交
  28. 06 1月, 2006 1 次提交
    • A
      [IA64] support for cpu0 removal · ff741906
      Ashok Raj 提交于
      here is the BSP removal support for IA64. Its pretty much the same thing that
      was released a while back, but has your feedback incorporated.
      
      - Removed CONFIG_BSP_REMOVE_WORKAROUND and associated cmdline param
      - Fixed compile issue with sn2/zx1 due to a undefined fix_b0_for_bsp
      - some formatting nits (whitespace etc)
      
      This has been tested on tiger and long back by alex on hp systems as well.
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      ff741906
  29. 09 11月, 2005 1 次提交
    • N
      [PATCH] sched: disable preempt in idle tasks · 5bfb5d69
      Nick Piggin 提交于
      Run idle threads with preempt disabled.
      
      Also corrected a bugs in arm26's cpu_idle (make it actually call schedule()).
      How did it ever work before?
      
      Might fix the CPU hotplugging hang which Nigel Cunningham noted.
      
      We think the bug hits if the idle thread is preempted after checking
      need_resched() and before going to sleep, then the CPU offlined.
      
      After calling stop_machine_run, the CPU eventually returns from preemption and
      into the idle thread and goes to sleep.  The CPU will continue executing
      previous idle and have no chance to call play_dead.
      
      By disabling preemption until we are ready to explicitly schedule, this bug is
      fixed and the idle threads generally become more robust.
      
      From: alexs <ashepard@u.washington.edu>
      
        PPC build fix
      
      From: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
      
        MIPS build fix
      Signed-off-by: NNick Piggin <npiggin@suse.de>
      Signed-off-by: NYoichi Yuasa <yuasa@hh.iij4u.or.jp>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      5bfb5d69
  30. 26 10月, 2005 1 次提交
  31. 07 7月, 2005 1 次提交
    • T
      [IA64] fix generic/up builds · 8d7e3517
      Tony Luck 提交于
      Jesse Barnes provided the original version of this patch months ago, but
      other changes kept conflicting with it, so it got deferred.  Greg Edwards
      dug it out of obscurity just over a week ago, and almost immediately
      another conflicting patch appeared (Bob Picco's memory-less nodes).
      
      I've resolved the conflicts and got it running again.  CONFIG_SGI_TIOCX
      is set to "y" in defconfig, which causes a Tiger to not boot (oops in
      tiocx_init).  But that can be resolved later ... get this in now before it
      gets stale again.
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      8d7e3517
  32. 26 6月, 2005 2 次提交
    • S
      [PATCH] set cpu_state for CPU hotplug (ia64) · a9fa06c2
      Shaohua Li 提交于
      Dead CPU notifies online CPU that it's dead using cpu_state variable.
      After switching to physical cpu hotplug, we forgot setting the variable.
      This patch fixes it.  Currently only __cpu_die uses it.  We changed other
      locations for consistency in case others use it.
      Signed-off-by: NShaohua Li <shaohua.li@intel.com>
      Acked-by: NAshok Raj <ashok.raj@intel.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      a9fa06c2
    • Z
      [PATCH] i386 CPU hotplug · f3705136
      Zwane Mwaikambo 提交于
      (The i386 CPU hotplug patch provides infrastructure for some work which Pavel
      is doing as well as for ACPI S3 (suspend-to-RAM) work which Li Shaohua
      <shaohua.li@intel.com> is doing)
      
      The following provides i386 architecture support for safely unregistering and
      registering processors during runtime, updated for the current -mm tree.  In
      order to avoid dumping cpu hotplug code into kernel/irq/* i dropped the
      cpu_online check in do_IRQ() by modifying fixup_irqs().  The difference being
      that on cpu offline, fixup_irqs() is called before we clear the cpu from
      cpu_online_map and a long delay in order to ensure that we never have any
      queued external interrupts on the APICs.  There are additional changes to s390
      and ppc64 to account for this change.
      
      1) Add CONFIG_HOTPLUG_CPU
      2) disable local APIC timer on dead cpus.
      3) Disable preempt around irq balancing to prevent CPUs going down.
      4) Print irq stats for all possible cpus.
      5) Debugging check for interrupts on offline cpus.
      6) Hacky fixup_irqs() to redirect irqs when cpus go off/online.
      7) play_dead() for offline cpus to spin inside.
      8) Handle offline cpus set in flush_tlb_others().
      9) Grab lock earlier in smp_call_function() to prevent CPUs going down.
      10) Implement __cpu_disable() and __cpu_die().
      11) Enable local interrupts in cpu_enable() after fixup_irqs()
      12) Don't fiddle with NMI on dead cpu, but leave intact on other cpus.
      13) Program IRQ affinity whilst cpu is still in cpu_online_map on offline.
      Signed-off-by: NZwane Mwaikambo <zwane@linuxpower.ca>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      f3705136
  33. 10 5月, 2005 1 次提交
  34. 26 4月, 2005 2 次提交
  35. 23 4月, 2005 1 次提交
    • A
      [IA64] cpu hotplug: return offlined cpus to SAL · b8d8b883
      Ashok Raj 提交于
      This patch is required to support cpu removal for IPF systems. Existing code
      just fakes the real offline by keeping it run the idle thread, and polling
      for the bit to re-appear in the cpu_state to get out of the idle loop.
      
      For the cpu-offline to work correctly, we need to pass control of this CPU 
      back to SAL so it can continue in the boot-rendez mode. This gives the
      SAL control to not pick this cpu as the monarch processor for global MCA
      events, and addition does not wait for this cpu to checkin with SAL
      for global MCA events as well. The handoff is implemented as documented in 
      SAL specification section 3.2.5.1 "OS_BOOT_RENDEZ to SAL return State"
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      b8d8b883