Signed-off-by: NDave Airlie <airlied@redhat.com>

Use boolean in AGP instead of having own TRUE/FALSE

--
Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

besides it apparently being useful only in 2.6.24 (the changes in 2.6.25
really mean that it could be converted back to a single-stage mechanism),
I'm seeing an issue in Xen Dom0 kernels, which is caused by the calling
of gart_to_virt() in the second stage invocations of the destroy function.
I think that besides this being a real issue with Xen (where
unmap_page_from_agp() is not just a page table attribute change), this
also is invalid from a theoretical perspective: One should not assume that
gart_to_virt() is still valid after unmapping a page. So minimally (keeping
the 2-stage mechanism) a patch like the one below would be needed.

Jan
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NDave Airlie <airlied@linux.ie>

Add a new IS_I915 and also do some checkpatch whitespace cleanups.
Signed-off-by: NDave Airlie <airlied@linux.ie>

Change origin chipset name i965G_1 to market name G35.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Airlie <airlied@linux.ie>

The flush code resource handling was having problems where some BIOS
reserve the resource in a pnp block and some don't.

Also there was a bug in that configure was being called at resume
and resetting some of the structs.
Signed-off-by: NDave Airlie <airlied@linux.ie>

This one adds new pci ids for Intel intergrated graphics chipset, with gtt
table access change on it and new gtt table size definition.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDave Airlie <airlied@linux.ie>

drivers/char/agp/intel-agp.c: In function 'intel_i965_g33_setup_chipset_flush':
drivers/char/agp/intel-agp.c:872: warning: right shift count >= width of type

I wish the agp code wasn't written in a 10,000-column xterm :(
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDave Airlie <airlied@linux.ie>

This is a bit of a large hammer but it makes sure the chipset is flushed
by writing out 1k of data to an uncached page. We may be able to get better
information in the future on how to this better.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds support for flushing the chipsets on the 915, 945, 965 and G33
families of Intel chips.

The BIOS doesn't seem to always allocate the BAR on the 965 chipsets
so I have to use pci resource code to create a resource

It adds an export for pcibios_align_resource.

The set_memory_* and set_pages_* family of API's currently requires the
callers to do a global tlb flush after the function call; forgetting this is
a very nasty deathtrap. This patch moves the global tlb flush into
each of the callers
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This patch converts various users of change_page_attr() to the new,
more intent driven set_page_*/set_memory_* API set.
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

The E7221 chipset is a 915 rebadged for the Intel server line.
Signed-off-by: NDave Airlie <airlied@linux.ie>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

With Andi's clflush fixup, we were getting hangs on server exit, flushing the
mappings after freeing each page helped.

This showed up a race condition where the pages after being freed could be
reused before the agp mappings had been flushed.  Flushing after each single
page is a bad thing for future drm work, so make the page destroy a two pass
unmapping all the pages, flushing the mappings, and then destroying the pages.
Signed-off-by: NDave Airlie <airlied@linux.ie>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>

This reverts commit f443675a, which
breaks horribly if you aren't running an unreleased xf86-video-intel
driver out of git.
Signed-off-by: NKyle McMartin <kyle@mcmartin.ca>
Cc: Dave Airlie <airlied@linux.ie>
Cc: Zhenyu Wang <zhenyu.z.wang@intel.com>
Acked-by: NKeith Packard <keithp@keithp.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The mask on i830 should be 0x70 always, later chips 0xF0 should be okay.
Signed-off-by: NDave Airlie <airlied@linux.ie>
Acked-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Cc: Michael Haas <laga@laga.ath.cx>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

G33 has 1MB GTT table range.  Fix GTT mapping in case like 512MB aperture
size.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Acked-by: NDave Airlie <airlied@linux.ie>
Cc: Dave Jones <davej@codemonkey.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

G33 GTT stolen memory is below graphics data stolen memory and be seperate,
so don't subtract it in stolen mem counting.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Acked-by: NDave Airlie <airlied@linux.ie>
Cc: Dave Jones <davej@codemonkey.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

patchset against 2.6.23-rc3.
corrects missing ioremap return checks and balancing on iounmap calls, integrated changes per list
recommendations on the original set of patches..

Signed-off-by: Scott Thompson <postfail <at> hushmail.com>
Signed-off-by: NDave Airlie <airlied@linux.ie>

Fix some missing places to check with device id info, which
should probe the device gart correctly.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

AGP should not need to lock pages. They are not protecting any race
because there is no lock_page calls, only SetPageLocked.

This is causing hangs with d00806b1.
Signed-off-by: NNick Piggin <npiggin@suse.de>
Signed-off-by: NDave Airlie <airlied@redhat.com>

After i915 chip, GMCH has no AGP port. Origin bridge driver in device
table will try to access illegal regs like APBASE, APSIZE, etc. This
may cause problem.

So mark them as NULL in the table, we won't load if no IGD got detect
and bridge has no AGP port.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

This patch trys to fix device probe in two cases. First we should
correctly detect device if integrated graphics device is not enabled
or exists, like an add-in card is plugged. Second on some type of intel
GMCH, it might have multiple graphic chip models, like 945GME case, so
we should be sure the detect works through the whole table.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

This patch adds pci ids for G33, Q33 and Q35 chips, and update with new
GTT size and stolen mem size detect method on these chips.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Add pci id info for 945GME.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Add pci id info for 965GME/GLE support.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Fixed issues noted by Christoph Hellwig, and I changed device table
scan a bit to allow the case that some models of graphics chips may
have same host bridge type. This type of chip will be added in the future.

This patch cleans up device probe function. Eric Anholt was the original author.
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Remove volatile type declare for IO mem variables.

A single private gart data is used by all drivers, this
makes it clean. Eric Anholt wrote the original patch.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Fix a call to __free_page where __free_pages(, 2) was meant, and do proper
error path handling. Also remove a redundant conditional.
Signed-off-by: NJan Beulich <jbeulich@novell.com>
Signed-off-by: NDave Jones <davej@redhat.com>

On G965, I810_PGETBL_CTL is a mmio offset, but we wrongly take it
as pci config space offset in detecting GTT size. This one line patch
fixs this.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Update PCI id info for Intel 965GM chipset.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Make agp_bridge_driver->aperture_sizes and ->masks const.
Also agp_bridge_data->driver
Signed-off-by: NDave Jones <davej@redhat.com>

Fix whitespace, braces, use kzalloc().

Cc: Dave Airlie <airlied@linux.ie>
Cc: Thomas Hellstrom <thomas@tungstengraphics.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDave Jones <davej@redhat.com>

use ARRAY_SIZE macro already defined in kernel.h
Signed-off-by: NAhmed S. Darwish <darwish.07@gmail.com>
Signed-off-by: NDave Jones <davej@redhat.com>

We don't unmap them on the suspend path, so on resume
trying to remap will fail, and then result in an
oops the next time something tries to access them.
Signed-off-by: NDave Jones <davej@redhat.com>

This patch allows drm to populate an agpgart structure with pages of its own.
It's needed for the new drm memory manager which dynamically flips pages in and out of AGP.

The patch modifies the generic functions as well as the intel agp driver. The intel drm driver is
currently the only one supporting the new memory manager.

Other agp drivers may need some minor fixing up once they have a corresponding memory manager enabled drm driver.

AGP memory types >= AGP_USER_TYPES are not populated by the agpgart driver, but the drm is expected
to do that, as well as taking care of cache- and tlb flushing when needed.

It's not possible to request these types from user space using agpgart ioctls.

The Intel driver also gets a new memory type for pages that can be bound cached to the intel GTT.
Signed-off-by: NThomas Hellstrom <thomas@tungstengraphics.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Currently in resuming path graphics device's pci space restore is
behind host bridge, so resume function wrongly accesses graphics
device's space. This makes resuming failure which crashed X.
here's a patch to restore device's pci space early, which makes
resuming ok with X.
Signed-off-by: NWang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Jones <davej@redhat.com>

Unfortunately there was a typo in one of the patches I sent,
(The one now committed to the agpgart tree).
It may cause a bus error on i810 type hardware.
Signed-off-by: NThomas Hellstrom <thomas@tungstengraphics.com>
Signed-off-by: NDave Jones <davej@redhat.com>

On the G965, the GTT size may be larger than is required to cover the
aperture.  (In fact, on all hardware we've seen, the GTT is 512KB to the
aperture's 256MB).  A previous commit forced the aperture size to 512MB on
G965 to match GTT, which would likely result in hangs at best if users
tried to rely on agpgart's aperture size information.  Instead, we use the
resource length for the aperture size and the system's reported GTT size
when available for the GTT size.

Because the MSAC registers which had been read for aperture size detection
on i9xx chips just cause a change in the resource size, we can use generic
code for aperture detection on all i9xx.
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NDave Jones <davej@redhat.com>