1. 03 12月, 2007 1 次提交
  2. 20 11月, 2007 1 次提交
    • J
      [POWERPC] spufs: Fix context destroy vs /spu readdir race · c443acab
      Jeremy Kerr 提交于
      We can currently cause an oops by repeatedly creating and destroying
      contexts, while doing getdents() calls on the "/spu" directory.
      
      This is due to the context's top-level dentry remaining hashed while
      the context is being destroyed.
      
      Fix this by unhashing the context's dentry with the
      dentry->d_inode->i_mutex held. This way, we'll hit the check for
      d_unhashed in dentry_readdir, and won't be included in the
      list of subdirs for /spu.
      
      test: spufs-testsuite:tests/01-spu_create/07-destroy-vs-readdir-race
      Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c443acab
  3. 08 11月, 2007 2 次提交
  4. 20 10月, 2007 1 次提交
  5. 17 10月, 2007 2 次提交
  6. 16 10月, 2007 2 次提交
    • M
      Remove msic_dcr_read() in axon_msi.c · 2843e7f7
      Michael Ellerman 提交于
      msic_dcr_read() doesn't really do anything useful, just replace it with
      direct calls to dcr_read().
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      2843e7f7
    • M
      Add dcr_host_t.base in dcr_read()/dcr_write() · 83f34df4
      Michael Ellerman 提交于
      Now that all users of dcr_read()/dcr_write() add the dcr_host_t.base, we
      can save them the trouble and do it in dcr_read()/dcr_write().
      
      As some background to why we just went through all this jiggery-pokery,
      benh sayeth:
      
       Initially the goal of the dcr_read/dcr_write routines was to operate like
       mfdcr/mtdcr which take absolute DCR numbers. The reason is that on 4xx
       hardware, indirect DCR access is a pain (goes through a table of
       instructions) and it's useful to have the compiler resolve an absolute DCR
       inline.
      
       We decided that wasn't worth the API bastardisation since most places
       where absolute DCR values are used are low level 4xx-only code which may
       as well continue using mfdcr/mtdcr, while the new API is designed for
       device "instances" that can exist on 4xx and Axon type platforms and may
       be located at variable DCR offsets.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      83f34df4
  7. 12 10月, 2007 1 次提交
    • P
      [POWERPC] Use 1TB segments · 1189be65
      Paul Mackerras 提交于
      This makes the kernel use 1TB segments for all kernel mappings and for
      user addresses of 1TB and above, on machines which support them
      (currently POWER5+, POWER6 and PA6T).
      
      We detect that the machine supports 1TB segments by looking at the
      ibm,processor-segment-sizes property in the device tree.
      
      We don't currently use 1TB segments for user addresses < 1T, since
      that would effectively prevent 32-bit processes from using huge pages
      unless we also had a way to revert to using 256MB segments.  That
      would be possible but would involve extra complications (such as
      keeping track of which segment size was used when HPTEs were inserted)
      and is not addressed here.
      
      Parts of this patch were originally written by Ben Herrenschmidt.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1189be65
  8. 11 10月, 2007 2 次提交
    • G
      [POWERPC] Platforms shouldn't mess with ROOT_DEV · 745e1027
      Grant Likely 提交于
      There is no good reason for board platform code to mess with the
      ROOT_DEV.  Remove it from all in-tree platforms except powermac.
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      745e1027
    • D
      Device tree aware EMAC driver · 1d3bb996
      David Gibson 提交于
      Based on BenH's earlier work, this is a new version of the EMAC driver
      for the built-in ethernet found on PowerPC 4xx embedded CPUs.  The
      same ASIC is also found in the Axon bridge chip.  This new version is
      designed to work in the arch/powerpc tree, using the device tree to
      probe the device, rather than the old and ugly arch/ppc OCP layer.
      
      This driver is designed to sit alongside the old driver (that lies in
      drivers/net/ibm_emac and this one in drivers/net/ibm_newemac).  The
      old driver is left in place to support arch/ppc until arch/ppc itself
      reaches its final demise (not too long now, with luck).
      
      This driver still has a number of things that could do with cleaning
      up, but I think they can be fixed up after merging.  Specifically:
      	- Should be adjusted to properly use the dma mapping API.
      Axon needs this.
      	- Probe logic needs reworking, in conjuction with the general
      probing code for of_platform devices.  The dependencies here between
      EMAC, MAL, ZMII etc. make this complicated.  At present, it usually
      works, because we initialize and register the sub-drivers before the
      EMAC driver itself, and (being in driver code) runs after the devices
      themselves have been instantiated from the device tree.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      1d3bb996
  9. 09 10月, 2007 2 次提交
  10. 05 10月, 2007 1 次提交
  11. 03 10月, 2007 2 次提交
  12. 26 9月, 2007 1 次提交
  13. 22 9月, 2007 1 次提交
  14. 19 9月, 2007 21 次提交