This patch adds a description of the device tree binding for the
Samsung Exynos System MMU.
Signed-off-by: NCho KyongHo <pullip.cho@samsung.com>
Signed-off-by: NShaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: NJoerg Roedel <jroedel@suse.de>

Since the default DMA ops for arm64 are non-coherent, mark the X-Gene
controller explicitly as dma-coherent to avoid additional cache
maintenance.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Cc: Loc Ho <lho@apm.com>

ARM arch timers are tightly coupled with the CPU logic and lose context
on platform implementing HW power management when cores are powered
down at run-time. Marking the arch timers as C3STOP regardless of power
management capabilities causes issues on platforms with no power management,
since in that case the arch timers cannot possibly enter states where the
timer loses context at runtime and therefore can always be used as a high
resolution clockevent device.

In order to fix the C3STOP issue in a way compliant with how real HW
works, this patch adds a boolean property to the arch timer bindings
to define if the arch timer is managed by an always-on power domain.

This power domain is present on all ARM platforms to date, and manages
HW that must not be turned off, whatever the state of other HW
components (eg power controller). On platforms with no power management
capabilities, it is the only power domain present, which encompasses
and manages power supply for all HW components in the system.

If the timer is powered by the always-on power domain, the always-on
property must be present in the bindings which means that the timer cannot
be shutdown at runtime, so it is not a C3STOP clockevent device.
If the timer binding does not contain the always-on property, the timer is
assumed to be power-gateable, hence it must be defined as a C3STOP
clockevent device.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Magnus Damm <damm@opensource.se>
Cc: Marc Carino <marc.ceeeee@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>

This adds ability for the arc_emac to really handle its supplying clock.
To get the needed clock-frequency either a real clock or the previous
clock-frequency property must be provided.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NMax Schwarz <max.schwarz@online.de>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

s/interrupts-names/interrupt-names/g
s/clocks-names/clock-names/g

Some of the binding files and device tree files get this wrong and the
kernel won't be able to pick it up. Fix them up now so that they don't
get widely used.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by : Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: NGrant Likely <grant.likely@linaro.org>

The driver will not probe if regulators are not provided. Move the regulator
properties to the required section.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Wolfram Sang pointed out that "efm32,$device" is non-standard. So use the
common scheme and prefix device with "efm32-". The old compatible string
is left in place until arch/arm/boot/dts/efm32* is fixed.
Reported-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This commit adds the necessary definitions for the PHY layer to
recognize "qsgmii" as a valid PHY interface. A QSMII interface, as
defined at
http://en.wikipedia.org/wiki/Media_Independent_Interface#Quad_Serial_Gigabit_Media_Independent_Interface,
is "is a method of combining four SGMII lines into a 5Gbit/s
interface. QSGMII, like SGMII, uses LVDS signalling for the TX and RX
data and a single LVDS clock signal. QSGMII uses significantly fewer
signal lines than four SGMII busses."

This type of MAC <-> PHY connection might require special handling on
the MAC driver side, so it should be possible to express this type of
MAC <-> PHY connection, for example in the Device Tree.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add vendor prefix for EBV Elektronik.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NRob Herring <robh@kernel.org>

Using "digi" for Digi International Inc.
Additionally, this patch keep "dlink" entry sorted alphabetically.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NRob Herring <robh@kernel.org>

Add a number of eeproms and temperature sensors/fan controllers used
by kirkwood boards.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NRob Herring <robh@kernel.org>

Add a number of vendor prefixes by kirkwood devices. These are not all
stock tickers, but have been in use for a while so changing would not
be easy.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NRob Herring <robh@kernel.org>

Marvell Kirkwood SoC binding have not yet been documented. Add the
documentation including the supported SoCs and boards.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NRob Herring <robh@kernel.org>

Newhaven Display provides the worldwide marketplace with cost
effective high quality display devices ranging from OLED and LCD
Displays to VFD Displays.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Reviewed-by: NPavel Machek <pavel@denx.de>
Signed-off-by: NRob Herring <robh@kernel.org>

Add i2se to the list of DT vendor prefixes.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NRob Herring <robh@kernel.org>

This trivial patch adds ISEE 2007 S.L. to the list of
devicetree vendor prefixes.
Acked-by: NKumar Gala <galak@codeaurora.org>
Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NRob Herring <robh@kernel.org>

Fixed the missing comma in DT node example.
Signed-off-by: NSherman Yin <syin@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NDenis Carikli <denis@eukrea.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

If "efm32,location" property is not provided, keeping what is already
configured in the hardware, so its either the reset default 0 or whatever
the bootloader did.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Add device tree binding documentation for the Cadence I2C controller.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The patch adds bindings for ld9040 panel.
Bindings describe panel resources, boot delays,
display timings and physical size.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The patch adds bindings for s6e8aa0 panel.
Bindings describes panel resources, boot delays,
display timings, orientation and physical size.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The patch adds DT bindings for Exynos DSI Master. DSIM follows rules
for DSI bus host bindings [1].
Properties describes its resources: memory, interrupt, clocks,
phy, regulators, frequencies of clocks and video interfaces.

[1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

A lot of bindings where changed without an update of the binding
documentation. This patch adds those changes to the documentation.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Add support for eDP functionality found on Tegra124 and later SoCs. Only
fast link training is currently supported.
Signed-off-by: NThierry Reding <treding@nvidia.com>

This panel is used by Tegra Note 7 and supported by the simple-panel
driver.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This panel is used by the NVIDIA SHIELD and supported by the
simple-panel driver.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The LP129QE LCD has an LED backlight and a display resolution of
2560x1700 pixels.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Allwinner A10 compatibles were following a slightly different
compatible patterns than the rest of the SoCs for historical reasons.
Change the compatibles to match the other pattern in the RTC driver for
consistency.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Fix dt compatible string in the binding document which was changed
during review in the driver, but it seem I messed up to adapt the
documentation accordingly.

Also change status from "disabled" to "ok" which makes more sense for an
example.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The ARMv8 code will reject incomplete topologies that omit some CPUs (and it's
not clear that it's ever sensible to do so). Update the binding document to
make this clear.

Since we're reformatting the text also fix incorrect grammar in the
final "Any other configuration..." section by removing "consider".
Signed-off-by: NMark Brown <broonie@linaro.org>
Acked-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This patch does not alter the binding at all it only brings the
documentation up to date with the existing binding.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The PM8xxx family of PMICs contain an RTC.  This RTC is described as a
subnode of the PM8xxx.  Document these bindings, and replace the pwrkey
node in the example with the RTC, which is now described in this
document.

While we're here, add a short description to the device tree bindings
describing what the the PM8xxx devices are and how they are expected to
be used.
Signed-off-by: NJosh Cartwright <joshc@codeaurora.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The Allwinner A10 and A31 compatibles were following a slightly different
compatible patterns than the rest of the SoCs for historical reasons. Change
the compatibles to match the other pattern in the watchdog controller driver
for consistency.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Document current driver binding.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

The driver is only supported on DT enabled platforms. Convert the
driver to DT so that it can probe properly.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

The driver is only supported on DT enabled platforms. Convert the
driver to DT so that it can probe properly.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

The driver is only supported on DT enabled platforms. Convert the
driver to DT so that it can probe properly.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

This patch adds a new driver for keypad for Cirrus Logic CLPS711X CPUs.
Target CPU contain keyboard interface which can scan 8 column lines,
so we can read row GPIOs to read status and determine asserted state.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

The SDHCI unit used on the Armada 380 and 385 Marvell SoC is similar
to the PXAv3 unit. The only difference is that on Armada 38x, the
PXAv3 unit accesses memory through MBus windows which must be
configured prior to using the device. Without this, DMA would not
work.

In order to achieve this, the sdhci-pxav3 driver is extended with an
additional compatible string "marvell,armada-380-sdhci". When this
compatible string is used, the MBus windows are initialized in a way
that is identical to what all other DMA-capable drivers for Marvell
EBU platforms do.
Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NChris Ball <chris@printf.net>