- 01 6月, 2012 7 次提交
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由 Lee Jones 提交于
This patch applies the correct format requested by the irq domain. For chained IRQs which use GPIO lines as IRQs, we stipulate that a two cell request is required. The first cell contains the requested IRQ and the second can contain flags pertaining to edge detection and level sensitive values. The zeroth cell specifies the GPIO controller by use of a phandle. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Lee Jones 提交于
The patch to disable SMSC911x registration was applied twice in the upstream kernel by mistake. Git interpreted this as 'take the same entry from a similar struct' which was close by. This was the wrong thing to do. This patch rectifies this error and re-enables SMSC911x registration when Device Tree is not enabled. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Lee Jones 提交于
Apply db8500 related PRCMU Device Tree settings and clean up some formatting errors. We also remove one of the PRCMU assigned IRQs, as it is currently not used. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Lee Jones 提交于
Now the DB8500 has Device Tree support it will be probed when the DT is parsed, rendering the requirement for platform registration void. This patch removes DB8500 PRCMU platform registration. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Lee Jones 提交于
Now the SCMC911x is correctly enabled in Device Tree, there is no need to continue registering it from platform code. In fact, if we continue doing so, the system will throw an error on boot. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Lee Jones 提交于
During Device Tree enablement it is necessary to remove <hw_component>_add_<device> calls one at at time, as and when particular devices are DT enabled. This patch provides a temporary solution. Once the new *of_init_devices function has been fully unpopulated it will be removed again. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Lee Jones 提交于
During Device Tree enablement it is necessary to remove snowball_<device>* platform_data segments one at at time, as and when particular devices are DT enabled. This patch provides a temporary solution. Once this new struct is empty it will be removed again. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 31 5月, 2012 6 次提交
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由 James Bottomley 提交于
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>
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由 Roland Stigge 提交于
The GPIO devicetree binding in 3.5 doesn't register the various LPC32xx GPIO banks via DT subnodes but always all at once, and changes the gpio referencing to 3 cells (bank, gpio, flags). This patch adjusts the DTS files to this binding that was just accepted to the gpio subsystem. Signed-off-by: NRoland Stigge <stigge@antcom.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Konrad Rzeszutek Wilk 提交于
Stub out MSR methods that aren't actually needed. This fixes a crash as Xen Dom0 on AMD Trinity systems. A bigger patch should be added to remove the paravirt machinery completely for the methods which apparently have no users! Reported-by: NAndre Przywara <andre.przywara@amd.com> Link: http://lkml.kernel.org/r/20120530222356.GA28417@andromeda.dapyr.netSigned-off-by: NH. Peter Anvin <hpa@zytor.com> Cc: <stable@vger.kernel.org>
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由 Thomas Gleixner 提交于
Use unsigned long for dealing with jiffies not int. Rename the callback to something sensible. Use __this_cpu_read/write for accessing per cpu data. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NBorislav Petkov <borislav.petkov@amd.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 zhenzhong.duan 提交于
When boot on sun G5+ with 4T mem, see an overflow in mtrr cleanup as below. *BAD*gran_size: 2G chunk_size: 2G num_reg: 10 lose cover RAM: -18014398505283592M This is because 1<<31 sign extended. Use an unsigned long constant to fix it. Useful for mem larger than or equal to 4T. -v2: Use 64bit constant instead of explicit type conversion as suggested by Yinghai. Description updated too. Signed-off-by: NZhenzhong Duan <zhenzhong.duan@oracle.com> Link: http://lkml.kernel.org/r/4FC5A77F.6060505@oracle.comSigned-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 H. Peter Anvin 提交于
Revert usage of acpi_wakeup_address and move definition to x86 architecture code in order to make compilation work in ia64. [jsakkine: tested compilation in ia64/x86-64 and added proper commit message] Reported-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Originally-by: NH. Peter Anvin <hpa@kernel.org> Signed-off-by: NJarkko Sakkinen <jarkko.sakkinen@intel.com> Link: http://lkml.kernel.org/r/1338370421-27735-1-git-send-email-jarkko.sakkinen@intel.com Cc: Tony Luck <tony.luck@intel.com> Cc: Len Brown <lenb@kernel.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 30 5月, 2012 18 次提交
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由 John Dykstra 提交于
Function pat_pagerange_is_ram() scales poorly to large address ranges, because it probes the resource tree for each page. On a 2.6 GHz Opteron, this function consumes 34 ms for a 1 GB range. It is called twice during untrack_pfn_vma(), slowing process cleanup and handicapping the OOM killer. This replacement consumes less than 1ms, under the same conditions. Signed-off-by: John Dykstra <jdykstra@cray.com> on behalf of Cray Inc. Acked-by: NSuresh Siddha <suresh.b.siddha@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1337980366.1979.6.camel@redwood [ Small stylistic cleanups and renames ] Signed-off-by: NIngo Molnar <mingo@kernel.org>
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由 Heiko Carstens 提交于
On s390 access_ok is a macro which discards all parameters and always returns 1. This can result in compile warnings which warn about unused variables like this: fs/read_write.c: In function 'rw_copy_check_uvector': fs/read_write.c:684:16: warning: unused variable 'buf' [-Wunused-variable] Fix this by adding a __range_ok() function which consumes all parameters but still always returns 1. Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Heiko Carstens 提交于
Now that hopefully all cmpxchg/xchg bugs have been fixed select HAVE_CMPXCHG_LOCAL option which uncovered a couple of bugs on s390. The only call site which is affected seems to be within mm/vmstat.c. Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Heiko Carstens 提交于
For 1 and 2 byte operands for xchg and cmpxchg the old and new values get or'ed into the larger 4 byte old value before the compare and swap instruction gets executed. This is done without using the proper byte mask before or'ing the values. If the caller passed in negative old or new values these got sign extended by the caller. Which in turn means that either the old value never matches, or, even worse, unrelated bytes would be changed in memory. Luckily there don't seem to be any callers around yet, since that would have resulted in the specification exception fixed in an earlies patch. Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Heiko Carstens 提交于
When accessing a 1 or 2 byte memory operand we cannot use the passed address since the compare and swap instruction only works for 4 byte aligned memory operands. Hence we calculate an aligned address so that compare and swap works correctly. However we don't pass the calculated address to the inline assembly. This results in incorrect memory accesses and in a specification exception if used on non 4 byte aligned memory operands. Since this didn't happen until now, there don't seem to be too many users of cmpxchg on unaligned addresses. Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Heiko Carstens 提交于
The cmpxchg macros and functions are a bit different than on other architectures. In particular the macros do not store the return value of a __cmpxchg function call in a variable before returning the value. This causes compile warnings that only occur on s390 like this one: net/ipv4/af_inet.c: In function 'build_ehash_secret': net/ipv4/af_inet.c:241:2: warning: value computed is not used [-Wunused-value] To get rid of these warnings use the same construct that we already use for the xchg macro, which was introduced for the same reason. Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Heiko Carstens 提交于
All cmpxchg functions imply a memory barrier. cmpxch64 did not have one for 31 bit code, so add it. Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Heiko Carstens 提交于
It has been a big mistage to add the capabilities attribute to the cpus in sysfs: First the attribute only contains the cpu capability of primary cpus, which however is not necessarily (or better: unlikely) the type of cpu the kernel runs on, which is typically an IFL. In addition all information that is necessary is available in /proc/sysinfo already. So this attribute partially duplicated informations. So programs should look into the sysinfo file to retrieve all informations they are interested in. Since with this kernel release also the powersavings cpu attributes are removed this seems to be a good opportunity to remove another broken interface. Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Michael Holzheu 提交于
If the IPL CPU is offline, currently the pcpu_delegate() function used by smp_call_ipl_cpu() does not work because pcpu_delegate() modifies the lowcore of the target CPU. In case of an offline IPL CPU currently the prefix register is zero but pcpu->lowcore still points to the old prefix page. Therefore the lowcore changes done by pcpu_delegate() have no effect. With this fix pcpu_delegate() now uses memcpy_absolute() and therefore also prepares the absolute zero lowcore if the target CPU has prefix register zero. Signed-off-by: NMichael Holzheu <holzheu@linux.vnet.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Michael Holzheu 提交于
This patch introduces the new function memcpy_absolute() that allows to copy memory using absolute addressing. This means that the prefix swap does not apply when this function is used. With this patch also all s390 kernel code that accesses absolute zero now uses the new memcpy_absolute() function. The old and less generic copy_to_absolute_zero() function is removed. Signed-off-by: NMichael Holzheu <holzheu@linux.vnet.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Fabio Estevam 提交于
In order to keep consistency with other rtc drivers,rename CONFIG_RTC_MXC to CONFIG_RTC_DRV_MXC. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Cc: Alessandro Zummo <a.zummo@towertech.it> [akpm@linux-foundation.org: fix missed arch/arm/configs/imx_v6_v7_defconfig] Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Andrea Arcangeli 提交于
When holding the mmap_sem for reading, pmd_offset_map_lock should only run on a pmd_t that has been read atomically from the pmdp pointer, otherwise we may read only half of it leading to this crash. PID: 11679 TASK: f06e8000 CPU: 3 COMMAND: "do_race_2_panic" #0 [f06a9dd8] crash_kexec at c049b5ec #1 [f06a9e2c] oops_end at c083d1c2 #2 [f06a9e40] no_context at c0433ded #3 [f06a9e64] bad_area_nosemaphore at c043401a #4 [f06a9e6c] __do_page_fault at c0434493 #5 [f06a9eec] do_page_fault at c083eb45 #6 [f06a9f04] error_code (via page_fault) at c083c5d5 EAX: 01fb470c EBX: fff35000 ECX: 00000003 EDX: 00000100 EBP: 00000000 DS: 007b ESI: 9e201000 ES: 007b EDI: 01fb4700 GS: 00e0 CS: 0060 EIP: c083bc14 ERR: ffffffff EFLAGS: 00010246 #7 [f06a9f38] _spin_lock at c083bc14 #8 [f06a9f44] sys_mincore at c0507b7d #9 [f06a9fb0] system_call at c083becd start len EAX: ffffffda EBX: 9e200000 ECX: 00001000 EDX: 6228537f DS: 007b ESI: 00000000 ES: 007b EDI: 003d0f00 SS: 007b ESP: 62285354 EBP: 62285388 GS: 0033 CS: 0073 EIP: 00291416 ERR: 000000da EFLAGS: 00000286 This should be a longstanding bug affecting x86 32bit PAE without THP. Only archs with 64bit large pmd_t and 32bit unsigned long should be affected. With THP enabled the barrier() in pmd_none_or_trans_huge_or_clear_bad() would partly hide the bug when the pmd transition from none to stable, by forcing a re-read of the *pmd in pmd_offset_map_lock, but when THP is enabled a new set of problem arises by the fact could then transition freely in any of the none, pmd_trans_huge or pmd_trans_stable states. So making the barrier in pmd_none_or_trans_huge_or_clear_bad() unconditional isn't good idea and it would be a flakey solution. This should be fully fixed by introducing a pmd_read_atomic that reads the pmd in order with THP disabled, or by reading the pmd atomically with cmpxchg8b with THP enabled. Luckily this new race condition only triggers in the places that must already be covered by pmd_none_or_trans_huge_or_clear_bad() so the fix is localized there but this bug is not related to THP. NOTE: this can trigger on x86 32bit systems with PAE enabled with more than 4G of ram, otherwise the high part of the pmd will never risk to be truncated because it would be zero at all times, in turn so hiding the SMP race. This bug was discovered and fully debugged by Ulrich, quote: ---- [..] pmd_none_or_trans_huge_or_clear_bad() loads the content of edx and eax. 496 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) 497 { 498 /* depend on compiler for an atomic pmd read */ 499 pmd_t pmdval = *pmd; // edi = pmd pointer 0xc0507a74 <sys_mincore+548>: mov 0x8(%esp),%edi ... // edx = PTE page table high address 0xc0507a84 <sys_mincore+564>: mov 0x4(%edi),%edx ... // eax = PTE page table low address 0xc0507a8e <sys_mincore+574>: mov (%edi),%eax [..] Please note that the PMD is not read atomically. These are two "mov" instructions where the high order bits of the PMD entry are fetched first. Hence, the above machine code is prone to the following race. - The PMD entry {high|low} is 0x0000000000000000. The "mov" at 0xc0507a84 loads 0x00000000 into edx. - A page fault (on another CPU) sneaks in between the two "mov" instructions and instantiates the PMD. - The PMD entry {high|low} is now 0x00000003fda38067. The "mov" at 0xc0507a8e loads 0xfda38067 into eax. ---- Reported-by: NUlrich Obergfell <uobergfe@redhat.com> Signed-off-by: NAndrea Arcangeli <aarcange@redhat.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Hugh Dickins <hughd@google.com> Cc: Larry Woodman <lwoodman@redhat.com> Cc: Petr Matousek <pmatouse@redhat.com> Cc: Rik van Riel <riel@redhat.com> Cc: <stable@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Bjorn Helgaas 提交于
Print physical address info in a style consistent with the %pR style used elsewhere in the kernel. For example: -found SMP MP-table at [ffff8800000fce90] fce90 +found SMP MP-table at [mem 0x000fce90-0x000fce9f] mapped at [ffff8800000fce90] -initial memory mapped : 0 - 20000000 +initial memory mapped: [mem 0x00000000-0x1fffffff] -Base memory trampoline at [ffff88000009c000] 9c000 size 8192 +Base memory trampoline [mem 0x0009c000-0x0009dfff] mapped at [ffff88000009c000] -SRAT: Node 0 PXM 0 0-80000000 +SRAT: Node 0 PXM 0 [mem 0x00000000-0x7fffffff] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Bjorn Helgaas 提交于
Print physical address info in a style consistent with the %pR style used elsewhere in the kernel. For example: -BIOS-provided physical RAM map: +e820: BIOS-provided physical RAM map: - BIOS-e820: 0000000000000100 - 000000000009e000 (usable) +BIOS-e820: [mem 0x0000000000000100-0x000000000009dfff] usable -Allocating PCI resources starting at 90000000 (gap: 90000000:6ed1c000) +e820: [mem 0x90000000-0xfed1bfff] available for PCI devices -reserve RAM buffer: 000000000009e000 - 000000000009ffff +e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Cong Wang 提交于
Cris doesn't implement atomic64 operations neither, should select GENERIC_ATOMIC64. Signed-off-by: NWANG Cong <xiyou.wangcong@gmail.com> Cc: Mikael Starvik <starvik@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Sam Ravnborg 提交于
Stephen Rothwell <sfr@canb.auug.org.au> reported following error: In file included from arch/sparc/kernel/prom_common.c:26:0: arch/sparc/include/asm/leon.h:221:9: error: unknown type name 'irq_flow_handler_t' arch/sparc/include/asm/leon.h:224:10: error: unknown type name 'irq_flow_handler_t' Fix this by: 1) Avoid including leon.h in prom_commen.h (not needed) 2) Include irq.h in leon.h to avoid the missing symbol error Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
It was assigned, but never referenced later. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
head_32.S failed to set cputypval for leon, causing boot to fail. The boot failed because we failed to recognize this was a LEON cpu so we did not preoperly run-time patch the the kernel. This resulted in an early crash. Reported-by: NDaniel Hellstrom <daniel@gaisler.com> Tested-by: NDaniel Hellstrom <daniel@gaisler.com> Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Konrad Eisele <konrad@gaisler.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 5月, 2012 9 次提交
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由 Xiao Guangrong 提交于
The huge page size is 4M on non-PAE host, but 2M page size is used in transparent_hugepage_adjust(), so the page we get after adjust the mapping level is not the head page, the BUG_ON() will be triggered Signed-off-by: NXiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 David S. Miller 提交于
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
No need for two implementations - we check the cpu model. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
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由 Sam Ravnborg 提交于
Unconditially define pci32_dma_ops as this is used for leon. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
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由 Sam Ravnborg 提交于
Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
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由 Sam Ravnborg 提交于
With the removal of sun4c we can use the same cpu_idle() implementation on UP and SMP. This also fix it so we use the same version independent on LEON enabled or not. V2: Fixed whitespace issue pointed out by Josip Rodin. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Josip Rodin <joy@entuzijast.net> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
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由 Sam Ravnborg 提交于
Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
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由 Sam Ravnborg 提交于
All users of MMUREGS ASI is now LEON/SUN aware, so this is no longer required. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
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由 Sam Ravnborg 提交于
LEON uses a different ASI than SUN for MMUREGS Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
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