- 09 12月, 2009 4 次提交
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由 Wolfram Sang 提交于
- drop own, obsolete include-file - drop IRQF_SAMPLE_RANDOM (deprecated feature) - drop 'if' above kfree() - typos, braces & whitespaces Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Acked-by: NLuotao Fu <l.fu@pengutronix.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Luotao Fu 提交于
This one enables the mpc52xx_spi driver for usage of user defined gpio lines as chipselect. This way we can control some more spi devices than only one V2 Changes: * preinitialize the gpio as output in probe function and call gpio_set_value in the chip select function instead of calling direction_output every time. * initialize the gpio line with output high, since we don't support CS_HIGH in the driver currently any way. change gpio value setting to default active low in chip select call. * free the gpio array while error or removing. Signed-off-by: NLuotao Fu <l.fu@pengutronix.de> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Luotao Fu 提交于
V2 changes: * remove CS_HIGH mode Signed-off-by: NLuotao Fu <l.fu@pengutronix.de> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Luotao Fu 提交于
Before reading status register to check MODF failure, we have to clear it first since the MODF flag will be set after initializing the spi master, if the hardware comes up with a low SS. The processor datasheet reads: Mode Fault flag -- bit sets if SS input goes low while SPI is configured as a master. Flag is cleared automatically by an SPI status register read (with MODF set) followed by a SPI control register 1 write. Hence simply rereading the register is not sufficient to clear the flag. We redo the write also to make sure to clear the flag. V2 Changes: * change variable type from int to u8 Signed-off-by: NLuotao Fu <l.fu@pengutronix.de> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 05 11月, 2009 1 次提交
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由 Grant Likely 提交于
Adds support for the dedicated SPI device on the Freescale MPC5200(b) SoC. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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