1. 08 2月, 2015 1 次提交
  2. 17 11月, 2014 2 次提交
  3. 12 11月, 2014 1 次提交
  4. 31 10月, 2014 2 次提交
  5. 29 10月, 2014 1 次提交
  6. 20 10月, 2014 1 次提交
  7. 02 10月, 2014 1 次提交
  8. 23 9月, 2014 1 次提交
  9. 16 9月, 2014 3 次提交
  10. 02 9月, 2014 1 次提交
  11. 28 8月, 2014 5 次提交
    • F
      net: dsa: add Broadcom SF2 switch driver · 246d7f77
      Florian Fainelli 提交于
      Add support for the Broadcom Starfigther 2 switch chip using a DSA
      driver. This switch driver supports the following features:
      
      - configuration of the external switch port interface: MII, RevMII,
        RGMII and RGMII_NO_ID are supported
      - support for the per-port MIB counters
      - support for link interrupts for special ports (e.g: MoCA)
      - powering up/down of switch memories to conserve power when ports are
        unused
      
      Finally, update the compatible property for the DSA core code to match
      our switch top-level compatible node.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      246d7f77
    • F
      net: dsa: allow for more complex PHY setups · 0d8bcdd3
      Florian Fainelli 提交于
      Modify the DSA slave interface to be bound to an arbitray PHY, not just
      the ones that are available as child PHY devices of the switch MDIO bus.
      
      This allows us for instance to have external PHYs connected to a
      separate MDIO bus, but yet also connected to a given switch port.
      
      Under certain configurations, the physical port mask might not be a 1:1
      mapping to the MII PHYs mask. This is the case, if e.g: Port 1 of the
      switch is used and connects to a PHY at a MDIO address different than 1.
      
      Introduce a phys_mii_mask variable which allows driver to implement and
      divert their own MDIO read/writes operations for a subset of the MDIO
      PHY addresses.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0d8bcdd3
    • F
      net: dsa: retain a per-port device_node pointer · bd47497a
      Florian Fainelli 提交于
      We will later use the per-port device_node pointer to fetch a bunch of
      port-specific properties.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bd47497a
    • F
      net: dsa: provide a switch device device tree node pointer · fa981d9a
      Florian Fainelli 提交于
      We might need to fetch additional resources from the device tree node
      pointer, such as register ranges or other properties. Keep a device_node
      pointer around for this.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      fa981d9a
    • F
      net: dsa: reduce number of protocol hooks · 3e8a72d1
      Florian Fainelli 提交于
      DSA is currently registering one packet_type function per EtherType it
      needs to intercept in the receive path of a DSA-enabled Ethernet device.
      Right now we have three of them: trailer, DSA and eDSA, and there might
      be more in the future, this will not scale to the addition of new
      protocols.
      
      This patch proceeds with adding a new layer of abstraction and two new
      functions:
      
      dsa_switch_rcv() which will dispatch into the tag-protocol specific
      receive function implemented by net/dsa/tag_*.c
      
      dsa_slave_xmit() which will dispatch into the tag-protocol specific
      transmit function implemented by net/dsa/tag_*.c
      
      When we do create the per-port slave network devices, we iterate over
      the switch protocol to assign the DSA-specific receive and transmit
      operations.
      
      A new fake ethertype value is used: ETH_P_XDSA to illustrate the fact
      that this is no longer going to look like ETH_P_DSA or ETH_P_TRAILER
      like it used to be.
      
      This allows us to greatly simplify the check in eth_type_trans() and
      always override the skb->protocol with ETH_P_XDSA for Ethernet switches
      tagged protocol, while also reducing the number repetitive slave
      netdevice_ops assignments.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3e8a72d1
  12. 26 6月, 2014 1 次提交
  13. 17 5月, 2014 1 次提交
  14. 26 3月, 2013 2 次提交
  15. 25 3月, 2013 1 次提交
  16. 22 1月, 2013 1 次提交
  17. 21 8月, 2012 1 次提交
    • T
      workqueue: deprecate flush[_delayed]_work_sync() · 43829731
      Tejun Heo 提交于
      flush[_delayed]_work_sync() are now spurious.  Mark them deprecated
      and convert all users to flush[_delayed]_work().
      
      If you're cc'd and wondering what's going on: Now all workqueues are
      non-reentrant and the regular flushes guarantee that the work item is
      not pending or running on any CPU on return, so there's no reason to
      use the sync flushes at all and they're going away.
      
      This patch doesn't make any functional difference.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Ian Campbell <ian.campbell@citrix.com>
      Cc: Jens Axboe <axboe@kernel.dk>
      Cc: Mattia Dongili <malattia@linux.it>
      Cc: Kent Yoder <key@linux.vnet.ibm.com>
      Cc: David Airlie <airlied@linux.ie>
      Cc: Jiri Kosina <jkosina@suse.cz>
      Cc: Karsten Keil <isdn@linux-pingi.de>
      Cc: Bryan Wu <bryan.wu@canonical.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Alasdair Kergon <agk@redhat.com>
      Cc: Mauro Carvalho Chehab <mchehab@infradead.org>
      Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
      Cc: David Woodhouse <dwmw2@infradead.org>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: linux-wireless@vger.kernel.org
      Cc: Anton Vorontsov <cbou@mail.ru>
      Cc: Sangbeom Kim <sbkim73@samsung.com>
      Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Eric Van Hensbergen <ericvh@gmail.com>
      Cc: Takashi Iwai <tiwai@suse.de>
      Cc: Steven Whitehouse <swhiteho@redhat.com>
      Cc: Petr Vandrovec <petr@vandrovec.name>
      Cc: Mark Fasheh <mfasheh@suse.com>
      Cc: Christoph Hellwig <hch@infradead.org>
      Cc: Avi Kivity <avi@redhat.com> 
      43829731
  18. 27 11月, 2011 3 次提交
  19. 01 11月, 2011 1 次提交
  20. 24 1月, 2011 1 次提交
  21. 24 12月, 2010 1 次提交
  22. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  23. 22 3月, 2009 1 次提交
    • L
      dsa: add switch chip cascading support · e84665c9
      Lennert Buytenhek 提交于
      The initial version of the DSA driver only supported a single switch
      chip per network interface, while DSA-capable switch chips can be
      interconnected to form a tree of switch chips.  This patch adds support
      for multiple switch chips on a network interface.
      
      An example topology for a 16-port device with an embedded CPU is as
      follows:
      
      	+-----+          +--------+       +--------+
      	|     |eth0    10| switch |9    10| switch |
      	| CPU +----------+        +-------+        |
      	|     |          | chip 0 |       | chip 1 |
      	+-----+          +---++---+       +---++---+
      	                     ||               ||
      	                     ||               ||
      	                     ||1000baseT      ||1000baseT
      	                     ||ports 1-8      ||ports 9-16
      
      This requires a couple of interdependent changes in the DSA layer:
      
      - The dsa platform driver data needs to be extended: there is still
        only one netdevice per DSA driver instance (eth0 in the example
        above), but each of the switch chips in the tree needs its own
        mii_bus device pointer, MII management bus address, and port name
        array. (include/net/dsa.h)  The existing in-tree dsa users need
        some small changes to deal with this. (arch/arm)
      
      - The DSA and Ethertype DSA tagging modules need to be extended to
        use the DSA device ID field on receive and demultiplex the packet
        accordingly, and fill in the DSA device ID field on transmit
        according to which switch chip the packet is heading to.
        (net/dsa/tag_{dsa,edsa}.c)
      
      - The concept of "CPU port", which is the switch chip port that the
        CPU is connected to (port 10 on switch chip 0 in the example), needs
        to be extended with the concept of "upstream port", which is the
        port on the switch chip that will bring us one hop closer to the CPU
        (port 10 for both switch chips in the example above).
      
      - The dsa platform data needs to specify which ports on which switch
        chips are links to other switch chips, so that we can enable DSA
        tagging mode on them.  (For inter-switch links, we always use
        non-EtherType DSA tagging, since it has lower overhead.  The CPU
        link uses dsa or edsa tagging depending on what the 'root' switch
        chip supports.)  This is done by specifying "dsa" for the given
        port in the port array.
      
      - The dsa platform data needs to be extended with information on via
        which port to reach any given switch chip from any given switch chip.
        This info is specified via the per-switch chip data struct ->rtable[]
        array, which gives the nexthop ports for each of the other switches
        in the tree.
      
      For the example topology above, the dsa platform data would look
      something like this:
      
      	static struct dsa_chip_data sw[2] = {
      		{
      			.mii_bus	= &foo,
      			.sw_addr	= 1,
      			.port_names[0]	= "p1",
      			.port_names[1]	= "p2",
      			.port_names[2]	= "p3",
      			.port_names[3]	= "p4",
      			.port_names[4]	= "p5",
      			.port_names[5]	= "p6",
      			.port_names[6]	= "p7",
      			.port_names[7]	= "p8",
      			.port_names[9]	= "dsa",
      			.port_names[10]	= "cpu",
      			.rtable		= (s8 []){ -1, 9, },
      		}, {
      			.mii_bus	= &foo,
      			.sw_addr	= 2,
      			.port_names[0]	= "p9",
      			.port_names[1]	= "p10",
      			.port_names[2]	= "p11",
      			.port_names[3]	= "p12",
      			.port_names[4]	= "p13",
      			.port_names[5]	= "p14",
      			.port_names[6]	= "p15",
      			.port_names[7]	= "p16",
      			.port_names[10]	= "dsa",
      			.rtable		= (s8 []){ 10, -1, },
      		},
      	},
      
      	static struct dsa_platform_data pd = {
      		.netdev		= &foo,
      		.nr_switches	= 2,
      		.sw		= sw,
      	};
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Tested-by: NGary Thomas <gary@mlbassoc.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e84665c9
  24. 09 10月, 2008 3 次提交
    • L
      dsa: add support for Trailer tagging format · 396138f0
      Lennert Buytenhek 提交于
      This adds support for the Trailer switch tagging format.  This is
      another tagging that doesn't explicitly mark tagged packets with a
      distinct ethertype, so that we need to add a similar hack in the
      receive path as for the Original DSA tagging format.
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Tested-by: NByron Bradley <byron.bbradley@gmail.com>
      Tested-by: NTim Ellis <tim.ellis@mac.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      396138f0
    • L
      dsa: add support for original DSA tagging format · cf85d08f
      Lennert Buytenhek 提交于
      Most of the DSA switches currently in the field do not support the
      Ethertype DSA tagging format that one of the previous patches added
      support for, but only the original DSA tagging format.
      
      The original DSA tagging format carries the same information as the
      Ethertype DSA tagging format, but with the difference that it does not
      have an ethertype field.  In other words, when receiving a packet that
      is tagged with an original DSA tag, there is no way of telling in
      eth_type_trans() that this packet is in fact a DSA-tagged packet.
      
      This patch adds a hook into eth_type_trans() which is only compiled in
      if support for a switch chip that doesn't support Ethertype DSA is
      selected, and which checks whether there is a DSA switch driver
      instance attached to this network device which uses the old tag format.
      If so, it sets the protocol field to ETH_P_DSA without looking at the
      packet, so that the packet ends up in the right place.
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Tested-by: NNicolas Pitre <nico@marvell.com>
      Tested-by: NPeter van Valderen <linux@ddcrew.com>
      Tested-by: NDirk Teurlings <dirk@upexia.nl>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cf85d08f
    • L
      net: Distributed Switch Architecture protocol support · 91da11f8
      Lennert Buytenhek 提交于
      Distributed Switch Architecture is a protocol for managing hardware
      switch chips.  It consists of a set of MII management registers and
      commands to configure the switch, and an ethernet header format to
      signal which of the ports of the switch a packet was received from
      or is intended to be sent to.
      
      The switches that this driver supports are typically embedded in
      access points and routers, and a typical setup with a DSA switch
      looks something like this:
      
      	+-----------+       +-----------+
      	|           | RGMII |           |
      	|           +-------+           +------ 1000baseT MDI ("WAN")
      	|           |       |  6-port   +------ 1000baseT MDI ("LAN1")
      	|    CPU    |       |  ethernet +------ 1000baseT MDI ("LAN2")
      	|           |MIImgmt|  switch   +------ 1000baseT MDI ("LAN3")
      	|           +-------+  w/5 PHYs +------ 1000baseT MDI ("LAN4")
      	|           |       |           |
      	+-----------+       +-----------+
      
      The switch driver presents each port on the switch as a separate
      network interface to Linux, polls the switch to maintain software
      link state of those ports, forwards MII management interface
      accesses to those network interfaces (e.g. as done by ethtool) to
      the switch, and exposes the switch's hardware statistics counters
      via the appropriate Linux kernel interfaces.
      
      This initial patch supports the MII management interface register
      layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
      supports the "Ethertype DSA" packet tagging format.
      
      (There is no officially registered ethertype for the Ethertype DSA
      packet format, so we just grab a random one.  The ethertype to use
      is programmed into the switch, and the switch driver uses the value
      of ETH_P_EDSA for this, so this define can be changed at any time in
      the future if the one we chose is allocated to another protocol or
      if Ethertype DSA gets its own officially registered ethertype, and
      everything will continue to work.)
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Tested-by: NNicolas Pitre <nico@marvell.com>
      Tested-by: NByron Bradley <byron.bbradley@gmail.com>
      Tested-by: NTim Ellis <tim.ellis@mac.com>
      Tested-by: NPeter van Valderen <linux@ddcrew.com>
      Tested-by: NDirk Teurlings <dirk@upexia.nl>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      91da11f8