1. 25 3月, 2011 1 次提交
    • A
      oprofile, x86: Allow setting EDGE/INV/CMASK for counter events · 914a76ca
      Andi Kleen 提交于
      For some performance events it's useful to set the EDGE and INV
      bits and the CMASK mask in the counter control register. The list
      of predefined events Intel releases for each CPU has some events which
      require these settings to get more "natural" to use higher level events.
      
      oprofile currently doesn't allow this.
      
      This patch adds new extra configuration fields for them, so that
      they can be specified in oprofilefs.
      
      An updated oprofile daemon can then make use of this to set them.
      
      v2: Write back masked extra value to variable.
      Signed-off-by: NAndi Kleen <ak@linux.intel.com>
      Signed-off-by: NRobert Richter <robert.richter@amd.com>
      914a76ca
  2. 16 3月, 2011 2 次提交
  3. 15 2月, 2011 5 次提交
  4. 27 1月, 2011 2 次提交
  5. 22 1月, 2011 16 次提交
  6. 21 1月, 2011 14 次提交