1. 17 1月, 2014 5 次提交
  2. 09 1月, 2014 6 次提交
  3. 08 1月, 2014 1 次提交
    • T
      ARM: dts: Add omap specific pinctrl defines to use padconf addresses · 43a348ea
      Tony Lindgren 提交于
      As we have one to three pinctrl-single instances for each SoC it is
      a bit confusing to configure the padconf register offset from the
      base of the padconf register base.
      
      Let's add macros that allow using the physical address of the
      padconf register directly, or in most cases, just the last 16-bits
      of the address as they are shown in the documentation.
      
      Note that most documentation shows two padconf registers for each
      32-bit address, so adding 2 to the documentation address is needed for
      the second padconf register as we treat them as 16-bit registers
      for omap3+.
      
      For example, omap36xx documentation shows sdmmc2_clk at 0x48002158,
      so we can just use the last 16-bits of that value:
      
      	pinctrl-single,pins = <
      		OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)
      		...
      	>;
      
      And we don't need to separately calculate the offset from the 0x2030
      base:
      
      	pinctrl-single,pins = <
      		0x128 (PIN_INPUT_PULLUP | MUX_MODE0)
      		...
      	>;
      
      Naturally both ways of defining the registers can be used, and I'm
      not saying we should replace all the existing defines. But it may
      be handy to use these macros for new entries and when doing other
      related .dts file clean-up.
      Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      [tony@atomide.com: updated for 3430 vs 3630 core2 range]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      43a348ea
  4. 31 12月, 2013 5 次提交
  5. 26 12月, 2013 2 次提交
  6. 24 12月, 2013 6 次提交
  7. 19 12月, 2013 2 次提交
  8. 17 12月, 2013 2 次提交
  9. 12 12月, 2013 1 次提交
  10. 09 12月, 2013 1 次提交
  11. 04 12月, 2013 2 次提交
    • E
      thermal: introduce device tree parser · 4e5e4705
      Eduardo Valentin 提交于
      This patch introduces a device tree bindings for
      describing the hardware thermal behavior and limits.
      Also a parser to read and interpret the data and feed
      it in the thermal framework is presented.
      
      This patch introduces a thermal data parser for device
      tree. The parsed data is used to build thermal zones
      and thermal binding parameters. The output data
      can then be used to deploy thermal policies.
      
      This patch adds also documentation regarding this
      API and how to define tree nodes to use
      this infrastructure.
      
      Note that, in order to be able to have control
      on the sensor registration on the DT thermal zone,
      it was required to allow changing the thermal zone
      .get_temp callback. For this reason, this patch
      also removes the 'const' modifier from the .ops
      field of thermal zone devices.
      
      Cc: Zhang Rui <rui.zhang@intel.com>
      Cc: linux-pm@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
      4e5e4705
    • H
      clk: hisilicon: add common clock support · 0aa0c95f
      Haojian Zhuang 提交于
      Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is
      used to support the clock gate that enable/disable/status registers
      are seperated.
      Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
      0aa0c95f
  12. 02 12月, 2013 1 次提交
  13. 27 11月, 2013 3 次提交
  14. 25 11月, 2013 1 次提交
  15. 05 11月, 2013 1 次提交
  16. 23 10月, 2013 1 次提交