1. 05 8月, 2011 1 次提交
  2. 04 8月, 2011 1 次提交
  3. 03 8月, 2011 4 次提交
  4. 29 7月, 2011 1 次提交
    • D
      sparc: Sanitize cpu feature detection and reporting. · ac85fe8b
      David S. Miller 提交于
      Instead of evaluating the cpu features for ELF_HWCAP every exec,
      calculate it once at boot time.
      
      Add AV_SPARC_* capability flag bits, compatible with what Solaris
      reports to applications.
      
      Report these capabilities once in the kernel log, and also via
      /proc/cpuinfo in a new "cpucaps" entry.
      
      If available, fetch the cpu features from the machine description
      'hwcap-list' property of the 'cpu' node.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ac85fe8b
  5. 28 7月, 2011 2 次提交
    • D
      sparc: Detect and handle UltraSPARC-T3 cpu types. · 4ba991d3
      David S. Miller 提交于
      The cpu compatible string we look for is "SPARC-T3".
      
      As far as memset/memcpy optimizations go, we treat this chip the same
      as Niagara-T2/T2+.  Use cache initializing stores for memset, and use
      perfetch, FPU block loads, cache initializing stores, and block stores
      for copies.
      
      We use the Niagara-T2 perf support, since T3 is a close relative in
      this regard.  Later we'll add support for the new events T3 can
      report, plus enable T3's new "sample" mode.
      
      For now I haven't added any new ELF hwcap flags.  We probably need
      to add a couple, for example:
      
      T2 and T3 both support the population count instruction in hardware.
      
      T3 supports VIS3 instructions, including support (finally) for
      partitioned shift.  One can also now move directly between float
      and integer registers.
      
      T3 supports instructions meant to help with Galois Field and other HPC
      calculations, such as XOR multiply.  Also there are "OP and negate"
      instructions, for example "fnmul" which is multiply-and-negate.
      
      T3 recognizes the transactional memory opcodes, however since
      transactional memory isn't supported: 1) 'commit' behaves as a NOP and
      2) 'chkpt' always branches 3) 'rdcps' returns all zeros and 4) 'wrcps'
      behaves as a NOP.
      
      So we'll need about 3 new elf capability flags in the end to represent
      all of these things.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4ba991d3
    • D
  6. 27 7月, 2011 5 次提交
  7. 26 7月, 2011 3 次提交
  8. 22 7月, 2011 1 次提交
  9. 21 7月, 2011 1 次提交
    • P
      treewide: fix potentially dangerous trailing ';' in #defined values/expressions · 497888cf
      Phil Carmody 提交于
      All these are instances of
        #define NAME value;
      or
        #define NAME(params_opt) value;
      
      These of course fail to build when used in contexts like
        if(foo $OP NAME)
        while(bar $OP NAME)
      and may silently generate the wrong code in contexts such as
        foo = NAME + 1;    /* foo = value; + 1; */
        bar = NAME - 1;    /* bar = value; - 1; */
        baz = NAME & quux; /* baz = value; & quux; */
      
      Reported on comp.lang.c,
      Message-ID: <ab0d55fe-25e5-482b-811e-c475aa6065c3@c29g2000yqd.googlegroups.com>
      Initial analysis of the dangers provided by Keith Thompson in that thread.
      
      There are many more instances of more complicated macros having unnecessary
      trailing semicolons, but this pile seems to be all of the cases of simple
      values suffering from the problem. (Thus things that are likely to be found
      in one of the contexts above, more complicated ones aren't.)
      Signed-off-by: NPhil Carmody <ext-phil.2.carmody@nokia.com>
      Signed-off-by: NJiri Kosina <jkosina@suse.cz>
      497888cf
  10. 06 7月, 2011 1 次提交
  11. 28 6月, 2011 1 次提交
    • K
      Fix node_start/end_pfn() definition for mm/page_cgroup.c · c6830c22
      KAMEZAWA Hiroyuki 提交于
      commit 21a3c964 uses node_start/end_pfn(nid) for detection start/end
      of nodes. But, it's not defined in linux/mmzone.h but defined in
      /arch/???/include/mmzone.h which is included only under
      CONFIG_NEED_MULTIPLE_NODES=y.
      
      Then, we see
        mm/page_cgroup.c: In function 'page_cgroup_init':
        mm/page_cgroup.c:308: error: implicit declaration of function 'node_start_pfn'
        mm/page_cgroup.c:309: error: implicit declaration of function 'node_end_pfn'
      
      So, fixiing page_cgroup.c is an idea...
      
      But node_start_pfn()/node_end_pfn() is a very generic macro and
      should be implemented in the same manner for all archs.
      (m32r has different implementation...)
      
      This patch removes definitions of node_start/end_pfn() in each archs
      and defines a unified one in linux/mmzone.h. It's not under
      CONFIG_NEED_MULTIPLE_NODES, now.
      
      A result of macro expansion is here (mm/page_cgroup.c)
      
      for !NUMA
       start_pfn = ((&contig_page_data)->node_start_pfn);
        end_pfn = ({ pg_data_t *__pgdat = (&contig_page_data); __pgdat->node_start_pfn + __pgdat->node_spanned_pages;});
      
      for NUMA (x86-64)
        start_pfn = ((node_data[nid])->node_start_pfn);
        end_pfn = ({ pg_data_t *__pgdat = (node_data[nid]); __pgdat->node_start_pfn + __pgdat->node_spanned_pages;});
      
      Changelog:
       - fixed to avoid using "nid" twice in node_end_pfn() macro.
      Reported-and-acked-by: NRandy Dunlap <randy.dunlap@oracle.com>
      Reported-and-tested-by: NIngo Molnar <mingo@elte.hu>
      Acked-by: NMel Gorman <mgorman@suse.de>
      Signed-off-by: NKAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      c6830c22
  12. 08 6月, 2011 2 次提交
  13. 03 6月, 2011 3 次提交
    • D
      sparc32,leon: add GRPCI2 PCI Host driver · 5d07b786
      Daniel Hellstrom 提交于
      The DMA region must be accessible in order for PCI peripheral
      drivers to work, the sparc32 has DMA in the normal memory
      zone which requires the GRPCI2 to PCI target BARs so that all
      kernel low mem (192MB) can be mapped 1:1 to PCI address
      space. The GRPCI2 has resizeable target BARs, by default the
      first is made 256MB and all other BARs are disabled.
      
      I/O space are always located on 0x1000-0x10000, but accessed
      through the GRPCI2 PCI I/O Window memory mapped to virtual
      address space.
      
      Configuration space is accessed through the 64KB GRPCI2 PCI
      CFG Window using LDA bypassing the MMU.
      
      The GRPCI2 has a single PCI Window for prefetchable and non-
      prefetchable address space, it is up to the AHB master
      requesting PCI data to determine access type. Memory space
      is mapped 1:1.
      
      The GRPCI2 core can be configured in 4 different IRQ modes,
      where PCI Interrupt, Error Interrupt and DMA Interrupt are
      shared on a single IRQ line or at most 5 IRQs are used. The
      GRPCI2 can mask/unmask PCI interrupts, Err and DMA in the control
      and check status bits which tells us which IRQ really happended.
      The GENIRQ layer is used to unmask/mask each individual IRQ
      source by creating virtual IRQs and implementing a IRQ chip.
      
      The optional DMA functionality of the GRPCI2 is not supported
      by this patch.
      Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5d07b786
    • D
      sparc32,leon: added LEON-common low-level PCI routines · 26893c13
      Daniel Hellstrom 提交于
      The LEON architecture does not have a BIOS or bootloader that
      initializes PCI for us, instead Linux generic PCI layer is used
      to set up resources and IRQ.
      Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      26893c13
    • D
      cfe3af5d
  14. 29 5月, 2011 1 次提交
    • E
      ns: Wire up the setns system call · 7b21fddd
      Eric W. Biederman 提交于
      32bit and 64bit on x86 are tested and working.  The rest I have looked
      at closely and I can't find any problems.
      
      setns is an easy system call to wire up.  It just takes two ints so I
      don't expect any weird architecture porting problems.
      
      While doing this I have noticed that we have some architectures that are
      very slow to get new system calls.  cris seems to be the slowest where
      the last system calls wired up were preadv and pwritev.  avr32 is weird
      in that recvmmsg was wired up but never declared in unistd.h.  frv is
      behind with perf_event_open being the last syscall wired up.  On h8300
      the last system call wired up was epoll_wait.  On m32r the last system
      call wired up was fallocate.  mn10300 has recvmmsg as the last system
      call wired up.  The rest seem to at least have syncfs wired up which was
      new in the 2.6.39.
      
      v2: Most of the architecture support added by Daniel Lezcano <dlezcano@fr.ibm.com>
      v3: ported to v2.6.36-rc4 by: Eric W. Biederman <ebiederm@xmission.com>
      v4: Moved wiring up of the system call to another patch
      v5: ported to v2.6.39-rc6
      v6: rebased onto parisc-next and net-next to avoid syscall  conflicts.
      v7: ported to Linus's latest post 2.6.39 tree.
      
      >  arch/blackfin/include/asm/unistd.h     |    3 ++-
      >  arch/blackfin/mach-common/entry.S      |    1 +
      Acked-by: NMike Frysinger <vapier@gentoo.org>
      
      Oh - ia64 wiring looks good.
      Acked-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      7b21fddd
  15. 25 5月, 2011 1 次提交
    • P
      sparc: mmu_gather rework · 90f08e39
      Peter Zijlstra 提交于
      Rework the sparc mmu_gather usage to conform to the new world order :-)
      
      Sparc mmu_gather does two things:
       - tracks vaddrs to unhash
       - tracks pages to free
      
      Split these two things like powerpc has done and keep the vaddrs
      in per-cpu data structures and flush them on context switch.
      
      The remaining bits can then use the generic mmu_gather.
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Acked-by: NDavid Miller <davem@davemloft.net>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
      Cc: Hugh Dickins <hughd@google.com>
      Cc: Mel Gorman <mel@csn.ul.ie>
      Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
      Cc: Nick Piggin <npiggin@kernel.dk>
      Cc: Namhyung Kim <namhyung@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      90f08e39
  16. 23 5月, 2011 1 次提交
    • S
      sparc32: fix build, fix missing cpu_relax declaration · f400bdb1
      Sam Ravnborg 提交于
      Fix following sparc (32 bit) build error:
      
        CC      arch/sparc/kernel/asm-offsets.s
      In file included from include/linux/seqlock.h:29:0,
                       from include/linux/time.h:8,
                       from include/linux/timex.h:56,
                       from include/linux/sched.h:57,
                       from arch/sparc/kernel/asm-offsets.c:13:
      include/linux/spinlock.h: In function 'spin_unlock_wait':
      include/linux/spinlock.h:360:2: error: implicit declaration of function 'cpu_relax'
      
      Most likely caused by commit e66eed65 ("list: remove
      prefetching from regular list iterators") due to include
      changes.
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f400bdb1
  17. 20 5月, 2011 1 次提交
  18. 17 5月, 2011 4 次提交
  19. 13 5月, 2011 1 次提交
  20. 06 5月, 2011 1 次提交
    • A
      net: Add sendmmsg socket system call · 228e548e
      Anton Blanchard 提交于
      This patch adds a multiple message send syscall and is the send
      version of the existing recvmmsg syscall. This is heavily
      based on the patch by Arnaldo that added recvmmsg.
      
      I wrote a microbenchmark to test the performance gains of using
      this new syscall:
      
      http://ozlabs.org/~anton/junkcode/sendmmsg_test.c
      
      The test was run on a ppc64 box with a 10 Gbit network card. The
      benchmark can send both UDP and RAW ethernet packets.
      
      64B UDP
      
      batch   pkts/sec
      1       804570
      2       872800 (+ 8 %)
      4       916556 (+14 %)
      8       939712 (+17 %)
      16      952688 (+18 %)
      32      956448 (+19 %)
      64      964800 (+20 %)
      
      64B raw socket
      
      batch   pkts/sec
      1       1201449
      2       1350028 (+12 %)
      4       1461416 (+22 %)
      8       1513080 (+26 %)
      16      1541216 (+28 %)
      32      1553440 (+29 %)
      64      1557888 (+30 %)
      
      We see a 20% improvement in throughput on UDP send and 30%
      on raw socket send.
      
      [ Add sparc syscall entries. -DaveM ]
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      228e548e
  21. 22 4月, 2011 4 次提交
    • D
      sparc32: always define boot_cpu_id · 5fcafb7a
      Daniel Hellstrom 提交于
      Define boot_cpu_id in single-processor kernels as well. This is
      to support architectures which can boot on other than CPU0.
      
      Sam Ravnborg has written the cleanup parts by extracting
      boot_cpu_id from smp_32.c into setup_32.c and cleaned up
      sun4d_irq.c.
      
      boot_cpu_id was initialized before BSS was cleared in
      sun4c_continue_boot, instead boot_cpu_id is set to 0xff to
      avoid BSS. If boot_cpu_id is untouched (0xff) by bootup code
      it will be overwritten to 0. boot_cpu_id4 is automatically
      calculated in common code.
      Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5fcafb7a
    • S
      sparc32: avoid build warning at mm/percpu.c:1647 · eb485d64
      Sam Ravnborg 提交于
      Fix following warning:
      
      mm/percpu.c: In function 'pcpu_embed_first_chunk':
      mm/percpu.c:1647:3: warning: format '%lx' expects type 'long unsigned int', but argument 3 has type 'unsigned int'
      Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>
      [sam: added warning message to changelog, use _AC()]
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      eb485d64
    • S
      sparc32: probe for cpu info only during startup · 9c2853af
      Sam Ravnborg 提交于
      We did a cpu_probe() call each time a CPU got online - which
      only effect was to save latest CPU/FPU info for use by show_cpuinfo().
      Use same setup as for sparc64 where we probe for this info during startup,
      and only once.
      
      This allowed us to annotate a few functions __init which again
      fixed the following section mismatch warnings:
      
      WARNING: vmlinux.o(.text+0x65f0): Section mismatch in reference from the function set_cpu_and_fpu() to the (unknown reference) .init.rodata:(unknown)
      WARNING: vmlinux.o(.text+0x65f8): Section mismatch in reference from the function set_cpu_and_fpu() to the (unknown reference) .init.rodata:(unknown)
      WARNING: vmlinux.o(.text+0x664c): Section mismatch in reference from the function set_cpu_and_fpu() to the variable .init.rodata:manufacturer_info
      WARNING: vmlinux.o(.text+0x6650): Section mismatch in reference from the function set_cpu_and_fpu() to the variable .init.rodata:manufacturer_info
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9c2853af
    • S
      sparc: consolidate show_cpuinfo in cpu.c · cb1b8209
      Sam Ravnborg 提交于
      We have all the cpu related info in cpu.c - so move
      the remaining functions to support /proc/cpuinfo to this file.
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cb1b8209