1. 11 9月, 2011 10 次提交
  2. 25 5月, 2011 1 次提交
  3. 31 3月, 2011 1 次提交
  4. 11 3月, 2011 1 次提交
  5. 04 12月, 2010 1 次提交
  6. 25 10月, 2010 4 次提交
  7. 09 8月, 2010 1 次提交
  8. 02 8月, 2010 3 次提交
    • B
      mtd: nand: more BB Detection refactoring and dynamic scan options · 58373ff0
      Brian Norris 提交于
      This is a revision to PATCH 2/2 that I sent. Link:
      http://lists.infradead.org/pipermail/linux-mtd/2010-July/030911.html
      
      Added new flag for scanning of both bytes 1 and 6 of the OOB for
      a BB marker (instead of simply one or the other).
      
      The "check_pattern" and "check_short_pattern" functions were updated
      to include support for scanning the two different locations in the OOB.
      
      In order to handle increases in variety of necessary scanning patterns,
      I implemented dynamic memory allocation of nand_bbt_descr structs
      in new function 'nand_create_default_bbt_descr()'. This replaces
      some increasingly-unwieldy, statically-declared descriptors. It can
      replace several more (e.g. "flashbased" structs). However, I do not
      test the flashbased options personally.
      
      How this was tested:
      
      I referenced 30+ data sheets (covering 100+ parts), and I tested a
      selection of 10 different chips to varying degrees. Particularly, I
      tested the creation of bad-block descriptors and basic BB scanning on
      three parts:
      
      ST NAND04GW3B2D, 2K page
      ST NAND128W3A, 512B page
      Samsung K9F1G08U0A, 2K page
      
      To test these, I wrote some fake bad block markers to the flash (in OOB
      bytes 1, 6, and elsewhere) to see if the scanning routine would detect
      them properly. However, this method was somewhat limited because the
      driver I am using has some bugs in its OOB write functionality.
      Signed-off-by: NBrian Norris <norris@broadcom.com>
      Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      58373ff0
    • B
      mtd: nand: refactor BB marker detection · c7b28e25
      Brian Norris 提交于
      Some level of support for various scanning locations was already built in,
      but this required clean-up. First, BB marker location cannot be determined
      _only_ by the page size. Instead, I implemented some heuristic detection
      based on data sheets from various manufacturers (all found in
      nand_base.c:nand_get_flash_type()).
      
      Second, once these options were identified, they were not handled properly
      by nand_bbt.c:nand_default_bbt(). I updated the static nand_bbt_desc structs
      to reflect the need for more combinations of detection. The memory allocation
      here probably needs to be done dynamically in the very near future (see next
      patches).
      Signed-off-by: NBrian Norris <norris@broadcom.com>
      Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      c7b28e25
    • B
      mtd: nand: edit macro flag for BBT scan of last page in block · 30fe8115
      Brian Norris 提交于
      NAND_BB_LAST_PAGE used to be in nand.h, but it pertained to bad block
      management and so belongs next to NAND_BBT_SCAN2NDPAGE in bbm.h. Also,
      its previous flag value (0x00000400) conflicted with NAND_BBT_SCANALLPAGES
      so I changed its value to 0x00008000. All uses of the name were modified to
      provide consistency with other "NAND_BBT_*" flags.
      Signed-off-by: NBrian Norris <norris@broadcom.com>
      Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      30fe8115
  9. 14 5月, 2010 1 次提交
    • K
      mtd: nand: support alternate BB marker locations on MLC · b60b08b0
      Kevin Cernekee 提交于
      This is a slightly modified version of a patch submitted last year by
      Reuben Dowle <reuben.dowle@navico.com>.  His original comments follow:
      
      This patch adds support for some MLC NAND flashes that place the BB
      marker in the LAST page of the bad block rather than the FIRST page used
      for SLC NAND and other types of MLC nand.
      
      Lifted from Samsung datasheet for K9LG8G08U0A (1Gbyte MLC NAND):
      "
      Identifying Initial Invalid Block(s)
      All device locations are erased(FFh) except locations where the initial
      invalid block(s) information is written prior to shipping. The initial
      invalid block(s) status is defined by the 1st byte in the spare area.
      Samsung makes sure that the last page of every initial invalid block has
      non-FFh data at the column address of 2,048.
      ...
      "
      
      As far as I can tell, this is the same for all Samsung MLC nand, and in
      fact the samsung bsp for the processor used in our project (s3c6410)
      actually contained a hack similar to this patch but less portable to
      enable use of their NAND parts. I discovered this problem when trying to
      use a Micron NAND which does not used this layout - I wish samsung would
      put their stuff in main-line to avoid this type of problem.
      
      Currently this patch causes all MLC nand with manufacturer codes from
      Samsung and ST(Numonyx) to use this alternative location, since these
      are the manufactures that I know of that use this layout.
      Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      b60b08b0
  10. 27 2月, 2010 1 次提交
  11. 10 12月, 2008 1 次提交
    • A
      [MTD] update internal API to support 64-bit device size · 69423d99
      Adrian Hunter 提交于
      MTD internal API presently uses 32-bit values to represent
      device size.  This patch updates them to 64-bits but leaves
      the external API unchanged.  Extending the external API
      is a separate issue for several reasons.  First, no one
      needs it at the moment.  Secondly, whether the implementation
      is done with IOCTLs, sysfs or both is still debated.  Thirdly
      external API changes require the internal API to be accepted
      first.
      
      Note that although the MTD API will be able to support 64-bit
      device sizes, existing drivers do not and are not required
      to do so, although NAND base has been updated.
      
      In general, changing from 32-bit to 64-bit values cause little
      or no changes to the majority of the code with the following
      exceptions:
          	- printk message formats
          	- division and modulus of 64-bit values
          	- NAND base support
      	- 32-bit local variables used by mtdpart and mtdconcat
      	- naughtily assuming one structure maps to another
      	in MEMERASE ioctl
      Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
      Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      69423d99
  12. 05 6月, 2008 1 次提交
  13. 29 11月, 2006 2 次提交
  14. 26 9月, 2006 1 次提交
  15. 30 5月, 2006 1 次提交
    • T
      [MTD] NAND Expose the new raw mode function and status info to userspace · f1a28c02
      Thomas Gleixner 提交于
      The raw read/write access to NAND (without ECC) has been changed in the
      NAND rework. Expose the new way - setting the file mode via ioctl - to
      userspace. Also allow to read out the ecc statistics information so userspace
      tools can see that bitflips happened and whether errors where correctable
      or not. Also expose the number of bad blocks for the partition, so nandwrite
      can check if the data fits into the parition before writing to it.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      f1a28c02
  16. 29 5月, 2006 1 次提交
    • T
      [MTD] Rework the out of band handling completely · 8593fbc6
      Thomas Gleixner 提交于
      Hopefully the last iteration on this!
      
      The handling of out of band data on NAND was accompanied by tons of fruitless
      discussions and halfarsed patches to make it work for a particular
      problem. Sufficiently annoyed by I all those "I know it better" mails and the
      resonable amount of discarded "it solves my problem" patches, I finally decided
      to go for the big rework. After removing the _ecc variants of mtd read/write
      functions the solution to satisfy the various requirements was to refactor the
      read/write _oob functions in mtd.
      
      The major change is that read/write_oob now takes a pointer to an operation
      descriptor structure "struct mtd_oob_ops".instead of having a function with at
      least seven arguments.
      
      read/write_oob which should probably renamed to a more descriptive name, can do
      the following tasks:
      
      - read/write out of band data
      - read/write data content and out of band data
      - read/write raw data content and out of band data (ecc disabled)
      
      struct mtd_oob_ops has a mode field, which determines the oob handling mode.
      
      Aside of the MTD_OOB_RAW mode, which is intended to be especially for
      diagnostic purposes and some internal functions e.g. bad block table creation,
      the other two modes are for mtd clients:
      
      MTD_OOB_PLACE puts/gets the given oob data exactly to/from the place which is
      described by the ooboffs and ooblen fields of the mtd_oob_ops strcuture. It's
      up to the caller to make sure that the byte positions are not used by the ECC
      placement algorithms.
      
      MTD_OOB_AUTO puts/gets the given oob data automaticaly to/from the places in
      the out of band area which are described by the oobfree tuples in the ecclayout
      data structre which is associated to the devicee.
      
      The decision whether data plus oob or oob only handling is done depends on the
      setting of the datbuf member of the data structure. When datbuf == NULL then
      the internal read/write_oob functions are selected, otherwise the read/write
      data routines are invoked.
      
      Tested on a few platforms with all variants. Please be aware of possible
      regressions for your particular device / application scenario
      
      Disclaimer: Any whining will be ignored from those who just contributed "hot
      air blurb" and never sat down to tackle the underlying problem of the mess in
      the NAND driver grown over time and the big chunk of work to fix up the
      existing users. The problem was not the holiness of the existing MTD
      interfaces. The problems was the lack of time to go for the big overhaul. It's
      easy to add more mess to the existing one, but it takes alot of effort to go
      for a real solution.
      
      Improvements and bugfixes are welcome!
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      8593fbc6
  17. 27 5月, 2006 1 次提交
  18. 23 5月, 2006 2 次提交
  19. 14 5月, 2006 1 次提交
  20. 13 5月, 2006 2 次提交
  21. 07 11月, 2005 1 次提交
  22. 16 7月, 2005 1 次提交
  23. 29 6月, 2005 1 次提交