1. 30 5月, 2014 2 次提交
    • A
      KVM: PPC: E500: Add dcbtls emulation · 8f20a3ab
      Alexander Graf 提交于
      The dcbtls instruction is able to lock data inside the L1 cache.
      
      We don't want to give the guest actual access to hardware cache locks,
      as that could influence other VMs on the same system. But we can tell
      the guest that its locking attempt failed.
      
      By implementing the instruction we at least don't give the guest a
      program exception which it definitely does not expect.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      8f20a3ab
    • A
      KVM: PPC: E500: Ignore L1CSR1_ICFI,ICLFR · 07fec1c2
      Alexander Graf 提交于
      The L1 instruction cache control register contains bits that indicate
      that we're still handling a request. Mask those out when we set the SPR
      so that a read doesn't assume we're still doing something.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      07fec1c2
  2. 13 4月, 2014 1 次提交
  3. 09 4月, 2014 14 次提交
    • S
      powerpc/powernv Adapt opal-elog and opal-dump to new sysfs_remove_file_self · cc4f265a
      Stewart Smith 提交于
      We are currently using sysfs_schedule_callback() which is deprecated
      and about to be removed. Switch to the new interface instead.
      Signed-off-by: NStewart Smith <stewart@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      cc4f265a
    • M
      power, sched: stop updating inside arch_update_cpu_topology() when nothing to be update · 9a013361
      Michael Wang 提交于
      Since v1:
      	Edited the comment according to Srivatsa's suggestion.
      
      During the testing, we encounter below WARN followed by Oops:
      
      	WARNING: at kernel/sched/core.c:6218
      	...
      	NIP [c000000000101660] .build_sched_domains+0x11d0/0x1200
      	LR [c000000000101358] .build_sched_domains+0xec8/0x1200
      	PACATMSCRATCH [800000000000f032]
      	Call Trace:
      	[c00000001b103850] [c000000000101358] .build_sched_domains+0xec8/0x1200
      	[c00000001b1039a0] [c00000000010aad4] .partition_sched_domains+0x484/0x510
      	[c00000001b103aa0] [c00000000016d0a8] .rebuild_sched_domains+0x68/0xa0
      	[c00000001b103b30] [c00000000005cbf0] .topology_work_fn+0x10/0x30
      	...
      	Oops: Kernel access of bad area, sig: 11 [#1]
      	...
      	NIP [c00000000045c000] .__bitmap_weight+0x60/0xf0
      	LR [c00000000010132c] .build_sched_domains+0xe9c/0x1200
      	PACATMSCRATCH [8000000000029032]
      	Call Trace:
      	[c00000001b1037a0] [c000000000288ff4] .kmem_cache_alloc_node_trace+0x184/0x3a0
      	[c00000001b103850] [c00000000010132c] .build_sched_domains+0xe9c/0x1200
      	[c00000001b1039a0] [c00000000010aad4] .partition_sched_domains+0x484/0x510
      	[c00000001b103aa0] [c00000000016d0a8] .rebuild_sched_domains+0x68/0xa0
      	[c00000001b103b30] [c00000000005cbf0] .topology_work_fn+0x10/0x30
      	...
      
      This was caused by that 'sd->groups == NULL' after building groups, which
      was caused by the empty 'sd->span'.
      
      The cpu's domain contained nothing because the cpu was assigned to a wrong
      node, due to the following unfortunate sequence of events:
      
      1. The hypervisor sent a topology update to the guest OS, to notify changes
         to the cpu-node mapping. However, the update was actually redundant - i.e.,
         the "new" mapping was exactly the same as the old one.
      
      2. Due to this, the 'updated_cpus' mask turned out to be empty after exiting
         the 'for-loop' in arch_update_cpu_topology().
      
      3. So we ended up calling stop-machine() with an empty cpumask list, which made
         stop-machine internally elect cpumask_first(cpu_online_mask), i.e., CPU0 as
         the cpu to run the payload (the update_cpu_topology() function).
      
      4. This causes update_cpu_topology() to be run by CPU0. And since 'updates'
         is kzalloc()'ed inside arch_update_cpu_topology(), update_cpu_topology()
         finds update->cpu as well as update->new_nid to be 0. In other words, we
         end up assigning CPU0 (and eventually its siblings) to node 0, incorrectly.
      
      Along with the following wrong updating, it causes the sched-domain rebuild
      code to break and crash the system.
      
      Fix this by skipping the topology update in cases where we find that
      the topology has not actually changed in reality (ie., spurious updates).
      
      CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      CC: Paul Mackerras <paulus@samba.org>
      CC: Nathan Fontenot <nfont@linux.vnet.ibm.com>
      CC: Stephen Rothwell <sfr@canb.auug.org.au>
      CC: Andrew Morton <akpm@linux-foundation.org>
      CC: Robert Jennings <rcj@linux.vnet.ibm.com>
      CC: Jesse Larrew <jlarrew@linux.vnet.ibm.com>
      CC: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>
      CC: Alistair Popple <alistair@popple.id.au>
      Suggested-by: N"Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NMichael Wang <wangyun@linux.vnet.ibm.com>
      Reviewed-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      9a013361
    • T
      powerpc/le: Avoid creatng R_PPC64_TOCSAVE relocations for modules. · d3d35d95
      Tony Breeds 提交于
      When building modules with a native le toolchain the linker will
      generate R_PPC64_TOCSAVE relocations when it's safe to omit saving r2 on
      a plt call.  This isn't helpful in the conext of a kernel module and the
      kernel will fail to load those modules with an error like:
      	nf_conntrack: Unknown ADD relocation: 109
      
      This patch tells the linker to avoid createing R_PPC64_TOCSAVE
      relocations allowing modules to load.
      Signed-off-by: NTony Breeds <tony@bakeyournoodle.com>
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d3d35d95
    • M
      arch/powerpc: Use RCU_INIT_POINTER(x, NULL) in platforms/cell/spu_syscalls.c · 282efb70
      Monam Agarwal 提交于
      Here rcu_assign_pointer() is ensuring that the
      initialization of a structure is carried out before storing a pointer
      to that structure.
      So, rcu_assign_pointer(p, NULL) can always safely be converted to
      RCU_INIT_POINTER(p, NULL).
      Signed-off-by: NMonam Agarwal <monamagarwal123@gmail.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      282efb70
    • M
      powerpc/opal: Add missing include · bfd25d72
      Michael Neuling 提交于
      next-20140324 currently fails compiling celleb_defconfig with:
      
      arch/powerpc/include/asm/opal.h:894:42: error: 'struct notifier_block' declared inside parameter list [-Werror]
      arch/powerpc/include/asm/opal.h:894:42: error: its scope is only this definition or declaration, which is probably not what you want [-Werror]
      arch/powerpc/include/asm/opal.h:896:14: error: 'struct notifier_block' declared inside parameter list [-Werror]
      
      This is due to a missing include which is added here.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      bfd25d72
    • J
      powerpc: Convert last uses of __FUNCTION__ to __func__ · aba6f4f2
      Joe Perches 提交于
      Just about all of these have been converted to __func__,
      so convert the last uses.
      Signed-off-by: NJoe Perches <joe@perches.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      aba6f4f2
    • A
      powerpc: Add lq/stq emulation · f83319d7
      Anton Blanchard 提交于
      Recent CPUs support quad word load and store instructions. Add
      support to the alignment handler for them.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      f83319d7
    • J
      powerpc/powernv: Add invalid OPAL call · e28b05e7
      Joel Stanley 提交于
      This call will not be understood by OPAL, and cause it to add an error
      to it's log. Among other things, this is useful for testing the
      behaviour of the log as it fills up.
      Signed-off-by: NJoel Stanley <joel@jms.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e28b05e7
    • J
      powerpc/powernv: Add OPAL message log interface · bfc36894
      Joel Stanley 提交于
      OPAL provides an in-memory circular buffer containing a message log
      populated with various runtime messages produced by the firmware.
      
      Provide a sysfs interface /sys/firmware/opal/msglog for userspace to
      view the messages.
      Signed-off-by: NJoel Stanley <joel@jms.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      bfc36894
    • M
      powerpc/book3s: Fix mc_recoverable_range buffer overrun issue. · 6e556b47
      Mahesh Salgaonkar 提交于
      Currently we wrongly allocate mc_recoverable_range buffer (to hold
      recoverable ranges) based on size of the property "mcheck-recoverable-ranges".
      This results in allocating less memory to hold available recoverable range
      entries from /proc/device-tree/ibm,opal/mcheck-recoverable-ranges.
      
      This patch fixes this issue by allocating mc_recoverable_range buffer based
      on number of entries of recoverable ranges instead of device property size.
      Without this change we end up allocating less memory and run into memory
      corruption issue.
      Signed-off-by: NMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6e556b47
    • M
      powerpc: Remove dead code in sycall entry · fa5c11b7
      Michael Neuling 提交于
      In:
        commit 742415d6
        Author: Michael Neuling <mikey@neuling.org>
        powerpc: Turn syscall handler into macros
      
      We converted the syscall entry code onto macros, but in doing this we
      introduced some cruft that's never run and should never have been added.
      
      This removes that code.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      fa5c11b7
    • L
      powerpc: Use of_node_init() for the fakenode in msi_bitmap.c · e47ff70a
      Li Zhong 提交于
      This patch uses of_node_init() to initialize the kobject in the fake
      node used in test_of_node(), to avoid following kobject warning.
      
      [    0.897654] kobject: '(null)' (c0000007ca183a08): is not initialized, yet kobject_put() is being called.
      [    0.897682] ------------[ cut here ]------------
      [    0.897688] WARNING: at lib/kobject.c:670
      [    0.897692] Modules linked in:
      [    0.897701] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 3.14.0+ #1
      [    0.897708] task: c0000007ca100000 ti: c0000007ca180000 task.ti: c0000007ca180000
      [    0.897715] NIP: c00000000046a1f0 LR: c00000000046a1ec CTR: 0000000001704660
      [    0.897721] REGS: c0000007ca1835c0 TRAP: 0700   Not tainted  (3.14.0+)
      [    0.897727] MSR: 8000000000029032 <SF,EE,ME,IR,DR,RI>  CR: 28000024  XER: 0000000d
      [    0.897749] CFAR: c0000000008ef4ec SOFTE: 1
      GPR00: c00000000046a1ec c0000007ca183840 c0000000014c59b8 000000000000005c
      GPR04: 0000000000000001 c000000000129770 0000000000000000 0000000000000001
      GPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000003fef
      GPR12: 0000000000000000 c00000000f221200 c00000000000c350 0000000000000000
      GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
      GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
      GPR24: 0000000000000000 c00000000144e808 c000000000c56f20 00000000000000d8
      GPR28: c000000000cd5058 0000000000000000 c000000001454ca8 c0000007ca183a08
      [    0.897856] NIP [c00000000046a1f0] .kobject_put+0xa0/0xb0
      [    0.897863] LR [c00000000046a1ec] .kobject_put+0x9c/0xb0
      [    0.897868] Call Trace:
      [    0.897874] [c0000007ca183840] [c00000000046a1ec] .kobject_put+0x9c/0xb0 (unreliable)
      [    0.897885] [c0000007ca1838c0] [c000000000743f9c] .of_node_put+0x2c/0x50
      [    0.897894] [c0000007ca183940] [c000000000c83954] .test_of_node+0x1dc/0x208
      [    0.897902] [c0000007ca183b80] [c000000000c839a4] .msi_bitmap_selftest+0x24/0x38
      [    0.897913] [c0000007ca183bf0] [c00000000000bb34] .do_one_initcall+0x144/0x200
      [    0.897922] [c0000007ca183ce0] [c000000000c748e4] .kernel_init_freeable+0x2b4/0x394
      [    0.897931] [c0000007ca183db0] [c00000000000c374] .kernel_init+0x24/0x130
      [    0.897940] [c0000007ca183e30] [c00000000000a2f4] .ret_from_kernel_thread+0x5c/0x68
      [    0.897947] Instruction dump:
      [    0.897952] 7fe3fb78 38210080 e8010010 ebe1fff8 7c0803a6 4800014c e89f0000 3c62ff6e
      [    0.897971] 7fe5fb78 3863a950 48485279 60000000 <0fe00000> 39000000 393f0038 4bffff80
      [    0.897992] ---[ end trace 1eeffdb9f825a556 ]---
      Signed-off-by: NLi Zhong <zhong@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e47ff70a
    • A
      powerpc/mm: NUMA pte should be handled via slow path in get_user_pages_fast() · 1dc954bd
      Aneesh Kumar K.V 提交于
      We need to handle numa pte via the slow path
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1dc954bd
    • A
      powerpc/powernv: Fix endian issues with sensor code · 9000c17d
      Anton Blanchard 提交于
      One OPAL call and one device tree property needed byte swapping.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      9000c17d
  4. 08 4月, 2014 3 次提交
  5. 07 4月, 2014 12 次提交
    • G
      cpufreq: powernv: Select CPUFreq related Kconfig options for powernv · 81f35902
      Gautham R. Shenoy 提交于
      Enable CPUFreq for PowerNV. Select "performance", "powersave",
      "userspace" and "ondemand" governors. Choose "ondemand" to be the
      default governor.
      Signed-off-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NGautham R. Shenoy <ego@linux.vnet.ibm.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      81f35902
    • V
      cpufreq: powernv: cpufreq driver for powernv platform · b3d627a5
      Vaidyanathan Srinivasan 提交于
      Backend driver to dynamically set voltage and frequency on
      IBM POWER non-virtualized platforms.  Power management SPRs
      are used to set the required PState.
      
      This driver works in conjunction with cpufreq governors
      like 'ondemand' to provide a demand based frequency and
      voltage setting on IBM POWER non-virtualized platforms.
      
      PState table is obtained from OPAL v3 firmware through device
      tree.
      
      powernv_cpufreq back-end driver would parse the relevant device-tree
      nodes and initialise the cpufreq subsystem on powernv platform.
      
      The code was originally written by svaidy@linux.vnet.ibm.com. Over
      time it was modified to accomodate bug-fixes as well as updates to the
      the cpu-freq core. Relevant portions of the change logs corresponding
      to those modifications are noted below:
      
       * The policy->cpus needs to be populated in a hotplug-invariant
         manner instead of using cpu_sibling_mask() which varies with
         cpu-hotplug. This is because the cpufreq core code copies this
         content into policy->related_cpus mask which should not vary on
         cpu-hotplug. [Authored by srivatsa.bhat@linux.vnet.ibm.com]
      
       * Create a helper routine that can return the cpu-frequency for the
         corresponding pstate_id. Also, cache the values of the pstate_max,
         pstate_min and pstate_nominal and nr_pstates in a static structure
         so that they can be reused in the future to perform any
         validations. [Authored by ego@linux.vnet.ibm.com]
      
       * Create a driver attribute named cpuinfo_nominal_freq which creates
         a sysfs read-only file named cpuinfo_nominal_freq. Export the
         frequency corresponding to the nominal_pstate through this
         interface.
      
           Nominal frequency is the highest non-turbo frequency for the
         platform.  This is generally used for setting governor policies
         from user space for optimal energy efficiency. [Authored by
         ego@linux.vnet.ibm.com]
      
       * Implement a powernv_cpufreq_get(unsigned int cpu) method which will
         return the current operating frequency. Export this via the sysfs
         interface cpuinfo_cur_freq by setting powernv_cpufreq_driver.get to
         powernv_cpufreq_get(). [Authored by ego@linux.vnet.ibm.com]
      
      [Change log updated by ego@linux.vnet.ibm.com]
      Reviewed-by: NPreeti U Murthy <preeti@linux.vnet.ibm.com>
      Signed-off-by: NVaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
      Signed-off-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NGautham R. Shenoy <ego@linux.vnet.ibm.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      b3d627a5
    • A
      powerpc/powernv: Fix endian issues with OPAL async code · bb4398e1
      Anton Blanchard 提交于
      OPAL defines opal_msg as a big endian struct so we have to
      byte swap it on little endian builds.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      bb4398e1
    • B
      powerpc/powernv: Add opal_notifier_unregister() and export to modules · 798af00c
      Benjamin Herrenschmidt 提交于
      opal_notifier_register() is missing a pending "unregister" variant
      and should be exposed to modules.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      798af00c
    • B
      powerpc/ppc64: Do not turn AIL (reloc-on interrupts) too early · 8f619b54
      Benjamin Herrenschmidt 提交于
      Turn them on at the same time as we allow MSR_IR/DR in the paca
      kernel MSR, ie, after the MMU has been setup enough to be able
      to handle relocated access to the linear mapping.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8f619b54
    • B
      powerpc/ppc64: Gracefully handle early interrupts · a944a9c4
      Benjamin Herrenschmidt 提交于
      If we take an interrupt such as a trap caused by a BUG_ON before the
      MMU has been setup, the interrupt handlers try to enable virutal mode
      and cause a recursive crash, making the original problem very hard
      to debug.
      
      This fixes it by adjusting the "kernel_msr" value in the PACA so that
      it only has MSR_IR and MSR_DR (translation for instruction and data)
      set after the MMU has been initialized for the processor.
      
      We may still not have a console yet but at least we don't get into
      a recursive fault (and early debug console or memory dump via JTAG
      of the kernel buffer *will* give us the proper error).
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a944a9c4
    • B
      powerpc/prom: early_init_dt_scan_cpus() updates cpu features only once · 7222f779
      Benjamin Herrenschmidt 提交于
      All our cpu feature updates were done for every CPU in the device-tree,
      thus overwriting the cputable bits over and over again. Instead do them
      only for the boot CPU.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      7222f779
    • B
      powerpc: Make boot_cpuid common between 32 and 64-bit · 36ae37e3
      Benjamin Herrenschmidt 提交于
      Move the definition to setup-common.c and set the init value
      to -1 on both 32 and 64-bit (it was 0 on 64-bit).
      
      Additionally add a check to prom.c to garantee that the init
      value has been udpated after the DT scan.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      36ae37e3
    • B
      powerpc: Adjust CPU_FTR_SMT on all platforms · 4a85b31d
      Benjamin Herrenschmidt 提交于
      For historical reasons that code was under #ifdef CONFIG_PPC_PSERIES
      but it applies equally to all 64-bit platforms.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      4a85b31d
    • M
      powerpc/tm: Disable IRQ in tm_recheckpoint · e6b8fd02
      Michael Neuling 提交于
      We can't take an IRQ when we're about to do a trechkpt as our GPR state is set
      to user GPR values.
      
      We've hit this when running some IBM Java stress tests in the lab resulting in
      the following dump:
      
        cpu 0x3f: Vector: 700 (Program Check) at [c000000007eb3d40]
            pc: c000000000050074: restore_gprs+0xc0/0x148
            lr: 00000000b52a8184
            sp: ac57d360
           msr: 8000000100201030
          current = 0xc00000002c500000
          paca    = 0xc000000007dbfc00     softe: 0     irq_happened: 0x00
            pid   = 34535, comm = Pooled Thread #
        R00 = 00000000b52a8184   R16 = 00000000b3e48fda
        R01 = 00000000ac57d360   R17 = 00000000ade79bd8
        R02 = 00000000ac586930   R18 = 000000000fac9bcc
        R03 = 00000000ade60000   R19 = 00000000ac57f930
        R04 = 00000000f6624918   R20 = 00000000ade79be8
        R05 = 00000000f663f238   R21 = 00000000ac218a54
        R06 = 0000000000000002   R22 = 000000000f956280
        R07 = 0000000000000008   R23 = 000000000000007e
        R08 = 000000000000000a   R24 = 000000000000000c
        R09 = 00000000b6e69160   R25 = 00000000b424cf00
        R10 = 0000000000000181   R26 = 00000000f66256d4
        R11 = 000000000f365ec0   R27 = 00000000b6fdcdd0
        R12 = 00000000f66400f0   R28 = 0000000000000001
        R13 = 00000000ada71900   R29 = 00000000ade5a300
        R14 = 00000000ac2185a8   R30 = 00000000f663f238
        R15 = 0000000000000004   R31 = 00000000f6624918
        pc  = c000000000050074 restore_gprs+0xc0/0x148
        cfar= c00000000004fe28 dont_restore_vec+0x1c/0x1a4
        lr  = 00000000b52a8184
        msr = 8000000100201030   cr  = 24804888
        ctr = 0000000000000000   xer = 0000000000000000   trap =  700
      
      This moves tm_recheckpoint to a C function and moves the tm_restore_sprs into
      that function.  It then adds IRQ disabling over the trechkpt critical section.
      It also sets the TEXASR FS in the signals code to ensure this is never set now
      that we explictly write the TM sprs in tm_recheckpoint.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      cc: stable@vger.kernel.org
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e6b8fd02
    • G
      powerpc/le: Enable RTAS events support · a08a53ea
      Greg Kurz 提交于
      The current kernel code assumes big endian and parses RTAS events all
      wrong. The most visible effect is that we cannot honor EPOW events,
      meaning, for example, we cannot shut down a guest properly from the
      hypervisor.
      
      This new patch is largely inspired by Nathan's work: we get rid of all
      the bit fields in the RTAS event structures (even the unused ones, for
      consistency). We also introduce endian safe accessors for the fields used
      by the kernel (trivial rtas_error_type() accessor added for consistency).
      
      Cc: Nathan Fontenot <nfont@linux.vnet.ibm.com>
      Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a08a53ea
    • S
      powerpc: Correct emulated mtfsf instruction · c59c015b
      Stephen Chivers 提交于
      The emulated (CONFIG_MATH_EMULATION_FULL)
      PowerPC Floating Point instruction mtfsf
      does not correctly copy bits from its source
      register to the Floating Point Status and Register (FPSCR).
      
      The error is in the preparation of the mask used to
      select the bits to be copied from the source to the FPSCR.
      
      Execution of the mtfsf instruction does not produce the same
      results on a MPC8548 platform (emulated floating point)
      as on MPC7410 or 440EP platforms (hardware floating point).
      
      This error has been detected using a Freescale MPC8548
      based platform and the patch below tested using that platform.
      
      The patch is based on the patch(es) provided by
      Gabriel Paubert and analysis by Gabriel, James Yang and David Laight.
      Signed-off-by: NStephen Chivers <schivers@csc.com>
      Signed-off-by: NGabriel Paubert <paubert@iram.es>
      Tested-by: NStephen Chivers <schivers@csc.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c59c015b
  6. 02 4月, 2014 1 次提交
  7. 31 3月, 2014 1 次提交
    • D
      net: filter: add jited flag to indicate jit compiled filters · f8bbbfc3
      Daniel Borkmann 提交于
      This patch adds a jited flag into sk_filter struct in order to indicate
      whether a filter is currently jited or not. The size of sk_filter is
      not being expanded as the 32 bit 'len' member allows upper bits to be
      reused since a filter can currently only grow as large as BPF_MAXINSNS.
      
      Therefore, there's enough room also for other in future needed flags to
      reuse 'len' field if necessary. The jited flag also allows for having
      alternative interpreter functions running as currently, we can only
      detect jit compiled filters by testing fp->bpf_func to not equal the
      address of sk_run_filter().
      
      Joint work with Alexei Starovoitov.
      Signed-off-by: NAlexei Starovoitov <ast@plumgrid.com>
      Signed-off-by: NDaniel Borkmann <dborkman@redhat.com>
      Cc: Pablo Neira Ayuso <pablo@netfilter.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f8bbbfc3
  8. 29 3月, 2014 6 次提交
    • P
      KVM: PPC: Book3S HV: Save/restore host PMU registers that are new in POWER8 · 72cde5a8
      Paul Mackerras 提交于
      Currently we save the host PMU configuration, counter values, etc.,
      when entering a guest, and restore it on return from the guest.
      (We have to do this because the guest has control of the PMU while
      it is executing.)  However, we missed saving/restoring the SIAR and
      SDAR registers, as well as the registers which are new on POWER8,
      namely SIER and MMCR2.
      
      This adds code to save the values of these registers when entering
      the guest and restore them on exit.  This also works around the bug
      in POWER8 where setting PMAE with a counter already negative doesn't
      generate an interrupt.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Acked-by: NScott Wood <scottwood@freescale.com>
      72cde5a8
    • P
      KVM: PPC: Book3S HV: Fix decrementer timeouts with non-zero TB offset · c5fb80d3
      Paul Mackerras 提交于
      Commit c7699822bc21 ("KVM: PPC: Book3S HV: Make physical thread 0 do
      the MMU switching") reordered the guest entry/exit code so that most
      of the guest register save/restore code happened in guest MMU context.
      A side effect of that is that the timebase still contains the guest
      timebase value at the point where we compute and use vcpu->arch.dec_expires,
      and therefore that is now a guest timebase value rather than a host
      timebase value.  That in turn means that the timeouts computed in
      kvmppc_set_timer() are wrong if the timebase offset for the guest is
      non-zero.  The consequence of that is things such as "sleep 1" in a
      guest after migration may sleep for much longer than they should.
      
      This fixes the problem by converting between guest and host timebase
      values as necessary, by adding or subtracting the timebase offset.
      This also fixes an incorrect comment.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Acked-by: NScott Wood <scottwood@freescale.com>
      c5fb80d3
    • P
      KVM: PPC: Book3S HV: Don't use kvm_memslots() in real mode · 797f9c07
      Paul Mackerras 提交于
      With HV KVM, some high-frequency hypercalls such as H_ENTER are handled
      in real mode, and need to access the memslots array for the guest.
      Accessing the memslots array is safe, because we hold the SRCU read
      lock for the whole time that a guest vcpu is running.  However, the
      checks that kvm_memslots() does when lockdep is enabled are potentially
      unsafe in real mode, when only the linear mapping is available.
      Furthermore, kvm_memslots() can be called from a secondary CPU thread,
      which is an offline CPU from the point of view of the host kernel,
      and is not running the task which holds the SRCU read lock.
      
      To avoid false positives in the checks in kvm_memslots(), and to avoid
      possible side effects from doing the checks in real mode, this replaces
      kvm_memslots() with kvm_memslots_raw() in all the places that execute
      in real mode.  kvm_memslots_raw() is a new function that is like
      kvm_memslots() but uses rcu_dereference_raw_notrace() instead of
      kvm_dereference_check().
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Acked-by: NScott Wood <scottwood@freescale.com>
      797f9c07
    • P
      KVM: PPC: Book3S HV: Return ENODEV error rather than EIO · 739e2425
      Paul Mackerras 提交于
      If an attempt is made to load the kvm-hv module on a machine which
      doesn't have hypervisor mode available, return an ENODEV error,
      which is the conventional thing to return to indicate that this
      module is not applicable to the hardware of the current machine,
      rather than EIO, which causes a warning to be printed.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Acked-by: NScott Wood <scottwood@freescale.com>
      739e2425
    • P
      KVM: PPC: Book3S: Trim top 4 bits of physical address in RTAS code · b24f36f3
      Paul Mackerras 提交于
      The in-kernel emulation of RTAS functions needs to read the argument
      buffer from guest memory in order to find out what function is being
      requested.  The guest supplies the guest physical address of the buffer,
      and on a real system the code that reads that buffer would run in guest
      real mode.  In guest real mode, the processor ignores the top 4 bits
      of the address specified in load and store instructions.  In order to
      emulate that behaviour correctly, we need to mask off those bits
      before calling kvm_read_guest() or kvm_write_guest().  This adds that
      masking.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Acked-by: NScott Wood <scottwood@freescale.com>
      b24f36f3
    • M
      KVM: PPC: Book3S HV: Add get/set_one_reg for new TM state · a7d80d01
      Michael Neuling 提交于
      This adds code to get/set_one_reg to read and write the new transactional
      memory (TM) state.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Acked-by: NScott Wood <scottwood@freescale.com>
      a7d80d01