- 19 2月, 2016 3 次提交
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由 Mika Westerberg 提交于
This allows sysfs nodes to read the cached value directly instead of powering up possibly runtime suspended controller. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Lior Amsalem 提交于
The main difference in the new Armada 3700 is that no address decoding needs to take place in the driver probe. [gregory.clement@free-electrons.com: reformulate the commit log] Signed-off-by: NLior Amsalem <alior@marvell.com> Reviewed-by: NNadav Haklai <nadavh@marvell.com> Tested-by: NNadav Haklai <nadavh@marvell.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Tejun Heo 提交于
ata_scsi_park_show() was pairing spin_lock_irqsave() with spin_unlock_irq(). As the function is always called with irq enabled, it didn't actually break anything. Use spin_lock_irq() instead. Signed-off-by: NTejun Heo <tj@kernel.org> Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Cc: Elias Oltmanns <eo@nebensachen.de>
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- 11 2月, 2016 6 次提交
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由 Aleksey Makarov 提交于
The OCTEON SATA controller is currently found on cn71XX devices. Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NVinita Gupta <vgupta@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: NZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Arnd Bergmann 提交于
As reported by Soohoon Lee, the HDIO_GET_32BIT ioctl does not work correctly in compat mode with libata. I have investigated the issue further and found multiple problems that all appeared with the same commit that originally introduced HDIO_GET_32BIT handling in libata back in linux-2.6.8 and presumably also linux-2.4, as the code uses "copy_to_user(arg, &val, 1)" to copy a 'long' variable containing either 0 or 1 to user space. The problems with this are: * On big-endian machines, this will always write a zero because it stores the wrong byte into user space. * In compat mode, the upper three bytes of the variable are updated by the compat_hdio_ioctl() function, but they now contain uninitialized stack data. * The hdparm tool calling this ioctl uses a 'static long' variable to store the result. This means at least the upper bytes are initialized to zero, but calling another ioctl like HDIO_GET_MULTCOUNT would fill them with data that remains stale when the low byte is overwritten. Fortunately libata doesn't implement any of the affected ioctl commands, so this would only happen when we query both an IDE and an ATA device in the same command such as "hdparm -N -c /dev/hda /dev/sda" * The libata code for unknown reasons started using ATA_IOC_GET_IO32 and ATA_IOC_SET_IO32 as aliases for HDIO_GET_32BIT and HDIO_SET_32BIT, while the ioctl commands that were added later use the normal HDIO_* names. This is harmless but rather confusing. This addresses all four issues by changing the code to use put_user() on an 'unsigned long' variable in HDIO_GET_32BIT, like the IDE subsystem does, and by clarifying the names of the ioctl commands. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Reported-by: NSoohoon Lee <Soohoon.Lee@f5.com> Tested-by: NSoohoon Lee <Soohoon.Lee@f5.com> Cc: stable@vger.kernel.org Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Suman Tripathi 提交于
ahci_xgene: Implement the workaround to fix the missing of the edge interrupt for the HOST_IRQ_STAT. Due to H/W errata, the HOST_IRQ_STAT register misses the edge interrupt when clearing the HOST_IRQ_STAT register and hardware reporting the PORT_IRQ_STAT register happens to be at the same clock cycle. Signed-off-by: NSuman Tripathi <stripathi@apm.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Suman Tripathi 提交于
The flexibility to override the irq handles in the LLD's are already present, so controllers implementing a edge trigger latch can implement their own interrupt handler inside the driver. This patch removes the AHCI_HFLAG_EDGE_IRQ support from libahci and moves edge irq handling to ahci_xgene. tj: Minor update to description. Signed-off-by: NSuman Tripathi <stripathi@apm.com> Signed-off-by: NTejun Heo <tj@kenrel.org>
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由 Suman Tripathi 提交于
This patch implements the capability to override the generic AHCI interrupt handler so that specific ahci drivers can implement their own custom interrupt handler routines. It also exports ahci_handle_port_intr so that custom irq_handler implementations can use it. tj: s/ahci_irq_handler/irq_handler/ and updated description. Signed-off-by: NSuman Tripathi <stripathi@apm.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Alexandra Yates 提交于
Adding Intel codename DNV platform device IDs for SATA. Signed-off-by: NAlexandra Yates <alexandra.yates@linux.intel.com> Signed-off-by: NTejun Heo <tj@kernel.org> Cc: stable@vger.kernel.org
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- 02 2月, 2016 1 次提交
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由 Tejun Heo 提交于
The bulk of ATA host state machine is implemented by ata_sff_hsm_move(). The function is called from either the interrupt handler or, if polling, a work item. Unlike from the interrupt path, the polling path calls the function without holding the host lock and ata_sff_hsm_move() selectively grabs the lock. This is completely broken. If an IRQ triggers while polling is in progress, the two can easily race and end up accessing the hardware and updating state machine state at the same time. This can put the state machine in an illegal state and lead to a crash like the following. kernel BUG at drivers/ata/libata-sff.c:1302! invalid opcode: 0000 [#1] SMP DEBUG_PAGEALLOC KASAN Modules linked in: CPU: 1 PID: 10679 Comm: syz-executor Not tainted 4.5.0-rc1+ #300 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff88002bd00000 ti: ffff88002e048000 task.ti: ffff88002e048000 RIP: 0010:[<ffffffff83a83409>] [<ffffffff83a83409>] ata_sff_hsm_move+0x619/0x1c60 ... Call Trace: <IRQ> [<ffffffff83a84c31>] __ata_sff_port_intr+0x1e1/0x3a0 drivers/ata/libata-sff.c:1584 [<ffffffff83a85611>] ata_bmdma_port_intr+0x71/0x400 drivers/ata/libata-sff.c:2877 [< inline >] __ata_sff_interrupt drivers/ata/libata-sff.c:1629 [<ffffffff83a85bf3>] ata_bmdma_interrupt+0x253/0x580 drivers/ata/libata-sff.c:2902 [<ffffffff81479f98>] handle_irq_event_percpu+0x108/0x7e0 kernel/irq/handle.c:157 [<ffffffff8147a717>] handle_irq_event+0xa7/0x140 kernel/irq/handle.c:205 [<ffffffff81484573>] handle_edge_irq+0x1e3/0x8d0 kernel/irq/chip.c:623 [< inline >] generic_handle_irq_desc include/linux/irqdesc.h:146 [<ffffffff811a92bc>] handle_irq+0x10c/0x2a0 arch/x86/kernel/irq_64.c:78 [<ffffffff811a7e4d>] do_IRQ+0x7d/0x1a0 arch/x86/kernel/irq.c:240 [<ffffffff86653d4c>] common_interrupt+0x8c/0x8c arch/x86/entry/entry_64.S:520 <EOI> [< inline >] rcu_lock_acquire include/linux/rcupdate.h:490 [< inline >] rcu_read_lock include/linux/rcupdate.h:874 [<ffffffff8164b4a1>] filemap_map_pages+0x131/0xba0 mm/filemap.c:2145 [< inline >] do_fault_around mm/memory.c:2943 [< inline >] do_read_fault mm/memory.c:2962 [< inline >] do_fault mm/memory.c:3133 [< inline >] handle_pte_fault mm/memory.c:3308 [< inline >] __handle_mm_fault mm/memory.c:3418 [<ffffffff816efb16>] handle_mm_fault+0x2516/0x49a0 mm/memory.c:3447 [<ffffffff8127dc16>] __do_page_fault+0x376/0x960 arch/x86/mm/fault.c:1238 [<ffffffff8127e358>] trace_do_page_fault+0xe8/0x420 arch/x86/mm/fault.c:1331 [<ffffffff8126f514>] do_async_page_fault+0x14/0xd0 arch/x86/kernel/kvm.c:264 [<ffffffff86655578>] async_page_fault+0x28/0x30 arch/x86/entry/entry_64.S:986 Fix it by ensuring that the polling path is holding the host lock before entering ata_sff_hsm_move() so that all hardware accesses and state updates are performed under the host lock. Signed-off-by: NTejun Heo <tj@kernel.org> Reported-and-tested-by: NDmitry Vyukov <dvyukov@google.com> Link: http://lkml.kernel.org/g/CACT4Y+b_JsOxJu2EZyEf+mOXORc_zid5V1-pLZSroJVxyWdSpw@mail.gmail.com Cc: stable@vger.kernel.org
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- 29 1月, 2016 1 次提交
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由 Tejun Heo 提交于
ata_sff_hsm_move() triggers BUG if it sees a host state machine state that it dind't expect. The risk for data corruption when the condition occurs is low as it's highly unlikely that it would lead to spurious completion of commands. The BUG occasionally triggered for subtle race conditions in the driver. Let's downgrade it to WARN so that it doesn't kill the machine unnecessarily. Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Dmitry Vyukov <dvyukov@google.com>
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- 26 1月, 2016 3 次提交
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由 Tejun Heo 提交于
Some early controllers incorrectly reported zero ports in PORTS_IMPL register and the ahci driver fabricates PORTS_IMPL from the number of ports in those cases. This hasn't mattered but with the new nvme controllers there are cases where zero PORTS_IMPL is valid and should be honored. Disable the workaround for >= AHCI 1.3. Signed-off-by: NTejun Heo <tj@kernel.org> Reported-by: NAndy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/g/CALCETrU7yMvXEDhjAUShoHEhDwifJGapdw--BKxsP0jmjKGmRw@mail.gmail.com Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: stable@vger.kernel.org
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由 Shikha Jain 提交于
Viking flash model VRFDFC22048UCHC-TE causes data corruption in MWDMA mode. Cc: xe-kernel@external.cisco.com Signed-off-by: NShikha Jain <shikjain@cisco.com> Signed-off-by: NAnil Veliyankara Madam <aveliyan@cisco.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Danesh Petigara 提交于
The AHCI driver code stops and starts port DMA engines at will without considering the power state of the particular port. The AHCI specification isn't very clear on how to handle this scenario, leaving implementation open to interpretation. Broadcom's STB SATA host controller is unable to handle port DMA controller restarts when the port in question is in low power mode. When a port enters partial or slumber mode, its PHY is powered down. When a controller restart is requested, the controller's internal state machine expects the PHY to be brought back up by software which never happens in this case, resulting in failures. To avoid this situation, logic is added to manually wake up the port just before its DMA engine is stopped, if the port happens to be in a low power state. HBA initiated power management ensures that the port eventually returns to its configured low power state, when the link is idle (as per the conditions listed in the spec). A new host flag is also added to ensure this logic is only exercised for hosts with the above limitation. tj: Formatting changes. Signed-off-by: NDanesh Petigara <dpetigara@broadcom.com> Reviewed-by: NMarkus Mayer <mmayer@broadcom.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 09 1月, 2016 3 次提交
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由 Danesh Petigara 提交于
The link resume logic uses a 200msec delay while debouncing the SControl register. The rationale behind that delay is to accommodate some PHYs that behave badly if their SStatus/ SControl registers are pounded immediately on resume. The Broadcom STB SATA PHY does not seem to have this issue. This patch introduces a new link flag that allows platforms to skip the debounce delay if it isn't needed. Signed-off-by: NDanesh Petigara <dpetigara@broadcom.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Danesh Petigara 提交于
The Broadcom STB SATA host controller does not support device initiated power management. Disable support for this feature so the driver never sends SETFEATURES commands to the device to enable/disable DIPM. Signed-off-by: NDanesh Petigara <dpetigara@broadcom.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Danesh Petigara 提交于
Enable support for ALPM in the host controller's capabilities register. Also adjust the PLL timeout to give it enough time to lock when the port exits slumber mode. tj: minor style updates Signed-off-by: NDanesh Petigara <dpetigara@broadcom.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 08 1月, 2016 1 次提交
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由 Anil Veliyankara Madam 提交于
Since msleep() may sleep longer than intended time for values less than 20ms, this patch allows the use of usleep_range for waits less that 20ms. usleep_range is a finer precision implementation of msleep and is designed to be a drop-in replacement for udelay where a precise sleep/busy-wait is unnecessary. More details can be found at http://lkml.org/lkml/2007/8/3/250 and in Documentation/timers/timers-howto.txt. This change has been done to improve the performace in PIO6 mode which is used by viking flash. Cc: xe-kernel@external.cisco.com Signed-off-by: NAnil Veliyankara Madam <aveliyan@cisco.com> Signed-off-by: NShikha Jain <shikjain@cisco.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 01 1月, 2016 2 次提交
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由 Insu Yun 提交于
Since kzalloc can be failed in memory pressure, return error when failed. Signed-off-by: NInsu Yun <wuninsu@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Jaedon Shin 提交于
The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware block for AHCI SATA3. This new compatible string, "brcm,bcm7425-ahci", may be used for most MIPS-based platforms of 40nm process technology. Signed-off-by: NJaedon Shin <jaedon.shin@gmail.com> Tested-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 16 12月, 2015 3 次提交
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由 Tang Yuantian 提交于
Updated the registers' values to enhance SATA performance and reliability on ls1021a soc. Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Tang Yuantian 提交于
The PTC[RXWM] sets the watermark value for Rx FIFO. The default value 0x20 might be insufficient for some hard drives. If the watermark value is too small, a single-cycle overflow may occur and is reported as a CRC or internal error in the PxSERR register. Updated the value to 0x29 according to the validation test. All LS platforms are affected. Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Tang Yuantian 提交于
Updated the registers' values to enhance SATA performance and reliability. Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 07 12月, 2015 4 次提交
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由 Andreas Werner 提交于
Every attempt to issue a read log page command lockup the controller. The command is currently sent if the sata device includes the devlsp feature to read out the timing data. This attempt to read the data, locks up the controller and the device is not recognzied correctly (failed to set xfermode) and cannot be accessed. This was found on Freescale P1013/P1022 and T4240 CPUs using a ATP IG mSATA 4GB with the devslp feature. fsl-sata ff718000.sata: Sata FSL Platform/CSB Driver init [ 1.254195] scsi0 : sata_fsl [ 1.256004] ata1: SATA max UDMA/133 irq 74 [ 1.370666] fsl-gianfar ethernet.3: enabled errata workarounds, flags: 0x4 [ 1.470671] fsl-gianfar ethernet.4: enabled errata workarounds, flags: 0x4 [ 1.775584] ata1: Signature Update detected @ 504 msecs [ 1.947594] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 1.948366] ata1.00: ATA-8: ATP IG mSATA, 20150311, max UDMA/133 [ 1.948371] ata1.00: 7732368 sectors, multi 0: LBA [ 1.948843] ata1.00: failed to get Identify Device Data, Emask 0x1 [ 1.948857] ata1.00: failed to set xfermode (err_mask=0x40) [ 7.467557] ata1: Signature Update detected @ 504 msecs [ 7.639560] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 7.651320] ata1.00: failed to get Identify Device Data, Emask 0x1 [ 7.651360] ata1.00: failed to set xfermode (err_mask=0x40) [ 7.655628] ata1: limiting SATA link speed to 1.5 Gbps [ 7.659458] ata1.00: limiting speed to UDMA/133:PIO3 [ 13.163554] ata1: Signature Update detected @ 504 msecs [ 13.335558] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 13.347298] ata1.00: failed to get Identify Device Data, Emask 0x1 [ 13.347334] ata1.00: failed to set xfermode (err_mask=0x40) [ 13.351601] ata1.00: disabled [ 13.353278] ata1: exception Emask 0x50 SAct 0x0 SErr 0x800 action 0x6 frozen t4 [ 13.359281] ata1: SError: { HostInt } [ 13.361644] ata1: hard resetting link Signed-off-by: NAndreas Werner <andreas.werner@men.de> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Andreas Werner 提交于
Some controller lockup on a ata_read_log_page. Add new ata port flag ATA_FLAG_NO_LOG_PAGE which can used to blacklist a controller. If this flag is set, any attempt to read a log page returns an error without actually issuing the command. Signed-off-by: NAndreas Werner <andreas.werner@men.de> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Dan Williams 提交于
Quoting Arnd: The AHCI driver is used for some on-chip devices that do not use PCI for probing, and it can be built even when CONFIG_PCI is disabled, but that now results in a build failure: ata/libahci.c: In function 'ahci_host_activate_multi_irqs': ata/libahci.c:2475:4: error: invalid use of undefined type 'struct msix_entry' ata/libahci.c:2475:21: error: dereferencing pointer to incomplete type 'struct msix_entry' Add ifdef CONFIG_PCI_MSI infrastructure to compile out the multi-msi and multi-msix code. Reported-by: NArnd Bergmann <arnd@arndb.de> Tested--by: NArnd Bergmann <arnd@arndb.de> [arnd: fix up pci enabled case] Reported-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Fixes: d684a90d ("ahci: per-port msix support") Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Heiner Kallweit 提交于
On my machine with single irq AHCI just the PCI id is printed as description in /proc/interrupts. I found a related discussion from beginning of this year: http://www.gossamer-threads.com/lists/linux/kernel/2117335 Seems like 4f37b504 ("libata: Use dev_name() for request_irq() to distinguish devices") tried to fix displaying a proper interrupt description for one scenario but broke it for another one. The mentioned discussion ended in the current situation being considered as broken but w/o a patch to fix it. The following patch is based on a proposal in this mail thread. Now the interrupt is properly described as: PCI-MSI 512000-edge ahci[0000:00:1f.2] By combining both values also the scenario that commit 4f37b504 ("libata: Use dev_name() for request_irq() to distinguish devices") refers to should still be fine. There it should look like this now: ahci[20100000.ide] Using managed memory allocation ensures that the irq description lives at least as long as the interrupt. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
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- 30 11月, 2015 5 次提交
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由 Mikulas Patocka 提交于
When I connect an Intel SSD to SATA SIL controller (PCI ID 1095:3114), any TRIM command results in I/O errors being reported in the log. There is other similar error reported with TRIM and the SIL controller: https://bugs.centos.org/view.php?id=5880 Apparently the controller doesn't support TRIM commands. This patch disables TRIM support on the SATA SIL controller. ata7.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x0 ata7.00: BMDMA2 stat 0x50001 ata7.00: failed command: DATA SET MANAGEMENT ata7.00: cmd 06/01:01:00:00:00/00:00:00:00:00/a0 tag 0 dma 512 out res 51/04:01:00:00:00/00:00:00:00:00/a0 Emask 0x1 (device error) ata7.00: status: { DRDY ERR } ata7.00: error: { ABRT } ata7.00: device reported invalid CHS sector 0 sd 8:0:0:0: [sdb] tag#0 FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE sd 8:0:0:0: [sdb] tag#0 Sense Key : Illegal Request [current] [descriptor] sd 8:0:0:0: [sdb] tag#0 Add. Sense: Unaligned write command sd 8:0:0:0: [sdb] tag#0 CDB: Write same(16) 93 08 00 00 00 00 00 21 95 88 00 20 00 00 00 00 blk_update_request: I/O error, dev sdb, sector 2200968 Signed-off-by: NMikulas Patocka <mpatocka@redhat.com> Cc: stable@kernel.org Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Xiangliang Yu 提交于
Current code doesn't update port value of Port Multiplier(PM) when sending FIS of softreset to device, command will fail if FBS is enabled. There are two ways to fix the issue: the first is to disable FBS before sending softreset command to PM device and the second is to update port value of PM when sending command. For the first way, i can't find any related rule in AHCI Spec. The second way can avoid disabling FBS and has better performance. Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: NTejun Heo <tj@kernel.org> Cc: stable@vger.kernel.org
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由 Jaedon Shin 提交于
Remove unused definitions, and this is to avoid confusion with MIPS-based platforms. Signed-off-by: NJaedon Shin <jaedon.shin@gmail.com> Tested-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NBrian Norris <computersforpeace@gmail.com>
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由 Jaedon Shin 提交于
Whereas ARM-based platforms have four phy interface registers and information, the MIPS-based platforms have only three registers, and there are no information and documentation. In the original BSP, It using "strict-ahci" did not control these registers. Signed-off-by: NJaedon Shin <jaedon.shin@gmail.com> Tested-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NBrian Norris <computersforpeace@gmail.com>
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由 Jaedon Shin 提交于
The most MIPS-based platforms need to disable NCQ while have the NCQ capability in HOST_CAP, and several ARM-based platforms (eg. BCM7349A0, BCM7445A0, BCM7445B0) need to disable too. Signed-off-by: NJaedon Shin <jaedon.shin@gmail.com> Tested-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NBrian Norris <computersforpeace@gmail.com>
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- 24 11月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
Since commit c99cd90d ("ARM: shmobile: r8a7779: Remove legacy SoC code"), R-Car SoCs are only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the remaining platform_device_id entries and platform device support. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 21 11月, 2015 2 次提交
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由 Kouei Abe 提交于
R-Car H3 SoC has compatible SATA controller with R-Car Gen2 SoCs. Signed-off-by: NKouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: NYoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Arnd Bergmann 提交于
The newly added suspend/resume implementation for ahci_mvebu causes a link error when CONFIG_PM_SLEEP is disabled: ERROR: "ahci_platform_suspend_host" [drivers/ata/ahci_mvebu.ko] undefined! ERROR: "ahci_platform_resume_host" [drivers/ata/ahci_mvebu.ko] undefined! This adds the same #ifdef here that exists in the ahci_platform driver which defines the above functions. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Fixes: d6ecf158 ("ata: ahci_mvebu: add suspend/resume support") Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 17 11月, 2015 5 次提交
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由 Dan Williams 提交于
This field in achi_port_priv was only used to support threaded interrupts. Now that we are hardirq only it can be deleted. Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Dan Williams 提交于
For high frequency I/O the overhead of threaded interrupts impacts performance. A quick out-of-the-box test (i.e. no affinity tuning) shows ~10% random read performance at ~20% less cpu. The cpu wins appear to be from reduced lock contention. Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Dan Williams 提交于
Some AHCI controllers support per-port MSI-X vectors. At the same time the Linux AHCI driver needs to support one-off architectures that implement a single MSI-X vector for all ports. The heuristic for enabling AHCI ports becomes, in order of preference: 1/ per-port multi-MSI-X 2/ per-port multi-MSI 3/ single MSI 4/ single MSI-X 5/ legacy INTX This all depends on AHCI implementations with potentially broken MSI-X requesting less vectors than the number of ports. If this assumption is violated we will need to start explicitly white-listing AHCI-MSIX implementations. Reported-by: NRicardo Neri <ricardo.neri@intel.com> [ricardo: fix struct msix_entry handling] Reported-by: Nkernel test robot <ying.huang@linux.intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Alexandra Yates 提交于
This change was to preserve the ascending order of device IDs. There was an exception with the first two Lewisburg device IDs to keep all device IDs of the same kind grouped by code name. Signed-off-by: NAlexandra Yates <alexandra.yates@linux.intel.com> signed-off-by: NTejun Heo <tj@kernel.org>
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由 Charles_Rose@Dell.com 提交于
This patch adds missing AHCI RAID SATA Device IDs for the Intel Sunrise Point PCH. Signed-off-by: NNanda Kishore Chinna <nanda_kishore_chinna@dell.com> Signed-off-by: NCharles Rose <charles_rose@dell.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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