Fix the problem that cannot work PCI device on 32-bit mode because
influence of the commit 68b42d1b
("sh: sh7785lcr: Map whole PCI address space."). So this patch was
implement like a 29-bit mode, map whole physical address space of
DDR-SDRAM.
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

PCI still doesn't work on sh7785lcr 29bit 256M map mode.

On SH7785, PCI -> SHwy address translation is not base+offset but
somewhat like base|offset (See HW Manual (rej09b0261) Fig. 13.11).
So, you can't export CS2,3,4,5 by 256M at CS2 (results CS0,1,2,3
exported, I guess).  There are two candidates.

a) 128M@CS2 + 128M@CS4
b) 512M@CS0

Attached patch is B. It maps 512M Byte at 0 independently of memory
size. It results CS0 to CS6 and perhaps some more being accessible
from PCI.

Tested on
7785lcr 29bit 128M map
7785lcr 29bit 256M map
(NOT tested on 32bit)
Signed-off-by: NTakashi YOSHII <yoshii.takashi@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds initial support for the Renesas R0P7785LC0011RL board.
This patch supports 29bit address mode only.
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch updates the board specific irq code for r7780rp. The new code is
very similar to the other highlander implementations, with the exception that
the r7780rp handles pci interrupts using IRL. To simplify the pci code and
use the same interrupt numbers as r7780mp and r7785rp we hook in to the
cpu specific pci vectors.

The pci interrupts and the push switch all work well with and without this
patch. CF and AX88796 are not ok though and the source of the problem is
unknown at this point. The AX88796 does for not detect it's proper mac
address (IPL gets it right) and the kernel hangs on CF access. As a workaround
this patch removes the CF and the AX88796 from the platform datain case of
r7780rp.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The IO access of PCI is not supported in R7780RP and the MS7780SE
board now. The support of the IO access mode of e100 and a lot of IDE
chips becomes possible by fixing the code.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Some fixups for the R7785RP board. Gets iVDR working.
Signed-off-by: NRyusuke Sakato <sakato.ryusuke@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds preliminary support for the SH7785-based Highlander board.
Some of the Highlander support code is reordered so that most of it
can be reused directly.

This also plugs in missing SH7785 checks in the places that need it,
as this is the first board to support the CPU.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Now with the ide.h mess sorted out, most of these boards
don't need their own directory. Move the headers out, and
update the driver paths.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

A few of these managed to sneak back in, get rid of them once
and for all.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This cleans up quite a lot of the PCI mess that we
currently have, and attempts to consolidate the
duplication in the SH7780 and SH7751 PCI controllers.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds support for the Renesas SH7780 development boards,
R7780RP and R7780MP.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>