This patch supplies I2C configuration to B2000 and B2020
based on either STiH415 or STiH416 SoCs.
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
Acked-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>

This patch supplies I2C configuration to STiH415 SoC.
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
Acked-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>

This patch supplies I2C configuration to STiH416 SoC.
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
Acked-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>

This patch fixes a typo for OD define in st-pincfg header file.
Reported-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>

Some of the clocks that were designated gate-clk do not have a gate, so
change those clocks to be of periph-clk type.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Update Kconfig to enable TWD.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Reviewed-by: NPavel Machek <pavel@denx.de>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Enable MMC/SD on the Broadcom mobile platforms, and increase the block
minors from the default 8 to 16 (since the Broadcom board by default
has root on the 8th partition).
Signed-off-by: NOlof Johansson <olof@lixom.net>
Cc: stable@vger.kernel.org # v3.12

This enables a few more options on the sunxi defconfigs such that I can
use nfsroot to boot them (there is no local storage support yet). It
also enables PRINTK_TIME and tmpfs since it's a common distro requirement.
Signed-off-by: NOlof Johansson <olof@lixom.net>

BeagleBone Black uses the TI CPSW ethernet controller, enable it in the
multi_v7_defconfig for testing coverage purposes.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Acked-by: NTony Lindgren <tony@atomide.com>
Cc: stable@vger.kernel.org # v3.12

drivers/net/ethernet/smsc/smsc911x.c is expecting supplies named
"vdd33a" and "vddvario". Currently the shared DTS file provides
"vmmc" and "vmmc_aux", and the supply lookup will fail:

smsc911x 2c000000.ethernet: Looking up vdd33a-supply from device tree
smsc911x 2c000000.ethernet: Looking up vdd33a-supply property in node /ocp/gpmc@6e000000/ethernet@gpmc failed
smsc911x 2c000000.ethernet: Looking up vddvario-supply from device tree
smsc911x 2c000000.ethernet: Looking up vddvario-supply property in node /ocp/gpmc@6e000000/ethernet@gpmc failed

Fix it!

Looks like commmit 6b2978ac (ARM: dts: Shared file for omap GPMC
connected smsc911x) made the problem more visible by moving the smc911x
configuration from the omap3-igep0020.dts file to the generic file.
But it seems we've had this problem since commit d72b4415
(ARM: dts: omap3-igep0020: Add SMSC911x LAN chip support).

Tested on OMAP3 Overo platform.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
[tony@atomide.com: updated comments for the commits causing the problem]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 'cd8abed1' "ARM: OMAP2+: Powerdomain: Remove the need to
always have a voltdm associated to a pwrdm" leads to the following
Smatch complaint:

arch/arm/mach-omap2/powerdomain.c:131 _pwrdm_register()
	 error: we previously assumed 'arch_pwrdm' could be null (see line 105)

So, fix the unchecked dereference of arch_pwrdm.
Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This adds typical McBSP2-TWL4030 audio description to the legacy
Beagle Board.
Signed-off-by: NJarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Mux mode for wlan/sdmmc5 should be MODE0 in pinmux_wl12xx_pins and
Enable Pull up on sdmmc5_clk to detect SDIO card.

This fixes WLAN on omap4-sdp that got broken in v3.10 when we
moved omap4 to boot using device tree only as I did not have
the WL12XX card in my omap4 SDP to test with. The commit that
attempted to make WL12XX working on omap4 SDP was 775d2418
(ARM: dts: Fix muxing and regulator for wl12xx on the SDIO
bus for blaze).
Signed-off-by: NBalaji T K <balajitk@ti.com>
[tony@atomide.com: updated comments for the regression]
Signed-off-by: NTony Lindgren <tony@atomide.com>

pin mux wl12xx_gpio and wl12xx_pins should be part of omap4_pmx_core
and not omap4_pmx_wkup. So, move wl12xx_* to omap4_pmx_core.

Fix the following error message:
pinctrl-single 4a31e040.pinmux: mux offset out of range: 0x38 (0x38)
pinctrl-single 4a31e040.pinmux: could not add functions for pinmux_wl12xx_pins 56x

SDIO card is not detected after moving pin mux to omap4_pmx_core since
sdmmc5_clk pull is disabled. Enable Pull up on sdmmc5_clk to detect SDIO card.

This fixes a regression where WLAN did not work after a warm reset
or after one up/down cycle that happened when we move omap4 to boot
using device tree only. For reference, the kernel bug is described at:

https://bugzilla.kernel.org/show_bug.cgi?id=63821

Cc: stable@vger.kernel.org # v3.10+
Signed-off-by: NBalaji T K <balajitk@ti.com>
[tony@atomide.com: update comments to describe the regression]
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch removes the old main clk node which is now useless as sama5d3
SoCs and boards are no longer compatible with the old at91 clk
implementations.

It also remove old clock definitions (clock definitions using at91 old clk
framework).
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch removes the selection of AT91_USE_OLD_CLK when selecting sama5d3
SoC support. This will enable automatically enable COMMON_CLK_AT91 option
and add support for at91 common clk implementation.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Define the main clock frequency for the new main clock node
in sama5d3xcm.dtsi.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Define sama5d3 clocks in sama5d3 device tree.
Add references to the appropriate clocks in each peripheral.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch encloses sama5d3 old clk registration in
"#if defined(CONFIG_OLD_CLK_AT91) #endif" sections.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch prepare the transition to common clk for sama5 dt boards by
replacing the timer init callback.

Clocks registration cannot be done in early init callback (as formerly done
by the old clk implementation) because it requires dynamic allocation
which is not ready yet during early init.

In the other hand, at91 clocks must be registered before
at91sam926x_pit_init is called because PIT (Periodic Interval Timer) driver
request the master clk (mck).

A new function (at91sama5_dt_timer_init) is created to fullfil these needs.
This function registers all at91 clks using the dt definition before
calling the PIT init function.
The device tree clock registration is enabled only if common clk is
selected. Else the old clk registration is been done during
at91_dt_initialize call.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch adds new compatible string for PMC node to prepare the
transition to common clk.

These compatible string come from pmc driver in clk subsystem and are
needed to provide new device tree compatibility with old at91 clks
(device tree using common clks will use the new compatible strings).
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Use device tree to get the source clock of the PIT (Periodic Interval Timer).
If the clock is not found in device tree (or dt is not enabled) we'll try to
get it using clk_lookup definitions.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch adds at91 smd (Soft Modem) clock implementation using common clk
framework.

Not used by any driver right now.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch adds new at91 usb clock implementation using common clk framework.
This clock is used to clock usb ports (ohci, ehci and udc).
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This adds new at91 utmi clock implementation using common clk framework.

This clock is a pll with a fixed factor (x40).
It is used as a source for usb clock.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch adds the following Kconfig options to prepare the transition to
common clk framework:

- AT91_USE_OLD_CLK: this option is selected by every SoC which does not
  support new at91 clks based on common clk framework (SoC which does not
  define the clock tree in its device tree).
  This options is also selected when the user choose non dt boards support
  (new at91 clks can only be registered from a device tree definition).

- COMMON_CLK_AT91: this option cannot be selected directly. Instead it is
  enabled if these 3 conditions are met:
   * at least one of the selected SoCs have a PMC (Power Management
     Controller) Unit
   * device tree support is enabled
   * the old at91 clk implementation is disabled (every selected SoC define
     its clks in its device tree and non dt boards support is disabled)

- OLD_CLK_AT91: this option cannot be selected directly. Instead it is
  enabled if these 2 conditions are met:
   * at least one of the selected SoCs have a PMC (Power Management
     Controller) Unit
   * at least one of the selected SoCs does not define its clks in its
     device tree or non dt-boards support is enabled

This patch selects AT91_USE_OLD_CLK in all currently supported SoCs. These
selects will be removed after clk definitions are properly added in each
soc's device tree.
It also selects AT91_USE_OLD_CLK in all non-dt boards support.

AT91_PMC_UNIT references are replaced by OLD_CLK_AT91, because PMC Unit is
enabled for both old and common clk implementations, and old clk
implementation should not be compiled if COMMON_CLK is enabled.

To avoid future link errors, a new stub is created for at91_dt_clock_init
function if OLD_CLK_AT91 is disabled.

A new check is added in dt init functions (setup.c) to prepare for SoCs
supporting new clk implementation. These SoCs won't setup the
register_clocks callback (clk registration is done using of_clk_init).
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch moves at91_pmc.h header from machine specific directory
(arch/arm/mach-at91/include/mach/at91_pmc.h) to clk include directory
(include/linux/clk/at91_pmc.h).
We need this to avoid reference to machine specific headers in clk
drivers.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

If CONFIG_PM is not defined, then arch/arm/mach-at91/pm.c is not
compiled in.  This patch creates an inline function that does nothing
if CONFIG_PM is not defined.
Signed-off-by: NBrent Taylor <motobud@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Alias was missing for SoC of the at91sam9x5 familly that embed USART3.
Reported-by: NJiri Prchal <jiri.prchal@aksignal.cz>
[b.brezillon@overkiz.com: advised to place changes in at91sam9x5_usart3.dtsi]
Acked-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

With some devices, transfer hangs during I2C frame transmission. This issue
disappears when reducing the internal frequency of the TWI IP. Even if it is
indicated that internal clock max frequency is 66MHz, it seems we have
oversampling on I2C signals making TWI believe that a transfer in progress
is done.

This fix has no impact on the I2C bus frequency.

Cc: <stable@vger.kernel.org> #3.10+
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Acked-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Almost all hardware parts of the NETGEAR ReadyNAS NV+ v2 ([1] for more
details) are supported by mainline kernel. The only missing elements in
provided .dts file are:

 - the front LCD module (Winstar WINSTAR WH1602): driver development is
   ongoing. This is the same LCD module as on ReadyNAS 104.
 - the Macronix MX25L512 512Kbit SPI flash: no time to play with it yet.

The device is the big brother (4 vs 2 bay) of the ReadyNAS Duo v2. The
main differences are some additional LEDs for the disks, a Marvell
88SM4140 SATA Port multiplier (no driver required to access the disk)
and previously described LCD module. Otherwise, it shares the same SoC
(kirkwood 88F6282), RAM (256MB), NAND (128MB), RTC chip (Ricoh rs5c372a),
fan controller (GMT G762), XHCI controller (NEC/Renesas µPD720200).

[1]: http://natisbad.org/NAS5/Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

All hardware parts of the (mv78230 Armada XP based) NETGEAR ReadyNAS
2120 are supported by mainline kernel (USB 3.0 and eSATA rear ports,
USB 2.0 front port, Gigabit controller and PHYs for the two rear ports,
serial port, LEDs, Buttons, 88SE9170 SATA controllers, three G762 fan
controllers, G751 temperature sensor) except for:

 - the Intersil ISL12057 I2C RTC Chip,
 - the Armada NAND controller.

Support for both of those is currently work in progress and does not
prevent boot.
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This patch provides some whitespace cleanup for NETGEAR
ReadyNAS Duo v2 and 102 .dts files:

 - Fixed bad spaces
 - Added some space between nodes to improve readability
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The patch does some cleanup work on NETGEAR ReadyNAS 104 .dts
file. Changes are listed below:

 - Completed conversion from value to macros for GPIO voltage level
 - Converted all numeric input key values to macros
 - Fixed all node names and labels to use respectively '-' and '_'
 - Made button names more explicit
 - Changed order of included files from general to local
 - Removed useless clocks and gpio-keys properties
 - Document ethernet PHY (Marvell 88E1318) via a comment
 - Made G762 clock node name unique by including g762 in it
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The patch does some cleanup work on NETGEAR ReadyNAS 102 .dts
file. Changes are listed below

 - Added missing button mpp in pinctrl
 - Converted from value to macros for GPIO voltage level
 - Converted all numeric input key values to macros
 - Added GPIO keys pins to pinctrl
 - Made button names more explicit
 - Document ethernet PHY (Marvell 88E1318) via a comment
 - Made G762 clock node name unique by including g762 in it
 - Fixed all node names and labels to use respectively '-' and '_'
 - Changed order of included files from general to local
 - Removed useless clocks and gpio-keys properties
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The patch does some cleanup work on NETGEAR ReadyNAS Duo v2 .dts
file. Changes are listed below:

 - Converted from value to macros for GPIO voltage level
 - Converted all numeric input key values to macros
 - Made button names more explicit
 - Document ethernet PHY (Marvell 88E1318) via a comment
 - Added header for the file to describe content and author
 - Made G762 clock node name unique by including g762 in it
 - Fixed all node names and labels to use respectively '-' and '_'
 - Changed order of included files from general to local
 - Removed useless clocks and gpio-keys properties
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Beagle (rev. C4) and Beagle-XM (all revs) need VAUX2 1.8V supply
for the USB PHY.

As the generic PHY driver can't handle more than one supply
at the moment, we configure this supply to be always on.
This will cause a very small power impact if the USB host subsystem
is not in use, about 76.86 micro-W + LDO power.

Older Beagle boards (prior to C4) don't have VAUX2 connected anywhere,
so there won't be any functional impact on those boards other than
some additional LDO power consumption.
Reported-by: NNishanth Menon <nm@ti.com>
Tested-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

On Device Tree boot the VDDS_DSI regulator is not linked to
the DPI device so omapfb driver probing fails with:

[    3.186035] OMAPFB: omapfb_probe
[    3.190704] omapdss DPI error: can't get VDDS_DSI regulator
[    3.196594] omapfb omapfb: failed to connect default display
[    3.202667] omapfb omapfb: failed to init overlay connections
[    3.208892] OMAPFB: free_resources
[    3.212493] OMAPFB: free all fbmem
[    3.216735] omapfb omapfb: failed to setup omapfb

As a workaround name the VPLL2 regulator from twl4030 as vdds_dsi
so getting the VDDS_DSI regulator will succeed on dpi_init_regulator().
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add node to support the USB Host and the USB OTG on the IGEP AQUILA
Processor Board.
Signed-off-by: NEnric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The IGEP AQUILA EXPANSION has a 32KBit EEPROM for user data storage.
Signed-off-by: NEnric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>