- 27 10月, 2012 5 次提交
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由 Matt Porter 提交于
Adds PRUSS clock support and registration helper for the uio_pruss device. Signed-off-by: NMatt Porter <mporter@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Matt Porter 提交于
Adds sram_get_gen_pool() which allows platform code to get the machine's SRAM gen_pool. The gen_pool may be passed in platform data for driver genalloc use. Signed-off-by: NMatt Porter <mporter@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Subhasish Ghosh 提交于
This patch modifies the sram allocator to allocate memory from the DA8XX shared RAM. Regression tested suspend/resume on AM180x EVM. Signed-off-by: NSubhasish Ghosh <subhasish@mistralsolutions.com> [rebased onto consolidated SRAM patches] Signed-off-by: NBen Gardiner <bengardiner@nanometrics.ca> [rebased to mainline as consolidated SRAM patches were dropped] Signed-off-by: NMatt Porter <mporter@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Ben Gardiner 提交于
The current davinci init sets up SRAM in iotables. There has been an observed failure to boot a da850 with 128K specified in the iotable. Make the davinci sram allocator do an ioremap of the region specified by the entries in davinci_soc_info before registering with gen_pool_add_virt(). Remove all iotable SRAM mappings and SRAM_VIRT. Regression tested suspend/resume on AM180x EVM. Signed-off-by: NBen Gardiner <bengardiner@nanometrics.ca> Signed-off-by: NMatt Porter <mporter@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Sekhar Nori 提交于
Provide an API to initialize a UART clock. Refactor existing davinci_serial_init() to separate out the part which enables the clock. This will later be used to help DA850 DT boot support. Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 24 10月, 2012 1 次提交
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由 m-karicheri2@ti.com 提交于
As a first step towards migrating davinci platforms to use common clock framework, replace all instances of clk_enable() with clk_prepare_enable() and clk_disable() with clk_disable_unprepare(). Until the platform is switched to use the CONFIG_HAVE_CLK_PREPARE Kconfig variable, this just adds a might_sleep() call and would work without any issues. This will make it easy later to switch to common clk based implementation of clk driver from DaVinci specific driver. Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com> Reviewed-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 19 10月, 2012 3 次提交
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由 Michael Walle 提交于
Change event type to switch for the power and autopower switches. Additionally, this patch aligns the keycodes with the other linkstation boards already supported by linux. Signed-off-by: NMichael Walle <michael@walle.cc> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Michael Walle 提交于
Don't use the specific board name in a the common device tree include file. Instead use the common name 'lsxl'. Signed-off-by: NMichael Walle <michael@walle.cc> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Jason Gunthorpe 提交于
Move the CACHE_FEROCEON_L2 test to kirkwood_l2_init, since linking fails on the reference to feroceon_l2_init. Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 18 10月, 2012 8 次提交
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由 Sebastian Hesselbarth 提交于
Make use of DT support for the crypto engine on dove and remove the obsolete init call. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
The watchdog on dove requires an interrupt that is not yet available on DT. Therefore, the watchdog DT node is removed until the corresponding chained intc is available. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
This patch adds proper ranges for all mapped addresses within dove SoC and moves the interrupt controller node inside the simple-bus node. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
This patch fixes wrong clock names of lately added clock gates for sata and gbe (mv64xx_eth). Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
During the review process of dove DT patches, Tauros2 cache init call was changed and DT support added. This patch fixes the call to Tauros2 init and adds a DT node. Moreover, plat/irq.h include was missing from mach-dove/common.c. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
As dove now has clock gating control ensure pcie ports grab their clocks. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Jon Hunter 提交于
Currently, if the GPMC driver fails to reserve memory when probed we will call BUG() and the kernel will not boot. Instead of calling BUG(), return an error from probe and allow kernel to boot. Boot tested on AM335x beagle bone board and OMAP4430 Panda board. V2 changes: - Ensure that clock and memory resources are released on error. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tero Kristo 提交于
Previously the code only acquired spinlock after increasing / decreasing the usecount value, which is wrong. This leaves a small window where a task switch may occur between the check of the usecount and the actual wakeup / sleep of the domain. Fixed by moving the spinlock locking before the usecount access. Left the usecount as atomic_t if someone wants an easy access to the parameter through atomic_read. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 17 10月, 2012 9 次提交
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由 Arnd Bergmann 提交于
s3c2440_clk_add is a subsys_interface method and calls clkdev_add_table, which is marked as __init. The modpost script complains about this because we must not call an __init function from a function in the .text section, and we cannot reference an __init function from a subsys_interface pointer. I have verified that the only code path into s3c2440_clk_add() is from "int __init s3c2440_init(void)", so s3c2440_clk_add can be marked __init_refok instead. Without this patch, building mini2440_defconfig results in: WARNING: vmlinux.o(.text+0x9848): Section mismatch in reference from the function s3c2440_clk_add() to the function .init.text:clkdev_add_table() The function s3c2440_clk_add() references the function __init clkdev_add_table(). This is often because s3c2440_clk_add lacks a __init annotation or the annotation of clkdev_add_table is wrong. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Mike Turquette <mturquette@linaro.org> Cc: Ben Dooks <ben-linux@fluff.org>
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由 Sebastien Guiriec 提交于
Correct DMIC hwmod lockup error message and replace printk() by pr_err(). Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Benoit Cousson 提交于
The GPMC code has been converted to a driver by the following commit: commit da496873 Author: Afzal Mohammed <afzal@ti.com> Date: Sun Sep 23 17:28:25 2012 -0600 ARM: OMAP2+: gpmc: minimal driver support It now requests a clock with con-id "fck" otherwise the probe will fails. [ 0.342010] omap-gpmc omap-gpmc: error: clk_get [ 0.346771] omap-gpmc: probe of omap-gpmc failed with error -2 Add the "omap-gmpc" dev-id and fck con-id to the already existing gmpc-fck dummy clock. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Afzal Mohammed <afzal@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
Commit 801475cc ("ARM: OMAP: move debug_card_init() function") results in the following new sparse warning: arch/arm/plat-omap/debug-devices.c:71:12: warning: symbol 'debug_card_init' was not declared. Should it be static? Fix by implementing Tony's suggestion to add a "sideways include" to the new location of the debug-devices.h file in arch/arm/mach-omap2/. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Commit 7d7e1eba (ARM: OMAP2+: Prepare for irqs.h removal) changed the interrupts to allow enabling sparse IRQ, but accidentally added the omap3 INTC base to the local IRQ. This causes the following: twd: can't register interrupt 45 (-22) twd_local_timer_register failed -22 The right fix is to not add any base, as it is a local timer. For the OMAP44XX_IRQ_LOCALWDT we had defined earlier there are no users, so no need to fix that. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sivaram Nair 提交于
This undoes commit 20f46658 "ARM: tegra: remove tegra_timer from tegra_list_clks" by bringing back the tegra_timer clock. tegra_timer is indeed a clock (hidden by the PERIPH_CLK macro) which should be added to the tegra_list_clks. The above commit caused tegra_init_timer() failing to get the clk reference. Signed-off-by: NSivaram Nair <sivaramn@nvidia.com> [swarren: added the reverted commit's subject to this patch description] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Sivaram Nair 提交于
The timer variable is renamed to avoid confusion and symbol name clash with the tegra_timer clock. Signed-off-by: NSivaram Nair <sivaramn@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Mark Zhang 提交于
Change the type of variable from "unsigned long" to "u64". This avoids the overflow while clock rate calculating. Signed-off-by: NMark Zhang <markz@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Shawn Guo 提交于
Commit 9e3c0066 (ARM: dts: imx6q-arm2: add pinctrl for uart and enet) defines NANDF_CS pins as gpio in 'hog', assuming these two pins are always used by usdhc3 in gpio mode as card-detection and write-protection on ARM2 board. But it's not true. These pins are shared by usdhc3 and gpmi-nand. We should have the pins functional for gpmi-nand when usdhc3 is disabled. Move the pins out of 'hog', so that pins only work in gpio mode as CD and WP when usdhc3 is enabled, and otherwise they are available for gpmi-nand. Reported-by: NHuang Shijie <b32955@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Tested-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 16 10月, 2012 3 次提交
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由 Tony Prisk 提交于
EHCI and UHCI devices in wm8505.dtsi should use IRQ 1 & 0 respectively - not 43 as used on newer models. Signed-off-by: NTony Prisk <linux@prisktech.co.nz> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Linus Walleij 提交于
This makes sure that the ARM Integrator device trees get compiled during build. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Kuninori Morimoto 提交于
0a4b04dc (ARM: shmobile: use __iomem pointers for MMIO) modified iomem pointers so that IOMEM() macro will be used, but clock-r8a7779.c was out of target. This patch fixes it up. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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- 15 10月, 2012 3 次提交
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由 Russell King 提交于
Daniel Mack reports an oops at boot with the latest kernels: Internal error: Oops - undefined instruction: 0 [#1] SMP THUMB2 Modules linked in: CPU: 0 Not tainted (3.6.0-11057-g584df1d #145) PC is at cpsw_probe+0x45a/0x9ac LR is at trace_hardirqs_on_caller+0x8f/0xfc pc : [<c03493de>] lr : [<c005e81f>] psr: 60000113 sp : cf055fb0 ip : 00000000 fp : 00000000 r10: 00000000 r9 : 00000000 r8 : 00000000 r7 : 00000000 r6 : 00000000 r5 : c0344555 r4 : 00000000 r3 : cf057a40 r2 : 00000000 r1 : 00000001 r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 50c5387d Table: 8f3f4019 DAC: 00000015 Process init (pid: 1, stack limit = 0xcf054240) Stack: (0xcf055fb0 to 0xcf056000) 5fa0: 00000001 00000000 00000000 00000000 5fc0: cf055fb0 c000d1a8 00000000 00000000 00000000 00000000 00000000 00000000 5fe0: 00000000 be9b3f10 00000000 b6f6add0 00000010 00000000 aaaabfaf a8babbaa The analysis of this is as follows. In init/main.c, we issue: kernel_thread(kernel_init, NULL, CLONE_FS | CLONE_SIGHAND); This creates a new thread, which falls through to the ret_from_fork assembly, with r4 set NULL and r5 set to kernel_init. You can see this in your oops dump register set - r5 is 0xc0344555, which is the address of kernel_init plus 1 which marks the function as Thumb code. Now, let's look at this code a little closer - this is what the disassembly looks like: c000d180 <ret_from_fork>: c000d180: f03a fe08 bl c0047d94 <schedule_tail> c000d184: 2d00 cmp r5, #0 c000d186: bf1e ittt ne c000d188: 4620 movne r0, r4 c000d18a: 46fe movne lr, pc <-- XXXXXXX c000d18c: 46af movne pc, r5 c000d18e: 46e9 mov r9, sp c000d190: ea4f 3959 mov.w r9, r9, lsr #13 c000d194: ea4f 3949 mov.w r9, r9, lsl #13 c000d198: e7c8 b.n c000d12c <ret_to_user> c000d19a: bf00 nop c000d19c: f3af 8000 nop.w This code was introduced in 9fff2fa0 (arm: switch to saner kernel_execve() semantics). I have marked one instruction, and it's the significant one - I'll come back to that later. Eventually, having had a successful call to kernel_execve(), kernel_init() returns zero. In returning, it uses the value in 'lr' which was set by the instruction I marked above. Unfortunately, this causes lr to contain 0xc000d18e - an even address. This switches the ISA to ARM on return but with a non word aligned PC value. So, what do we end up executing? Well, not the instructions above - yes the opcodes, but they don't mean the same thing in ARM mode. In ARM mode, it looks like this instead: c000d18c: 46e946af strbtmi r4, [r9], pc, lsr #13 c000d190: 3959ea4f ldmdbcc r9, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ c000d194: 3949ea4f stmdbcc r9, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ c000d198: bf00e7c8 svclt 0x0000e7c8 c000d19c: 8000f3af andhi pc, r0, pc, lsr #7 c000d1a0: e88db092 stm sp, {r1, r4, r7, ip, sp, pc} c000d1a4: 46e81fff ; <UNDEFINED> instruction: 0x46e81fff c000d1a8: 8a00f3ef bhi 0xc004a16c c000d1ac: 0a0cf08a beq 0xc03493dc I have included more above, because it's relevant. The PSR flags which we can see in the oops dump are nZCv, so Z and C are set. All the above ARM instructions are not executed, except for two. c000d1a0, which has no writeback, and writes below the current stack pointer (and that data is lost when we take the next exception.) The other instruction which is executed is c000d1ac, which takes us to... 0xc03493dc. However, remember that bit 1 of the PC got set. So that makes the PC value 0xc03493de. And that value is the value we find in the oops dump for PC. What is the instruction here when interpreted in ARM mode? 0: f71e150c ; <UNDEFINED> instruction: 0xf71e150c and there we have our undefined instruction (remember that the 'never' condition code, 0xf, has been deprecated and is now always executed as it is now being used for additional instructions.) This path also nicely explains the state of the stack we see in the oops dump too. The above is a consistent and sane story for how we got to the oops dump, which all stems from the instruction at 0xc000d18a being wrong. Reported-by: NDaniel Mack <zonque@gmail.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Arnd Bergmann 提交于
The prima2 platform advertises needing no mach/gpio.h header file, but its pinctrl driver now has a sirfsoc_gpio_set_pull function that uses constants defined in arch/arm/mach-prima2/include/mach/gpio.h, which fails to build. Fortunately, the sirfsoc_gpio_set_pull is not used anywhere in the kernel, so we can safely remove it. Any out of tree drivers using it will have to be converted to use proper pinctrl functions to do the same. Without this patch, building prima2_defconfig results in: drivers/pinctrl/pinctrl-sirf.c: In function 'sirfsoc_gpio_set_pull': drivers/pinctrl/pinctrl-sirf.c:1331:7: error: 'SIRFSOC_GPIO_PULL_NONE' undeclared (first use in this function) drivers/pinctrl/pinctrl-sirf.c:1331:7: note: each undeclared identifier is reported only once for each function it appears in drivers/pinctrl/pinctrl-sirf.c:1334:7: error: 'SIRFSOC_GPIO_PULL_UP' undeclared (first use in this function) drivers/pinctrl/pinctrl-sirf.c:1338:7: error: 'SIRFSOC_GPIO_PULL_DOWN' undeclared (first use in this function) Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Kuninori Morimoto 提交于
a2a47ca3 (ARM: __io abuse cleanup) cleanuped __io() -> IOMEM(), but armadillo800eva was a outside of a target, since "merge window" timing issue. This patch cleanup it. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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- 14 10月, 2012 2 次提交
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由 Russell King 提交于
The large platform selection choice should be sorted by option string so it's easy to find the platform you're looking for. Fix the few options which are out of this order. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
As suggested by Andrew Morton: This is a pet peeve of mine. Any time there's a long list of items (header file inclusions, kconfig entries, array initalisers, etc) and someone wants to add a new item, they *always* go and stick it at the end of the list. Guys, don't do this. Either put the new item into a randomly-chosen position or, probably better, alphanumerically sort the list. lets sort all our select statements alphanumerically. This commit was created by the following perl: while (<>) { while (/\\\s*$/) { $_ .= <>; } undef %selects if /^\s*config\s+/; if (/^\s+select\s+(\w+).*/) { if (defined($selects{$1})) { if ($selects{$1} eq $_) { print STDERR "Warning: removing duplicated $1 entry\n"; } else { print STDERR "Error: $1 differently selected\n". "\tOld: $selects{$1}\n". "\tNew: $_\n"; exit 1; } } $selects{$1} = $_; next; } if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or /^endif/ or /^endchoice/)) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } undef %selects; } print; } if (%selects) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } } It found two duplicates: Warning: removing duplicated S5P_SETUP_MIPIPHY entry Warning: removing duplicated HARDIRQS_SW_RESEND entry and they are identical duplicates, hence the shrinkage in the diffstat of two lines. We have four testers reporting success of this change (Tony, Stephen, Linus and Sekhar.) Acked-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 10月, 2012 1 次提交
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 12 10月, 2012 1 次提交
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由 David Howells 提交于
Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NMichael Kerrisk <mtk.manpages@gmail.com> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: NDave Jones <davej@redhat.com>
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- 10 10月, 2012 2 次提交
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由 Jean-Nicolas Graux 提交于
Upgrade nomadik pinctrl driver to enable selection of other alternate-C[1-4] functions on some specific ux500 SoC pins. Handling of those functions is done thanks to PRCM GPIOCR registers. This was previously managed in PRCMU driver and it was not really convenient. Idea is to provide a common way to control all alternate functions. Note that this improvement does not support the old-fashioned way used to control nomadik pins, namely the "nmk_config_pin()" function and its derivatives. Signed-off-by: NJean-Nicolas Graux <jean-nicolas.graux@stericsson.com> Reviewed-by: NPhilippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
The it8152 PCI host used on the pxa/cm_x2xx machines uses the old-style I/O window registration. This should eventually get converted to pci_ioremap_io() but for now, let's cast the IT8152_IO_BASE constant to an integer type to get rid of the warnings. Without this patch, building cm_x2xx_defconfig results in: arch/arm/common/it8152.c: In function 'it8152_pci_setup': arch/arm/common/it8152.c:287:18: warning: assignment makes integer from pointer without a cast [enabled by default] arch/arm/common/it8152.c:288:16: warning: assignment makes integer from pointer without a cast [enabled by default] arch/arm/common/it8152.c:291:17: warning: assignment makes integer from pointer without a cast [enabled by default] Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Mike Rapoport <mike@compulab.co.il> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com>
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- 09 10月, 2012 2 次提交
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由 Arnd Bergmann 提交于
Due to some interesting merges in the integrator code, not all users of mmio pointers were converted before, this fixes all warnings that got introduced as a consequence. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
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由 Arnd Bergmann 提交于
Russell fixed this bogus warning before in 2f3eca8b "Shut up gcc warning in assabet.c", but apparently gcc has become smarter (or dumber) since 2005, and the same warning came up again. This uses the uninitialized_var() macro to convince gcc that the variable is actually being initialized. 100 times in fact. Without this patch, building assabet_defconfig results in: arch/arm/mach-sa1100/assabet.c: In function 'fixup_assabet': arch/arm/mach-sa1100/assabet.c:397:6: warning: 'scr' may be used uninitialized in this function [-Wuninitialized] arch/arm/mach-sa1100/assabet.c:389:16: note: 'scr' was declared here Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
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