- 05 3月, 2014 1 次提交
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由 Shawn Guo 提交于
For imx50-weim and imx6q-weim type of devices, there might a WEIM CS space configuration register in General Purpose Register controller, e.g. IOMUXC_GPR1 on i.MX6Q. Depending on which configuration of the following 4 is chosen for given system, IOMUXC_GPR1[11:0] should be set up as 05, 033, 0113 or 01111 correspondingly. CS0(128M) CS1(0M) CS2(0M) CS3(0M) CS0(64M) CS1(64M) CS2(0M) CS3(0M) CS0(64M) CS1(32M) CS2(32M) CS3(0M) CS0(32M) CS1(32M) CS2(32M) CS3(32M) The patch creates a function for such type of devices, which scans 'ranges' property of WEIM node and build the GPR value incrementally. Thus the WEIM CS GPR can be set up automatically at boot time. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Reviewed-by: NPhilippe De Muyter <phdm@macqel.be> Tested-by: NPhilippe De Muyter <phdm@macqel.be>
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- 16 8月, 2013 1 次提交
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由 Alexander Shiyan 提交于
This patch adds WEIM support for all i.MX CPUs supported by the kernel. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 06 8月, 2013 1 次提交
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由 Ezequiel Garcia 提交于
Introduce the devicetree binding for the mvebu MBus driver avaiable in the mvebu SoCs (Armada 370/XP, Kirkwood, Dove, ...). This binding provides an accurate model of the SoC address space, and allows to declare the address and size of the decoding windows the MBus needs to access the peripherals, together with the target ID and attribute for those windows. The binding is composed of two required nodes: one for the MBus bus and one for the MBus controller. Cc: devicetree@vger.kernel.org Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 17 6月, 2013 1 次提交
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由 Huang Shijie 提交于
The WEIM(Wireless External Interface Module) works like a bus. You can attach many different devices on it, such as NOR, onenand. In the case of i.MX6q-sabreauto, the NOR is connected to WEIM. This patch also adds the devicetree binding document. The driver only works when the devicetree is enabled. Signed-off-by: NHuang Shijie <b32955@freescale.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 17 5月, 2013 1 次提交
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由 Jon Hunter 提交于
Commit 8c8a7771 (ARM: OMAP2+: Add function to read GPMC settings from device-tree) added a device-tree property "gpmc,device-nand" to indicate is the GPMC child device is NAND. This commit should have updated the GPMC NAND documentation (Documentation/devicetree/bindings/mtd/gpmc-nand.txt) to list the property "gpmc,device-nand" as a required property and also updated the example. However, this property is redundant and not needed because the GPMC child device node for NAND is called "nand". Therefore, remove this property. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 4月, 2013 1 次提交
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由 Jon Hunter 提交于
Some of the GPMC timings parameters are currently missing from the GPMC device-tree binding. Add these parameters to the binding documentation as well as code to read them. Also add either "-ps" or "-ns" suffix to the GPMC timing properties to indicate whether the timing is in picoseconds or nanoseconds. The existing code in gpmc_read_timings_dt() is checking the value of of_property_read_u32() and only is successful storing the value read in the gpmc_timings structure. Checking the return value in this case is not necessary and we can simply read the value, if present, and store directly in the gpmc_timings structure. Therefore, simplify the code by removing these checks. The comment in the gpmc_read_timings_dt() function, "only for OMAP3430" is also incorrect as it is applicable to all OMAP3+ devices. So correct this too. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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- 02 4月, 2013 1 次提交
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由 Jon Hunter 提交于
Adds a function to read the various GPMC chip-select settings from device-tree and store them in the gpmc_settings structure. Update the GPMC device-tree binding documentation to describe these options. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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- 16 1月, 2013 1 次提交
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由 Daniel Mack 提交于
This patch adds basic DT bindings for OMAP GPMC. The actual peripherals are instantiated from child nodes within the GPMC node, and the only type of device that is currently supported is NAND. Code was added to parse the generic GPMC timing parameters and some documentation with examples on how to use them. Successfully tested on an AM33xx board. Signed-off-by: NDaniel Mack <zonque@gmail.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> [tony@atomide.com: updated to apply] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 29 10月, 2012 1 次提交
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由 Kishon Vijay Abraham I 提交于
*reg* property for ocp2scp was previously obtained from ti,hwmods property. But that is now explicitly added to the dt node. Also updated the documentation with *reg* info. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
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- 22 8月, 2012 1 次提交
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由 Kishon Vijay Abraham I 提交于
Adds a new driver *omap-ocp2scp*. This driver takes the responsibility of creating all the devices that is connected to OCP2SCP. In the case of OMAP4, USB2PHY is connected to ocp2scp. This also includes device tree support for ocp2scp driver and the documentation with device tree binding information is updated. Acked-by: NFelipe Balbi <balbi@ti.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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