- 25 1月, 2012 2 次提交
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由 Eric Anholt 提交于
We have always been using the wrong bit -- it's bit 12. However, the bit also doesn't do anything -- hardware has always accepted the MI_FLUSH command even when it was specced not to. Given that there is only one MI_FLUSH emitted in all of the driver stack on gen6+ (in i965_video.c of the 2d driver, and it should be using other code to do its flush instead), just remove the MI_FLUSH enable instead of trying to fix it. Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NKenneth Graunke <kenneth@whitecape.org> Reviewed-by: NBen Widawsky <ben@bwidawsk.net> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
This was completely spamming dmesg on my i855gm. This issue was just shortly introduced with: commit 931872fc Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Mon Jan 16 23:01:13 2012 +0000 drm/i915: Check that plane/pipe is disabled before removing the fb Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 22 1月, 2012 3 次提交
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由 Eugeni Dodonov 提交于
Otherwise, we are left with pretty bogus message saying that the pixel format is not supported while leaving the details to the telepatic powers. v2: use DRM_DEBUG_KMS instead of DRM_ERROR Signed-off-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Jesse Barnes 提交于
Now that we're using the sprite WM fields, we need to take care not to clobber them in the main update_wm functions. While we're at it, make sure we mask out the old sprite wm value before or'ing in the new one when the sprite wm is updated. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: NKeith Packard <keithp@keithp.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
I've reviewed gen2 pageflip code to hunt down multiple prepare pageflip issues. The only thing I've found is a slight but functionally meaningless confusion about the length of the mi cmd. Fix it up and add a comment about what this dword should be (according to docs at least). Reviewed-by: NEric Anholt <eric@anholt.net> Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 18 1月, 2012 3 次提交
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由 Eugeni Dodonov 提交于
LLC is not SNB/IVB-specific, so we should check for it in a more generic way. Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Reviewed-by: NEric Anholt <eric@anholt.net> Reviewed-by: NKenneth Graunke <kenneth@whitecape.org> Signed-off-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
Some decent history digging indicates that this was to be used for the GLX_MESA_allocate_memory extension but never actually implemented for any released i915 userspace code. So just rip it out. v2: Fixup the Makefile. Acked-by: NDave Airlie <airlied@gmail.com> Cc: Keith Whitwell <keithw@vmware.com> Reviewed-by: NEric Anholt <eric@anholt.net> Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Thomas Meyer 提交于
The advantage of kcalloc is, that will prevent integer overflows which could result from the multiplication of number of elements and size and it is also a bit nicer to read. The semantic patch that makes this change is available in https://lkml.org/lkml/2011/11/25/107Signed-off-by: NThomas Meyer <thomas@m3y3r.de> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 17 1月, 2012 15 次提交
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由 Adam Jackson 提交于
This is paranoid, but I am entirely willing to believe the hardware could come up with a condition where I get a status with both the 'done' and 'receive error' bits set. Signed-off-by: NAdam Jackson <ajax@redhat.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Adam Jackson 提交于
The default in the Sandybridge docs is 5, as on Ironlake, and I have no reason to believe 3 would work any better. Signed-off-by: NAdam Jackson <ajax@redhat.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Adam Jackson 提交于
Matches the advice in the Sandybridge documentation. Signed-off-by: NAdam Jackson <ajax@redhat.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Adam Jackson 提交于
Signed-off-by: NAdam Jackson <ajax@redhat.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Adam Jackson 提交于
Signed-off-by: NAdam Jackson <ajax@redhat.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Adam Jackson 提交于
Signed-off-by: NAdam Jackson <ajax@redhat.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Simon Que 提交于
There is an error in i915_read_blc_pwm_ctl, where the register values are not being copied correctly. BLC_PWM_CTL and BLC_PWM_CTL2 are getting mixed up. This patch fixes that so that saveBLC_PWM_CTL2 and not saveBLC_PWM_CTL is copied to the BLC_PWM_CTL2 register. Signed-off-by: NSimon Que <sque@chromium.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Chris Wilson 提交于
Staring at an error state such as: PGTBL_ER: 0x00000400 Display B: Invalid tiling fence[0] = 05001001 valid, x-tiled, pitch: 512, start: 0x05000000, size: 1048576 Pinned [2]: 00000000 131072 0001 0001 00000000 P uncached 00020000 4096000 0041 0000 00000000 P uncached (name: 1) Plane [1]: CNTR: c0000000 # enabled | gamma STRIDE: 00001400 SIZE: 03ff04ff POS: 00000000 ADDR: 05000000 Suggests that we did not clear the DSPBCNTR prior to unpinning the framebuffer and reusing the GTT space. Impossible! Unless our DPMS bookkeeping ran afoul again... In the meantime add an assertion that the plane is decoupled from the framebuffer prior to release. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Eugeni Dodonov 提交于
Fix function name in comments, a left-over from when i965_reset was renamed to i915_reset. Signed-off-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Jesse Barnes 提交于
This cleans up the mode set path a little further, making it easier to extend for future platforms. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> [danvet: shut up stupid gcc warning about potential use of un-initlized fp2] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Jesse Barnes 提交于
Makes the mode set routine a little cleaner and easier to extend. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ben Widawsky 提交于
This is needed to run the simulator. Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NBen Widawsky <ben@bwidawsk.net> [danvet: added a comment in case people wonder what it's for.] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Eugeni Dodonov 提交于
After checking the specs and discussing with Jesse, turns out CxSR is not available on Ironlake and gen5, and its advertisement on the device description is misleading. Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Sean Paul 提交于
This patch enforces that the downclock clock source is the same as the preferred clock source for LVDS. This fixes a bug where the driver chooses a downclock clock source with a different P than the preferred mode clock source. This happened even if the preferred clock source implemented an acceptable rate for the downclock. The result of this bug is that downclock is disabled. Signed-off-by: NSean Paul <seanpaul@chromium.org> Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Adam Jackson 提交于
<@ajax> mjg59: how concerned should i be about [drm:intel_dsm_pci_probe] *ERROR* failed to get supported _DSM functions ? <@mjg59> ajax: Entirely unconcerned Signed-off-by: NAdam Jackson <ajax@redhat.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 10 1月, 2012 3 次提交
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由 Dave Airlie 提交于
Reported-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dan Carpenter 提交于
Add a cast here to silence a Gcc warning. drivers/gpu/drm/gma500/mid_bios.c:214:28: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dan Carpenter 提交于
The "if (!p && !p->dev)" condition isn't right because || was intended instead of &&. But actually, "p" is the list cursor and so it's always non-NULL and we can just remove that bit. We can remove the another similar check as well. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Acked-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 09 1月, 2012 5 次提交
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由 Dan Carpenter 提交于
The second lock should be an unlock or it causes a deadlock. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dan Carpenter 提交于
"bo_va" is dereferenced in the error message. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Daniel Vetter 提交于
Fallout from my "kill drm_sman" refactor. Unfortunately gcc seems to have failed me and not warned about this. Tested-by: Jakob Bornecrantz <wallbraker@gmail.com> (on via) Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: Christian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Add a VM manager enabled field and use it to check if vm is enabled. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: jglisse@redhat.com Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 06 1月, 2012 9 次提交
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由 Dave Airlie 提交于
So we have a few places where the drm drivers would like to sleep to be nice to the system, mainly in the modesetting paths, but we also have two cases were atomic modesetting must take place, panic writing and kernel debugger. So provide a central inline to determine if a sleep or delay should be used and use this in the intel and radeon drivers. v2: drop intel_drv.h MSLEEP macro, nobody uses it. Based on patch from Michel Dänzer <michel.daenzer@amd.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43941Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Michel Dänzer 提交于
It would previously write basically random bits to PCI configuration space... Not very surprising that the GPU tended to stop responding completely. The resulting MCE even froze the whole machine sometimes. Now resetting the GPU after a lockup has at least a fighting chance of succeeding. Cc: stable@vger.kernel.org Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
ttm tt rework modified the way we allocate and populate the ttm_tt structure, the AGP side was missing some bit to properly work. Fix those and fix radeon and nouveau AGP support. Tested on radeon only so far. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Tormod Volden 提交于
Signed-off-by: NTormod Volden <debian.tormod@gmail.com> Reviewed-by: NCorbin Simpson <MostAwesomeDude@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Konrad Rzeszutek Wilk 提交于
drm/ttm/dma: Fix accounting error when calling ttm_mem_global_free_page and don't try to free freed pages. The code to figure out how many pages to shrink the pool ends up capping the 'count' at _manager->options.max_size - which is OK. Except that the 'count' is also used when accounting for how many pages are recycled - which we end up with the invalid values. This fixes it by using a different value for the amount of pages to shrink. On top of that we would free the cached page pool - which is nonsense as they are deleted from the pool - so there are no free pages in that pool.. Also we also missed the opportunity to batch the amount of pages to free (similar to how ttm_page_alloc.c does it). This reintroduces the code that was lost during rebasing. Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Konrad Rzeszutek Wilk 提交于
Otherwise we are doing redundant work. Especially since the 'unbind' and 'unpopulate' have been merged and nouveau driver ends up calling it quite excessivly. On a GeForce 8600 GT with Gnome Shell (GNOME 3) we end up spending about 54% CPU time in __change_page_attr_set_clr checking the page flags. The callgraph (annotated) looks as so before this patch: 53.29% gnome-shell [kernel.kallsyms] [k] static_protections | --- static_protections | |--91.80%-- __change_page_attr_set_clr | change_page_attr_set_clr | set_pages_array_wb | | | |--96.55%-- ttm_dma_unpopulate | | nouveau_ttm_tt_unpopulate | | ttm_tt_destroy | | ttm_bo_cleanup_memtype_use | | ttm_bo_release | | kref_put | | ttm_bo_unref | | nouveau_gem_object_del | | drm_gem_object_free | | kref_put | | drm_gem_object_unreference_unlocked | | drm_gem_object_handle_unreference_unlocked.part.1 | | drm_gem_handle_delete | | drm_gem_close_ioctl | | drm_ioctl | | do_vfs_ioctl | | sys_ioctl | | system_call_fastpath | | __GI___ioctl | | | --3.45%-- ttm_dma_pages_put | ttm_dma_page_pool_free | ttm_dma_unpopulate | nouveau_ttm_tt_unpopulate | ttm_tt_destroy | ttm_bo_cleanup_memtype_use | ttm_bo_release | kref_put | ttm_bo_unref | nouveau_gem_object_del | drm_gem_object_free | kref_put | drm_gem_object_unreference_unlocked | drm_gem_object_handle_unreference_unlocked.part.1 | drm_gem_handle_delete | drm_gem_close_ioctl | drm_ioctl | do_vfs_ioctl | sys_ioctl | system_call_fastpath | __GI___ioctl | --8.20%-- change_page_attr_set_clr set_pages_array_wb | |--93.76%-- ttm_dma_unpopulate | nouveau_ttm_tt_unpopulate | ttm_tt_destroy | ttm_bo_cleanup_memtype_use | ttm_bo_release | kref_put | ttm_bo_unref | nouveau_gem_object_del | drm_gem_object_free | kref_put | drm_gem_object_unreference_unlocked | drm_gem_object_handle_unreference_unlocked.part.1 | drm_gem_handle_delete | drm_gem_close_ioctl | drm_ioctl | do_vfs_ioctl | sys_ioctl | system_call_fastpath | __GI___ioctl | --6.24%-- ttm_dma_pages_put ttm_dma_page_pool_free ttm_dma_unpopulate nouveau_ttm_tt_unpopulate ttm_tt_destroy ttm_bo_cleanup_memtype_use ttm_bo_release kref_put ttm_bo_unref nouveau_gem_object_del drm_gem_object_free kref_put drm_gem_object_unreference_unlocked drm_gem_object_handle_unreference_unlocked.part.1 drm_gem_handle_delete drm_gem_close_ioctl drm_ioctl do_vfs_ioctl sys_ioctl system_call_fastpath __GI___ioctl and after this patch all of that disappears. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
We need to synchronize across rings when doing a bo move to make sure we the buffer is idle if it's in use by a different ring than the ring doing the move. v2: fix fence setup for bo moves v3: add missing ring lock/unlock Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
Use semaphores to sync buffers across rings in the CS ioctl. Add a reloc flag to allow userspace to skip sync for buffers. agd5f: port to latest CS ioctl changes. v2: add ring lock/unlock to make sure changes hit the ring. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
Virtual address space are per drm client (opener of /dev/drm). Client are in charge of virtual address space, they need to map bo into it by calling DRM_RADEON_GEM_VA ioctl. First 16M of virtual address space is reserved by the kernel. Once using 2 level page table we should be able to have a small vram memory footprint for each pt (there would be one pt for all gart, one for all vram and then one first level for each virtual address space). Plan include using the sub allocator for a common vm page table area and using memcpy to copy vm page table in & out. Or use a gart object and copy things in & out using dma. v2: agd5f fixes: - Add vram base offset for vram pages. The GPU physical address of a vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete cards and the physical bus address of the stolen memory on integrated chips. - VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1 v3: agd5f: - integrate with the semaphore/multi-ring stuff v4: - rebase on top ttm dma & multi-ring stuff - userspace is now in charge of the address space - no more specific cs vm ioctl, instead cs ioctl has a new chunk v5: - properly handle mem == NULL case from move_notify callback - fix the vm cleanup path v6: - fix update of page table to only happen on valid mem placement v7: - add tlb flush for each vm context - add flags to define mapping property (readable, writeable, snooped) - make ring id implicit from ib->fence->ring, up to each asic callback to then do ring specific scheduling if vm ib scheduling function v8: - add query for ib limit and kernel reserved virtual space - rename vm->size to max_pfn (maximum number of page) - update gem_va ioctl to also allow unmap operation - bump kernel version to allow userspace to query for vm support v9: - rebuild page table only when bind and incrementaly depending on bo referenced by cs and that have been moved - allow virtual address space to grow - use sa allocator for vram page table - return invalid when querying vm limit on non cayman GPU - dump vm fault register on lockup v10: agd5f: - Move the vm schedule_ib callback to a standalone function, remove the callback and use the existing ib_execute callback for VM IBs. v11: - rebase on top of lastest Linus v12: agd5f: - remove spurious backslash - set IB vm_id to 0 in radeon_ib_get() v13: agd5f: - fix handling of RADEON_CHUNK_ID_FLAGS v14: - fix va destruction - fix suspend resume - forbid bo to have several different va in same vm v15: - rebase v16: - cleanup left over of vm init/fini v17: agd5f: - cs checker v18: agd5f: - reworks the CS ioctl to better support multiple rings and VM. Rather than adding a new chunk id for VM, just re-use the IB chunk id and add a new flags for VM mode. Also define additional dwords for the flags chunk id to define the what ring we want to use (gfx, compute, uvd, etc.) and the priority. v19: - fix cs fini in weird case of no ib - semi working flush fix for ni - rebase on top of sa allocator changes v20: agd5f: - further CS ioctl cleanups from Christian's comments v21: agd5f: - integrate CS checker improvements v22: agd5f: - final cleanups for release, only allow VM CS on cayman Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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