1. 18 4月, 2008 2 次提交
    • T
      libata: kill ATA_LFLAG_SKIP_D2H_BSY · 8cebf274
      Tejun Heo 提交于
      Some controllers can't reliably record the initial D2H FIS after SATA
      link is brought online for whatever reason.  Advanced controllers
      which don't have traditional TF register based interface often have
      this problem as they don't really have the TF registers to update
      while the controller and link are being initialized.
      
      SKIP_D2H_BSY works around the problem by skipping the wait for device
      readiness before issuing SRST, so for such controllers libata issues
      SRST blindly and hopes for the best.
      
      Now that libata defaults to hardreset, this workaround is no longer
      necessary.  For controllers which have support for hardreset, SRST is
      never issued by itself.  It is only issued as follow-up SRST for
      device classification and PMP initialization, so there's no need to
      wait for it from prereset.
      
      Kill ATA_LFLAG_SKIP_D2H_BSY.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      8cebf274
    • T
      libata: prefer hardreset · cf480626
      Tejun Heo 提交于
      When both soft and hard resets are available, libata preferred
      softreset till now.  The logic behind it was to be softer to devices;
      however, this doesn't really help much.  Rationales for the change:
      
      * BIOS may freeze lock certain things during boot and softreset can't
        unlock those.  This by itself is okay but during operation PHY event
        or other error conditions can trigger hardreset and the device may
        end up with different configuration.
      
        For example, after a hardreset, previously unlockable HPA can be
        unlocked resulting in different device size and thus revalidation
        failure.  Similar condition can occur during or after resume.
      
      * Certain ATAPI devices require hardreset to recover after certain
        error conditions.  On PATA, this is done by issuing the DEVICE RESET
        command.  On SATA, COMRESET has equivalent effect.  The problem is
        that DEVICE RESET needs its own execution protocol.
      
        For SFF controllers with bare TF access, it can be easily
        implemented but more advanced controllers (e.g. ahci and sata_sil24)
        require specialized implementations.  Simply using hardreset solves
        the problem nicely.
      
      * COMRESET initialization sequence is the norm in SATA land and many
        SATA devices don't work properly if only SRST is used.  For example,
        some PMPs behave this way and libata works around by always issuing
        hardreset if the host supports PMP.
      
        Like the above example, libata has developed a number of mechanisms
        aiming to promote softreset to hardreset if softreset is not going
        to work.  This approach is time consuming and error prone.
      
        Also, note that, dependingon how you read the specs, it could be
        argued that PMP fan-out ports require COMRESET to start operation.
        In fact, all the PMPs on the market except one don't work properly
        if COMRESET is not issued to fan-out ports after PMP reset.
      
      * COMRESET is an integral part of SATA connection and any working
        device should be able to handle COMRESET properly.  After all, it's
        the way to signal hardreset during reboot.  This is the most used
        and recommended (at least by the ahci spec) method of resetting
        devices.
      
      So, this patch makes libata prefer hardreset over softreset by making
      the following changes.
      
      * Rename ATA_EH_RESET_MASK to ATA_EH_RESET and use it whereever
        ATA_EH_{SOFT|HARD}RESET used to be used.  ATA_EH_{SOFT|HARD}RESET is
        now only used to tell prereset whether soft or hard reset will be
        issued.
      
      * Strip out now unneeded promote-to-hardreset logics from
        ata_eh_reset(), ata_std_prereset(), sata_pmp_std_prereset() and
        other places.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      cf480626
  2. 09 4月, 2008 1 次提交
  3. 31 3月, 2008 1 次提交
  4. 24 2月, 2008 1 次提交
    • A
      sata_fsl: fix build with ATA_VERBOSE_DEBUG · b1f5dc48
      Anton Vorontsov 提交于
      This patch fixes build and few warnings when ATA_VERBOSE_DEBUG
      is defined:
      
        CC      drivers/ata/sata_fsl.o
      drivers/ata/sata_fsl.c: In function ‘sata_fsl_fill_sg’:
      drivers/ata/sata_fsl.c:338: warning: format ‘%x’ expects type ‘unsigned int’, but argument 3 has type ‘void *’
      drivers/ata/sata_fsl.c:338: warning: format ‘%x’ expects type ‘unsigned int’, but argument 4 has type ‘struct prde *’
      drivers/ata/sata_fsl.c: In function ‘sata_fsl_qc_issue’:
      drivers/ata/sata_fsl.c:459: error: ‘csr_base’ undeclared (first use in this function)
      drivers/ata/sata_fsl.c:459: error: (Each undeclared identifier is reported only once
      drivers/ata/sata_fsl.c:459: error: for each function it appears in.)
      drivers/ata/sata_fsl.c: In function ‘sata_fsl_freeze’:
      drivers/ata/sata_fsl.c:525: error: ‘csr_base’ undeclared (first use in this function)
      make[2]: *** [drivers/ata/sata_fsl.o] Error 1
      Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      b1f5dc48
  5. 19 2月, 2008 1 次提交
    • J
      libata: eliminate the home grown dma padding in favour of · dde20207
      James Bottomley 提交于
      that provided by the block layer
      
      ATA requires that all DMA transfers begin and end on word boundaries.
      Because of this, a large amount of machinery grew up in ide to adjust
      scatterlists on this basis.  However, as of 2.5, the block layer has a
      dma_alignment variable which ensures both the beginning and length of a
      DMA transfer are aligned on the dma_alignment boundary.  Although the
      block layer does adjust the beginning of the transfer to ensure this
      happens, it doesn't actually adjust the length, it merely makes sure
      that space is allocated for transfers beyond the declared length.  The
      upshot of this is that scatterlists may be padded to any size between
      the actual length and the length adjusted to the dma_alignment safely
      knowing that memory is allocated in this region.
      
      Right at the moment, SCSI takes the default dma_aligment which is on a
      512 byte boundary.  Note that this aligment only applies to transfers
      coming in from user space.  However, since all kernel allocations are
      automatically aligned on a minimum of 32 byte boundaries, it is safe to
      adjust them in this manner as well.
      
      tj: * Adjusting sg after padding is done in block layer.  Make libata
            set queue alignment correctly for ATAPI devices and drop broken
            sg mangling from ata_sg_setup().
          * Use request->raw_data_len for ATAPI transfer chunk size.
          * Killed qc->raw_nbytes.
          * Separated out killing qc->n_iter.
      Signed-off-by: NJames Bottomley <James.Bottomley@HansenPartnership.com>
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJens Axboe <jens.axboe@oracle.com>
      dde20207
  6. 06 2月, 2008 1 次提交
  7. 23 1月, 2008 3 次提交
    • A
      fix drivers/ata/sata_fsl.c double-decl · a984f58d
      akpm@linux-foundation.org 提交于
      drivers/ata/sata_fsl.c: In function 'sata_fsl_fill_sg':
      drivers/ata/sata_fsl.c:337: error: redeclaration of 'si' with no linkage
      drivers/ata/sata_fsl.c:326: error: previous declaration of 'si' was here
      Reported-by: NOlof Johansson <olof@lixom.net>
      Cc: Jeff Garzik <jeff@garzik.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      a984f58d
    • T
      libata: convert to chained sg · ff2aeb1e
      Tejun Heo 提交于
      libata used private sg iterator to handle padding sg.  Now that sg can
      be chained, padding can be handled using standard sg ops.  Convert to
      chained sg.
      
      * s/qc->__sg/qc->sg/
      
      * s/qc->pad_sgent/qc->extra_sg[]/.  Because chaining consumes one sg
        entry.  There need to be two extra sg entries.  The renaming is also
        for future addition of other extra sg entries.
      
      * Padding setup is moved into ata_sg_setup_extra() which is organized
        in a way that future addition of other extra sg entries is easy.
      
      * qc->orig_n_elem is unused and removed.
      
      * qc->n_elem now contains the number of sg entries that LLDs should
        map.  qc->mapped_n_elem is added to carry the original number of
        mapped sgs for unmapping.
      
      * The last sg of the original sg list is used to chain to extra sg
        list.  The original last sg is pointed to by qc->last_sg and the
        content is stored in qc->saved_last_sg.  It's restored during
        ata_sg_clean().
      
      * All sg walking code has been updated.  Unnecessary assertions and
        checks for conditions the core layer already guarantees are removed.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Cc: Jens Axboe <jens.axboe@oracle.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      ff2aeb1e
    • T
      libata: implement protocol tests · 405e66b3
      Tejun Heo 提交于
      Implement protocol tests - ata_is_atapi(), ata_is_nodata(),
      ata_is_pio(), ata_is_dma(), ata_is_ncq() and ata_is_data() and use
      them to replace is_atapi_taskfile() and hard coded protocol tests.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      405e66b3
  8. 03 11月, 2007 12 次提交
  9. 18 10月, 2007 1 次提交