- 18 7月, 2012 2 次提交
-
-
由 Alex Deucher 提交于
Just store the index in the ring structure. Idea taken from one of Jerome's wip rptr patches. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
-
由 Christian König 提交于
Const IBs are executed on the CE not the CP, so we can't fence them in the normal way. So submit them directly before the IB instead, just as the documentation says. v2: keep the extra documentation Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
-
- 17 7月, 2012 4 次提交
-
-
由 Christian König 提交于
Try to save whatever is on the rings when we encounter an lockup. v2: Fix spelling error. Free saved ring data if reset fails. Add documentation for the new functions. v3: Some more spelling fixes v4: It doesn't make sense to save anything if all fences are signaled Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Christian König 提交于
Before emitting any indirect buffer, emit the offset of the next valid ring content if any. This allow code that want to resume ring to resume ring right after ib that caused GPU lockup. v2: use scratch registers instead of storing it into memory v3: skip over the surface sync for ni and si as well v4: use SET_CONFIG_REG instead of PACKET0 Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Christian König 提交于
The IB pool is in gart memory, so it is completely superfluous to unpin / repin it on suspend / resume. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
-
由 Christian König 提交于
We don't need to pad anything if the number of dwords written to the ring already matches the requirements. Fixes some "writting more dword to ring than expected" warnings. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
-
- 21 6月, 2012 2 次提交
-
-
由 Christian König 提交于
Move inter ring syncing with semaphores into the existing ring allocations, with that we need to lock the ring mutex only once. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
-
由 Christian König 提交于
It is completely unnecessary to create fences before they are emitted, so remove it and a bunch of checks if fences are emitted or not. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
-
- 29 5月, 2012 1 次提交
-
-
由 Dave Airlie 提交于
Just move its only caller into the same file as it and make it static. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 23 5月, 2012 1 次提交
-
-
由 Alex Deucher 提交于
This adds prime->fd and fd->prime support to radeon. It passes the sg object to ttm and then populates the gart entries using it. Compile tested only. v2: stub kmap + use new helpers + add reimporting Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 10 5月, 2012 11 次提交
-
-
由 Jerome Glisse 提交于
No need to malloc it any more. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Jerome Glisse 提交于
It never really belonged there in the first place. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Jerome Glisse 提交于
It isn't necessary any more and the suballocator seems to perform even better. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
A startover with a new idea for a multiple ring allocator. Should perform as well as a normal ring allocator as long as only one ring does somthing, but falls back to a more complex algorithm if more complex things start to happen. We store the last allocated bo in last, we always try to allocate after the last allocated bo. Principle is that in a linear GPU ring progression was is after last is the oldest bo we allocated and thus the first one that should no longer be in use by the GPU. If it's not the case we skip over the bo after last to the closest done bo if such one exist. If none exist and we are not asked to block we report failure to allocate. If we are asked to block we wait on all the oldest fence of all rings. We just wait for any of those fence to complete. v2: We need to be able to let hole point to the list_head, otherwise try free will never free the first allocation of the list. Also stop calling radeon_fence_signalled more than necessary. v3: Don't free allocations without considering them as a hole, otherwise we might lose holes. Also return ENOMEM instead of ENOENT when running out of fences to wait for. Limit the number of holes we try for each ring to 3. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Define the interface without modifying the allocation algorithm in any way. v2: rebase on top of fence new uint64 patch v3: add ring to debugfs output Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Allocating and freeing it seperately. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Dumping the current allocations. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Instead of hacking the calculation multiple times. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Some callers illegal called fence_wait_next/empty while holding the ring emission mutex. So don't relock the mutex in that cases, and move the actual locking into the fence code. v2: Don't try to unlock the mutex if it isn't locked. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Jerome Glisse 提交于
This convert fence to use uint64_t sequence number intention is to use the fact that uin64_t is big enough that we don't need to care about wrap around. Tested with and without writeback using 0xFFFFF000 as initial fence sequence and thus allowing to test the wrap around from 32bits to 64bits. v2: Add comment about possible race btw CPU & GPU, add comment stressing that we need 2 dword aligned for R600_WB_EVENT_OFFSET Read fence sequenc in reverse order of GPU write them so we mitigate the race btw CPU and GPU. v3: Drop the need for ring to emit the 64bits fence, and just have each ring emit the lower 32bits of the fence sequence. We handle the wrap over 32bits in fence_process. v4: Just a small optimization: Don't reread the last_seq value if loop restarts, since we already know its value anyway. Also start at zero not one for seq value and use pre instead of post increment in emmit, otherwise wait_empty will deadlock. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
A single global mutex for ring submissions seems sufficient. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 03 5月, 2012 6 次提交
-
-
由 Christian König 提交于
Nothing chipset or ring specific with it, so also move it to radon_ring. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Fixing just another deadlock problem with gpu reset tests. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Don't hard code the 10 seconds timeout. Compute jobs can run much longer. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
It isn't chipset specific, so it makes no sense to have that inside r100.c. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Removing all the different error messages and having just one standard behaviour over all chipset generations. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Just register the debugfs files on init instead of checking the chipset type multiple times. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 21 3月, 2012 1 次提交
-
-
由 Alex Deucher 提交于
This adds a new chunk id to the CS ioctl to support the INDIRECT_BUFFER_CONST packet. On SI, the CP adds a new engine called the CE (Constant Engine) which runs simulatenously with the DE (Drawing Engine, formerly called the ME). This allows the CP to process two related IBs simultaneously. The CE is tasked with loading the constant data (constant buffers, resource descriptors, samplers, etc.) while the DE loads context register state and issues drawing commands. It's up to the userspace application to sychronize the CE and the DE using special synchronization packets. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 29 2月, 2012 1 次提交
-
-
由 Christian König 提交于
Storing pointers to the IBs in a static var just leads to giving the same content back for all cards in the system. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 22 2月, 2012 1 次提交
-
-
由 Michel Dänzer 提交于
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46274 Tested with a Cayman card in a Llano system: The additional files are created and working for the Cayman card but not created for the CPU's built-in GPU. Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 25 1月, 2012 2 次提交
-
-
由 Jerome Glisse 提交于
If GPU lockup is detected in ib_pool get we are holding the ib_pool mutex that will be needed by the GPU reset code. As ib_pool code is safe to be reentrant from GPU reset code we should not block if we are trying to get the ib pool lock on the behalf of the same userspace caller, thus use the radeon_mutex_lock helper. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Jerome Glisse 提交于
Silence out the lock dependency warning by moving bo allocation out of ib mutex protected section. Might lead to useless temporary allocation but it's not harmful as such things only happen at initialization. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 06 1月, 2012 1 次提交
-
-
由 Jerome Glisse 提交于
Virtual address space are per drm client (opener of /dev/drm). Client are in charge of virtual address space, they need to map bo into it by calling DRM_RADEON_GEM_VA ioctl. First 16M of virtual address space is reserved by the kernel. Once using 2 level page table we should be able to have a small vram memory footprint for each pt (there would be one pt for all gart, one for all vram and then one first level for each virtual address space). Plan include using the sub allocator for a common vm page table area and using memcpy to copy vm page table in & out. Or use a gart object and copy things in & out using dma. v2: agd5f fixes: - Add vram base offset for vram pages. The GPU physical address of a vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete cards and the physical bus address of the stolen memory on integrated chips. - VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1 v3: agd5f: - integrate with the semaphore/multi-ring stuff v4: - rebase on top ttm dma & multi-ring stuff - userspace is now in charge of the address space - no more specific cs vm ioctl, instead cs ioctl has a new chunk v5: - properly handle mem == NULL case from move_notify callback - fix the vm cleanup path v6: - fix update of page table to only happen on valid mem placement v7: - add tlb flush for each vm context - add flags to define mapping property (readable, writeable, snooped) - make ring id implicit from ib->fence->ring, up to each asic callback to then do ring specific scheduling if vm ib scheduling function v8: - add query for ib limit and kernel reserved virtual space - rename vm->size to max_pfn (maximum number of page) - update gem_va ioctl to also allow unmap operation - bump kernel version to allow userspace to query for vm support v9: - rebuild page table only when bind and incrementaly depending on bo referenced by cs and that have been moved - allow virtual address space to grow - use sa allocator for vram page table - return invalid when querying vm limit on non cayman GPU - dump vm fault register on lockup v10: agd5f: - Move the vm schedule_ib callback to a standalone function, remove the callback and use the existing ib_execute callback for VM IBs. v11: - rebase on top of lastest Linus v12: agd5f: - remove spurious backslash - set IB vm_id to 0 in radeon_ib_get() v13: agd5f: - fix handling of RADEON_CHUNK_ID_FLAGS v14: - fix va destruction - fix suspend resume - forbid bo to have several different va in same vm v15: - rebase v16: - cleanup left over of vm init/fini v17: agd5f: - cs checker v18: agd5f: - reworks the CS ioctl to better support multiple rings and VM. Rather than adding a new chunk id for VM, just re-use the IB chunk id and add a new flags for VM mode. Also define additional dwords for the flags chunk id to define the what ring we want to use (gfx, compute, uvd, etc.) and the priority. v19: - fix cs fini in weird case of no ib - semi working flush fix for ni - rebase on top of sa allocator changes v20: agd5f: - further CS ioctl cleanups from Christian's comments v21: agd5f: - integrate CS checker improvements v22: agd5f: - final cleanups for release, only allow VM CS on cayman Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 05 1月, 2012 2 次提交
-
-
由 Jerome Glisse 提交于
This allow to share the ib pool with semaphore and avoid having more bo around. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Jerome Glisse 提交于
This avoid to waste ib pool size and avoid a bunch of wait for previous ib to finish. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 21 12月, 2011 5 次提交
-
-
由 Jerome Glisse 提交于
Somewhat specializaed sub-allocator designed to perform sub-allocation for command buffer not only for current cs ioctl but for future command submission ioctl as well. Patch also convert current ib pool to use the sub allocator. Idea is that ib poll buffer can be share with other command buffer submission not having 64K granularity. v2 Harmonize pool handling and add suspend/resume callback to pin/unpin sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman, rs480, rs690, rs880) v3 Simplify allocator v4 Fix radeon_ib_get error path to properly free fence Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Alex Deucher 提交于
Some rptr/wptrs fields have different offsets and not all rings are pm4 so add a new nop field. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Those debugfs files aren't r600 specific, so they shouldn't be in r600.c. Move them to radeon_ring.c and also add functionality to dump CP1 & CP2 ring informations. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
That naming seems to make more sense, since we not only want to run PM4 rings with it. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Christian König 提交于
Emitting fences, semaphores and ib works differently on different ring, so its is easier to maintain separate functions for each ring. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-