- 02 12月, 2013 5 次提交
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由 Arnaud Ebalard 提交于
All hardware parts of the (mv78230 Armada XP based) NETGEAR ReadyNAS 2120 are supported by mainline kernel (USB 3.0 and eSATA rear ports, USB 2.0 front port, Gigabit controller and PHYs for the two rear ports, serial port, LEDs, Buttons, 88SE9170 SATA controllers, three G762 fan controllers, G751 temperature sensor) except for: - the Intersil ISL12057 I2C RTC Chip, - the Armada NAND controller. Support for both of those is currently work in progress and does not prevent boot. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Arnaud Ebalard 提交于
This patch provides some whitespace cleanup for NETGEAR ReadyNAS Duo v2 and 102 .dts files: - Fixed bad spaces - Added some space between nodes to improve readability Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Arnaud Ebalard 提交于
The patch does some cleanup work on NETGEAR ReadyNAS 104 .dts file. Changes are listed below: - Completed conversion from value to macros for GPIO voltage level - Converted all numeric input key values to macros - Fixed all node names and labels to use respectively '-' and '_' - Made button names more explicit - Changed order of included files from general to local - Removed useless clocks and gpio-keys properties - Document ethernet PHY (Marvell 88E1318) via a comment - Made G762 clock node name unique by including g762 in it Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Arnaud Ebalard 提交于
The patch does some cleanup work on NETGEAR ReadyNAS 102 .dts file. Changes are listed below - Added missing button mpp in pinctrl - Converted from value to macros for GPIO voltage level - Converted all numeric input key values to macros - Added GPIO keys pins to pinctrl - Made button names more explicit - Document ethernet PHY (Marvell 88E1318) via a comment - Made G762 clock node name unique by including g762 in it - Fixed all node names and labels to use respectively '-' and '_' - Changed order of included files from general to local - Removed useless clocks and gpio-keys properties Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Arnaud Ebalard 提交于
The patch does some cleanup work on NETGEAR ReadyNAS Duo v2 .dts file. Changes are listed below: - Converted from value to macros for GPIO voltage level - Converted all numeric input key values to macros - Made button names more explicit - Document ethernet PHY (Marvell 88E1318) via a comment - Added header for the file to describe content and author - Made G762 clock node name unique by including g762 in it - Fixed all node names and labels to use respectively '-' and '_' - Changed order of included files from general to local - Removed useless clocks and gpio-keys properties Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 27 11月, 2013 2 次提交
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由 Andrew Lunn 提交于
The RTC on Dove has an interrupt on the PMU interrupt controller. Add this interrupt to the RTC node. Tested using the "RTC Driver Test Example" Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Andrew Lunn 提交于
Instantiate the PMU interrupt controller which Dove has. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 25 11月, 2013 6 次提交
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由 Arnaud Ebalard 提交于
Without that fix, at the end of the shutdown process, the board is still powered (led glowing, fan running, ...). Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Arnaud Ebalard 提交于
NETGEAR ReadyNAS 104 has a NXP PCA9554 I2C to GPIO chip. Among the 8 GPIO lines the chip makes available, four are used on the device to control the SATA LEDs (the four remaining ones are used for SATA disk presence). This patch adds DT entries for NXP PCA9554 and the four SATA GPIO LEDs. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
Globalscale Guruplug has AW-GH381 WiFi/BT on sdio which is always present and cannot be detected in any way. Therefore, mark the node as non-removable instead of broken-cd. While at it, also put a note about connected WiFi/BT chip above. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
SDIO controllers found on Marvell Kirkwood 6281/6282 SoCs require pins to be muxed by pinctrl. As there is only one sane pinctrl setting for this, provide default pinctrl properties to the controller nodes. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Srinivas Kandagatla 提交于
This patch fixes a typo for device_type property of phy node. This can work as of today but once a checks are added in generic code this typo will stop phy from working. Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
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由 Srinivas Kandagatla 提交于
This patch fixes a typo for device_type property of phy node. This can work as of today but once a checks are added in generic code this typo will stop phy from working. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 24 11月, 2013 5 次提交
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由 Ezequiel Garcia 提交于
The Armada 370 Mirabox has a NAND flash, so enable it in the devicetree and add the partitions as prepared in the factory images. In order to skip the driver's custom device detection and use only ONFI detection, the "marvell,keep-config" parameter is used. This is needed because we have no support for setting the timings parameters yet. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Ezequiel Garcia 提交于
The Armada XP GP board has a NAND flash, so enable it in the devicetree. In order to skip the driver's custom device detection and use only ONFI detection, the "marvell,keep-config" parameter is used. This is needed because we haven't support for setting the timings parameters yet and must rely in bootloader's. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Ezequiel Garcia 提交于
The Armada 370 and Armada XP SoC have a NAND controller (aka NFCv2). This commit adds support for it in Armada 370 and Armada XP SoC common devicetree. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Simon Baatz 提交于
Change the file names given in the comments of the Sheevaplug dts files to actually match the real file names. Signed-off-by: NSimon Baatz <gmbnomis@gmail.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Jason Cooper 提交于
Generally, power LEDs should indicate when power is applied, and go out once power is removed. _Not_ annoy the developer with migraine-inducing blinking reminicent of some badly animated television series designed to sell sugar to children. On a more serious note, most of these OS-specific properties aren't necessary and should be removed. I left two that are legitimately tying disk LEDs to disk activity. Other than that, we keep the state the bootloader left them in until userspace changes the state via sysfs. Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 22 11月, 2013 1 次提交
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由 Kirill A. Shutemov 提交于
There are two code paths how page with pmd page table can be freed: pmd_free() and pmd_free_tlb(). I've missed the second one and didn't add page table destructor call there. It leads to leak of page->ptl for pmd page tables, if dynamically allocated page->ptl is in use. The patch adds the missed destructor and modifies documentation accordingly. Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Reported-by: NAndrey Vagin <avagin@openvz.org> Tested-by: NAndrey Vagin <avagin@openvz.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 21 11月, 2013 21 次提交
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由 Michael Neuling 提交于
The VSX MSR bit in the user context indicates if the context contains VSX state. Currently we set this when the process has touched VSX at any stage. Unfortunately, if the user has not provided enough space to save the VSX state, we can't save it but we currently still set the MSR VSX bit. This patch changes this to clear the MSR VSX bit when the user doesn't provide enough space. This indicates that there is no valid VSX state in the user context. This is needed to support get/set/make/swapcontext for applications that use VSX but only provide a small context. For example, getcontext in glibc provides a smaller context since the VSX registers don't need to be saved over the glibc function call. But since the program calling getcontext may have used VSX, the kernel currently says the VSX state is valid when it's not. If the returned context is then used in setcontext (ie. a small context without VSX but with MSR VSX set), the kernel will refuse the context. This situation has been reported by the glibc community. Based on patch from Carlos O'Donell. Tested-by: NHaren Myneni <haren@linux.vnet.ibm.com> Signed-off-by: NMichael Neuling <mikey@neuling.org> Cc: stable@vger.kernel.org Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michael Ellerman 提交于
In commit a489043f "Implement arch_get_random_long() based on H_RANDOM" I broke the SMP=n build. We were getting plpar_wrappers.h via spinlock.h which breaks when SMP=n. Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michael Ellerman 提交于
Up until now we have only used cpu_to_chip_id() in the topology code, which is only used on SMP builds. However my recent commit a4da0d50 "Implement arch_get_random_long/int() for powernv" added a usage when SMP=n, breaking the build. Move cpu_to_chip_id() into prom.c so it is available for SMP=n builds. We would move the extern to prom.h, but that breaks the include in topology.h. Instead we leave it in smp.h, but move it out of the CONFIG_SMP #ifdef. We also need to include asm/smp.h in rng.c, because the linux version skips asm/smp.h on UP. What a mess. Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Li Zhong 提交于
I encountered following issue: [ 0.283035] ibmvscsi 30000015: couldn't initialize event pool [ 5.688822] ibmvscsi: probe of 30000015 failed with error -1 which prevents the storage from being recognized, and the machine from booting. After some digging, it seems that it is caused by commit 4886c399 as dma_mask pointer in viodev->dev is not set, so in dma_set_mask_and_coherent(), dma_set_coherent_mask() is not called because dma_set_mask(), which is dma_set_mask_pSeriesLP() returned EIO. While before the commit, dma_set_coherent_mask() is always called. I tried to replace dma_set_mask_and_coherent() with dma_coerce_mask_and_coherent(), and the machine could boot again. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Aneesh Kumar K.V 提交于
arch/powerpc/platforms/wsp/wsp.c: In function ‘wsp_probe_devices’: arch/powerpc/platforms/wsp/wsp.c:76:3: error: implicit declaration of function ‘of_address_to_resource’ [-Werror=implicit-function-declaration] Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
Commit fba2369e (mm: use vm_unmapped_area() on powerpc architecture) has a bug in slice_scan_available() where we compare an unsigned long (high_slices) against a shifted int. As a result, comparisons against the top 32 bits of high_slices (representing the top 32TB) always returns 0 and the top of our mmap region is clamped at 32TB This also breaks mmap randomisation since the randomised address is always up near the top of the address space and it gets clamped down to 32TB. Cc: stable@vger.kernel.org # v3.10+ Signed-off-by: NAnton Blanchard <anton@samba.org> Acked-by: NMichel Lespinasse <walken@google.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
If TM is not active there is no need to print PACATMSCRATCH so we can save ourselves a line. Signed-off-by: NAnton Blanchard <anton@samba.org> Acked-by: NMichael Neuling <mikey@neuling.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
When reading from the dispatch trace log (dtl) userspace interface, I sometimes see duplicate entries. One example: # hexdump -C dtl.out 00000000 07 04 00 0c 00 00 48 44 00 00 00 00 00 00 00 00 00000010 00 0c a0 b4 16 83 6d 68 00 00 00 00 00 00 00 00 00000020 00 00 00 00 10 00 13 50 80 00 00 00 00 00 d0 32 00000030 07 04 00 0c 00 00 48 44 00 00 00 00 00 00 00 00 00000040 00 0c a0 b4 16 83 6d 68 00 00 00 00 00 00 00 00 00000050 00 00 00 00 10 00 13 50 80 00 00 00 00 00 d0 32 The problem is in scan_dispatch_log() where we call dtl_consumer() but bail out before incrementing the index. To fix this I moved dtl_consumer() after the timebase comparison. Signed-off-by: NAnton Blanchard <anton@samba.org> Cc: stable@vger.kernel.org Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
We waste quite a few lines in our oops output: ... MSR: 8000000000009032 <SF,EE,ME,IR,DR,RI> CR: 28044024 XER: 00000000 SOFTE: 0 CFAR: 0000000000009088 DAR: 000000000000001c, DSISR: 40000000 GPR00: c0000000000c74f0 c00000037cc1b010 c000000000d2bb30 0000000000000000 ... We can do a better job here and remove 3 lines: MSR: 8000000000009032 <SF,EE,ME,IR,DR,RI> CR: 28044024 XER: 00000000 CFAR: 0000000000009088 DAR: 0000000000000010, DSISR: 40000000 SOFTE: 1 GPR00: c0000000000e3d10 c00000037cc2fda0 c000000000d2c3a8 0000000000000001 Also move PACATMSCRATCH up, it doesn't really belong in the stack trace section. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
Machine check exceptions set DAR and DSISR, so print them in our oops output. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Heiko Carstens 提交于
__get_user_pages_fast() may be called with interrupts disabled (see e.g. get_futex_key() in kernel/futex.c) and therefore should use local_irq_save() and local_irq_restore() instead of local_irq_disable()/enable(). Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> CC: <stable@vger.kernel.org> [v3.12] Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Gavin Shan 提交于
This clarifies in the log whether the error is a global PHB error or an individual PE being frozen. Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Gavin Shan 提交于
On PHB3, we will fail to fetch IODA tables without PCI_COMMAND_MASTER on PCI bridges. According to one experiment I had, the MSIx interrupts didn't raise from the adapter without the bit applied to all upstream PCI bridges including root port of the adapter. The patch forces to have that bit enabled accordingly. Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com> CC: <stable@vger.kernel.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Will Deacon 提交于
The ARM architected timer driver doesn't compile without GENERIC_CLOCKEVENTS selected, so ensure that we select it when building for a platform that has the timer. Without this patch, mach-virt fails to build without something like mach-vexpress also selected. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
Uwe reported a build failure when targetting a NOMMU platform with my recent prefetch changes: arch/arm/lib/changebit.S: Assembler messages: arch/arm/lib/changebit.S:15: Error: architectural extension `mp' is not allowed for the current base architecture This is due to use of the .arch_extension mp directive immediately prior to an ALT_SMP(...) instruction. Whilst the ALT_SMP macro will expand to nothing if !CONFIG_SMP, gas will still choke on the directive. This patch fixes the issue by only emitting the sequence (including the directive) if CONFIG_SMP=y. Tested-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Al Viro 提交于
Note that pmds[i] is simply uninitialized at that point... Granted, it's very hard to hit (you need split page locks *and* kmalloc(sizeof(spinlock_t), GFP_KERNEL) failing), but the code is obviously bogus. Introduced by commit 09ef4939 ("x86: add missed pgtable_pmd_page_ctor/dtor calls for preallocated pmds") Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Ulrich Weigand 提交于
I've finally tracked down why my CR signal-unwind test case still fails on little-endian. The problem turned to be that the kernel installs a signal trampoline in the vDSO, and provides a DWARF CFI record for that trampoline. This CFI describes the save location for CR: rsave (70, 38*RSIZE + (RSIZE - CRSIZE)) which is correct for big-endian, but points to the wrong word on little-endian. This is wrong no matter which ABI. In addition, for the ELFv2 ABI, we should not only provide a CFI record for register 70 (cr2), but for all CR fields separately. Strictly speaking, I guess this would mean providing two separate vDSO images, one for ELFv1 processes and one for ELFv2 processes (or maybe playing some tricks with conditional DWARF expressions). However, having CFI records for the other CR fields in ELFv1 is not actually wrong, they just will be ignored. So it seems the simplest fix would be just to always provide CFI for all the fields. Signed-off-by: NUlrich Weigand <Ulrich.Weigand@de.ibm.com> Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
With the little endian support merged, we can add the CONFIG_CPU_LITTLE_ENDIAN kernel config option. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Alistair Popple 提交于
The kernel doesn't build correctly using the ELFv2 ABI. This patch ensures that the ELFv1 ABI is used when building a kernel with an ELFv2 enabled compiler. Signed-off-by: NAlistair Popple <alistair@popple.id.au> Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Rusty Russell 提交于
For the ELFv2 ABI, the hander is the entry point, not a function descriptor. We also need to set up r12, and fortunately the fast_exception_return exit path restores r12 for us so nothing else is required. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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