- 21 2月, 2011 12 次提交
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由 Colin Cross 提交于
During cpu frequency changes, take an extra reference to pllx so that it doesn't turn off and on while the cpu is temporarily on pllp. If the cpu is moved to pllp permanently, pllx will be turned off. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Give each clock its own lock, and remove all lock traversals from parent to child clocks to prevent AB-BA deadlocks. This brings the locking in line with the common struct clk patches and should make conversion simple. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Creates a union of a struct for each type of clock to reduce memory usage and clarify which members are used by all clocks and which are used by a single type. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Make the static clocks look more like the array of clocks so they can all be initalized with the same helper function. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
The existing version did not extend well to core dvfs, drop it for now until the new clk api with clk_prepare and clk_unprepare is ready and non-atomic clocks are possible. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Assume that any clock that has no enable op is always on. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
The PLL lock bits are not reliable, use per-PLL timeouts instead. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Drop the unnecessary pr_debug calls to avoid having to maintain them. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
When updating the CPU PLL frequency, keeping the PLL enabled avoids ramping the PLL all the way down and back up again. Remove the BUG_ON in tegra2_pll_clk_set_rate to allow the rate to change while the PLL is enabled. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Dima Zavin 提交于
Add a new 'reset' clk op. This can be provided for any clock, not just peripherals. Signed-off-by: NDima Zavin <dima@android.com> Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Simon Glass 提交于
This seems to be a regression in 2.6.37. We cannot use writel() here since the resulting wmb() calls l2x0_cache_sync() which uses a spinlock and L1 cache may be off at this point. http://lists.infradead.org/pipermail/linux-arm-kernel/2011-February/041909.htmlSigned-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NColin Cross <ccross@android.com>
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由 Stephen Warren 提交于
Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NColin Cross <ccross@android.com>
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- 20 2月, 2011 1 次提交
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由 Stephen Warren 提交于
If a request already in the queue is passed to tegra_dma_enqueue_req, tegra_dma_req.node->{next,prev} will end up pointing to itself instead of at tegra_dma_channel.list, which is the way a the end-of-list should be set up. When the DMA request completes and is list_del'd, the list head will still point at it, yet the node's next/prev will contain the list poison values. When the next DMA request completes, a kernel panic will occur when those poison values are dereferenced. This makes the DMA driver more robust in the face of buggy clients. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NColin Cross <ccross@android.com>
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- 11 2月, 2011 7 次提交
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由 Mike Rapoport 提交于
Add basic support for CompuLab TrimSlice platform Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
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由 Olof Johansson 提交于
Adding one single defconfig for the tegra family of boards, to over time cover the superset of supported platform and drivers. Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Sometimes, due to high interrupt latency in the continuous mode of DMA transfer, the half buffer complete interrupt is handled after DMA has transferred the full buffer. When this is detected, stop DMA immediately and restart with the next buffer if the next buffer is ready. originally fixed by Victor(Weiguo) Pan <wpan@nvidia.com> In place of using the simple spin_lock()/spi_unlock() in the interrupt thread, using the spin_lock_irqsave() and spin_unlock_irqrestore(). The lock is shared between the normal process context and interrupt context. originally fixed by Laxman Dewangan (ldewangan@nvidia.com) The use of shadow registers caused memory corruption at physical address 0 because the enable bit was not shadowed, and assuming it needed to be set would enable an unconfigured dma block. Most of the register accesses don't need to know the previous state of the registers, and the few places that do need to modify only a few bits in the registers are the same ones that were sometimes incorrectly setting the enable bit. This patch convert tegra_dma_update_hardware to set the entire register, and the other users to read-modify-write, and drops the shadow registers completely. Also fixes missing locking in tegra_dma_allocate_channel Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
On Tegra, calling clk_set_rate on the CPU clock may call into the regulator API. If the regulator driver that controls the CPU voltage rail has been suspended, this can lead to attempted communication with a hardware block that has already been turned off. Adds a SUSPEND_PREPARE notification hook to drop the frequency to the lowest possible during suspend. Also adds 216MHz (off of PLLP) as the lowest CPU frequency, which allows PLLX to be turned off. Signed-off-by: NColin Cross <ccross@android.com>
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由 Gary King 提交于
Adds gart, hdmi, avp, host1x, and pwm controllers to mach/iomap.h Signed-off-by: NGary King <gking@nvidia.com> Signed-off-by: NColin Cross <ccross@android.com>
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- 10 2月, 2011 9 次提交
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由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Implement read_persistent_clock by reading the Tegra RTC registers that stay running during suspend. Save and restore the timer configuration register in suspend. Signed-off-by: NColin Cross <ccross@android.com>
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由 Gary King 提交于
Adds missing drive pingroups, saves all drive pingroups in suspend, and restores the pinmux registers in the proper order. Signed-off-by: NGary King <gking@nvidia.com> Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Save and restore pll and osc state during suspend Add digital audio clocks Update clk dev associations Correct max clock frequencies Add pll_p as additional cpu clock state Add values to plld table Fix register offset for sdmmc4 clock Add blink timer to tegra2_clocks Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Fixes typo in INT_CPU1_PMU_INTR (original fix from Will Deacon) Adds board irqs Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
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- 07 2月, 2011 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 2月, 2011 2 次提交
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由 Ben Hutchings 提交于
FREQ is a ridiculously short name for a platform-specific macro in a generic header, and it now conflicts with an enumeration in the gspca/ov519 driver. Also delete conditional reference to ixp4xx_get_board_tick_rate() which is not defined anywhere. Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>
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由 Krzysztof Hałasa 提交于
Queues should be empty when released, if not, there is a safety valve. Make sure the queue is usable after it triggers. Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>
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- 05 2月, 2011 1 次提交
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由 Mika Westerberg 提交于
The last register is at offset 0xa8 making the resource end to be 0xac - 1 instead of 0xb0 - 1. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 2月, 2011 2 次提交
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由 Ming Lei 提交于
Panda uses both twl6030 otg phy(vbus, id) and internal phy(data lines, DP/DM), so removes usb_nop_xceiv_register to make twl6030 otg driver working since current otg code only supports one global transceiver. Otherwise, musb doesn't work without the remove. Reviewd-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NMing Lei <tom.leiming@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Marek Vasut 提交于
This patch fixes bug introduced in revision: f8e9e984 omap1: DMA: move LCD related code from plat-omap to mach-omap1 The code introduced by this patch didn't consider any other CPUs but OMAP1510, which rendered OMAP310 -- which has the same LCD controller -- non-working. Use cpu_is_omap15xx() instead of cpu_is_omap1510() to squash this issue. Bug found on Palm Zire 71 hardware. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 2月, 2011 4 次提交
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由 Thomas Weber 提交于
This patch fixes a wrongly used lcd enable pin. The Devkit8000 uses twl4030_ledA configured as output gpio only for the lcd enable line. twl4030_gpio.1 is used through the generic gpio functions while ledA is used via low level twl4030 calls. This patch removes the low level calls and use the generic gpio functions for initialization and use of ledA. This patch also fixes a bug where the lcd would not power down when blanking. Further this patch fixes an indentation issue. The comment line uses eight whitespace and is replaced with a hard tab. gpio_request + gpio_direction_output are replaced with gpio_request_one. The return value of gpio_request_one is used to set the value of the gpio to -EINVAL when unsuccessful, so that gpio_is_valid can detect the unsuccessful request. But already successful requested gpios are not freed. Reported-by: NDaniel Morsing <daniel.morsing@gmail.com> Signed-off-by: NThomas Weber <weber@corscience.de> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Huang Weiyi 提交于
Remove duplicated #include('s) in arch/arm/mach-omap1/time.c Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Aaro Koskinen 提交于
Free allocated memory on error exit. Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Aaro Koskinen 提交于
With the commit 75790251 (regulator: Factor out voltage set operation into a separate function) fixed voltage regulator setup will fail if there are voltage constraints defined. This made MMC unusable on this board. Fix by just deleting those redundant constraints. Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com> Reviewed-by: NJarkko Nikula <jhnikula@gmail.com> [tony@atomide.com: updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 2月, 2011 1 次提交
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由 Stephen Warren 提交于
Add fields to describe all the audio-related GPIOs on Harmony, except for the codec's GPIO IRQ, which will be passed in its i2c_board_info. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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