1. 28 11月, 2013 1 次提交
  2. 01 10月, 2013 4 次提交
  3. 17 9月, 2013 1 次提交
    • V
      drm/i915: Fix port_clock and adjusted_mode.clock readout all over · 18442d08
      Ville Syrjälä 提交于
      Now that adjusted_mode.clock no longer contains the pixel_multiplier, we
      can kill the get_clock() callback and instead do the clock readout
      in get_pipe_config().
      
      Also i9xx_crtc_clock_get() can now extract the frequency of the PCH
      DPLL, so use it to populate port_clock accurately for PCH encoders.
      For DP in port A the encoder is still responsible for filling in
      port_clock. The FDI adjusted_mode.clock extraction is kept in place
      for some extra sanity checking, but we no longer need to pretend it's
      also the port_clock.
      
      In the encoder get_config() functions fill out adjusted_mode.clock
      based on port_clock and other details such as the DP M/N values,
      HDMI 12bpc and SDVO pixel_multiplier. For PCH encoders we will then
      do an extra sanity check to make sure the dotclock we derived from
      the FDI configuratiuon matches the one we derive from port_clock.
      
      DVO doesn't exist on PCH platforms, so it doesn't need to anything
      but assign adjusted_mode.clock=port_clock. And DDI is HSW only, so
      none of the changes apply there.
      
      v2: Use hdmi_reg color format to detect 12bpc HDMI case
      v3: Set adjusted_mode.clock for LVDS too
      v4: Rename ironlake_crtc_clock_get to ironlake_pch_clock_get,
          eliminate the useless link_freq variable.
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      18442d08
  4. 13 9月, 2013 1 次提交
  5. 12 9月, 2013 1 次提交
    • D
      drm/i915/sdvo: Robustify the dtd<->drm_mode conversions · 1c4a814e
      Daniel Vetter 提交于
      We've failed to properly clear out the flags when converting a dtd to
      a drm mode. For more paranoia just memset the entire structure (and
      drop the now redundant clears).
      
      Also since
      
      commit 135c81b8
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sun Jul 21 21:37:09 2013 +0200
      
          drm/i915: clean up crtc timings computation
      
      we don't update the crtc timings any more properly, so do that again.
      
      v2: Remove more redundant clearing, spotted by Ville.
      
      v3: Actually make it compile. Oops.
      
      v4: Use a temporary structure to fill in the mode and copy it over
      with drm_mode_copy. This will ensure we don't clobber the mode list or
      id. Suggested by Ville.
      
      Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Reported-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      [danvet: Use the = {}; structure clearing instead of memset as
      suggested by Ville.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1c4a814e
  6. 10 9月, 2013 1 次提交
  7. 06 9月, 2013 1 次提交
  8. 04 9月, 2013 1 次提交
  9. 22 8月, 2013 1 次提交
  10. 08 8月, 2013 1 次提交
  11. 05 8月, 2013 1 次提交
  12. 24 7月, 2013 1 次提交
  13. 12 7月, 2013 1 次提交
  14. 01 7月, 2013 1 次提交
  15. 12 6月, 2013 1 次提交
  16. 11 6月, 2013 2 次提交
  17. 10 6月, 2013 4 次提交
  18. 07 6月, 2013 1 次提交
    • D
      drm/i915: pipe config quirk infrastructure plus sdvo mode.flags fix · bb760063
      Daniel Vetter 提交于
      For various reasons the hw state readout might not be able to
      faithfully match the hw state:
      - broken hw (like the case which motivated this patch here where the
        sdvo encoder does not implemented mandatory functionality
        correctly).
      - platforms which are not supported fully with the pipe config
        infrastructure
      - if our code doesn't support a given hw configuration natively, e.g.
        special restrictions on the per-pipe panel fitters when they're used
        in high-quality scaling modes.
      
      In all these cases both fastboot and the hw state cross checker need
      to be aware of these cases and act accordingly. To be able to do this
      add a new quirk flag to the pipe config structure.
      
      The specific case at hand is an sdvo encoder which doesn't implement
      the get_timings function, so adjusted_mode flags will be wrong. The
      strange thing though is that the encoder _does_ work, even though it
      doesn't implement any of the timings functions (so neither get nor
      set, neither for input nor output timings).
      
      Not that non-compliant sdvo encoder are any surprise at all ...
      
      v2:
      - Don't read random garbage from the dtd if the get_timings call
        failed (suggested by Chris).
      - Still check the interlaced flag, that's read out from someplace
        else. We want maximal paranoia, after all.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      bb760063
  19. 06 6月, 2013 2 次提交
    • D
      drm/i915: hw state readout support for pixel_multiplier · 6c49f241
      Daniel Vetter 提交于
      Incomplete since ilk+ support needs proper pch dpll tracking first.
      SDVO get_config parts based on a patch from Jesse Barnes, but fixed up
      to actually work.
      
      v2: Make sure that we call encoder->get_config _after_ we
      get_pipe_config to be consistent in both setup_hw_state and the
      modeset state checker. Otherwise the clever trick with handling the
      pixel mutliplier on i915G/GM where the encoder overrides the default
      value of 1 from the crtc get_pipe_config function doesn't work.
      Spotted by Imre Deak.
      
      v3: Actually cross-check the pixel mutliplier (but not on pch split
      platforms for now). Now actually also tested on a i915G with a sdvo
      encoder plugged in.
      
      Cc: Imre Deak <imre.deak@intel.com>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Reviewed-by: NImre Deak <imre.deak@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      6c49f241
    • D
      drm/i915: set default value for config->pixel_multiplier · ef1b460d
      Daniel Vetter 提交于
      This way we can simplify the code quite a bit.
      
      Also add a WARN in the sdvo code to complain about a bogus value
      and kill the readout code in intel_ddi.c that Jesse sneaked in.
      HW state readout for the pixel multiplier will work a bit differently
      in the end.
      
      v2: Rebase on top of the fdi pixel mutliplier handling fix.
      Reviewed-by: NImre Deak <imre.deak@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ef1b460d
  20. 04 6月, 2013 1 次提交
  21. 01 6月, 2013 1 次提交
  22. 21 5月, 2013 1 次提交
    • J
      drm/i915: add encoder get_config function v5 · 045ac3b5
      Jesse Barnes 提交于
      We can use this for fetching encoder specific pipe_config state, like
      mode flags, adjusted clock, etc.
      
      Just used for mode flags atm, so we can check the pipe config state at
      mode set time.
      
      v2: get_config when checking hw state too
      v3: fix DVO and LVDS mode flags (Ville)
          get SDVO DTD for flag fetch (Ville)
      v4: use input timings (Ville)
          correct command used (Ville)
          remove gen4 check (Ville)
      v5: get DDI flag config too
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v4)
      Tested-by: Paulo Zanoni <przanoni@gmail.com> (the new hsw ddi stuff)
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      045ac3b5
  23. 11 5月, 2013 3 次提交
  24. 23 4月, 2013 1 次提交
    • D
      drm/i915: avoid full modeset when changing the color range properties · ae4edb80
      Daniel Vetter 提交于
      Automatic color range selection was added in
      
      commit 55bc60db
      Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Date:   Thu Jan 17 16:31:29 2013 +0200
      
          drm/i915: Add "Automatic" mode for the "Broadcast RGB" property
      
      but that removed the check to avoid a full modeset if the value is
      unchanged. Unfortunately X sets all properties with their current
      value at start-up, resulting in some ugly flickering which shouldn't
      be there.
      
      v2: Change old_range from bool to uint32_t, spotted by Ville.
      
      v3: Actually git add everything ;-)
      
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ae4edb80
  25. 18 4月, 2013 2 次提交
    • E
      drm/i915: (re)init HPD interrupt storm statistics · 821450c6
      Egbert Eich 提交于
      When an encoder is shared on several connectors there is only
      one hotplug line, thus this line needs to be shared among these
      connectors.
      If HPD detect only works reliably on a subset of those connectors,
      we want to poll the others. Thus we need to make sure that storm
      detection doesn't mess up the settings for those connectors.
      Therefore we store the settings in the intel_connector struct and
      restore them from there.
      If nothing is set but the encoder has a hpd_pin set we assume this
      connector is hotplug capable.
      On init/reset we make sure the polled state of the connectors
      is (re)set to the default value, the HPD interrupts are marked
      enabled.
      Signed-off-by: NEgbert Eich <eich@suse.de>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      821450c6
    • E
      drm/i915: Fix SDVO connector and encoder get_hw_state functions · 7a7d1fb7
      Egbert Eich 提交于
      The connector associated with the encoder is considered active when the
      output associtated with this connector is active on the encoder. The
      encoder itself is considered active when either there is an active
      output on  it or the  respective SDVO channel is active.
      Having active outputs when the SDVO channel is inactive seems to be
      inconsistent: such states can be found when intel_modeset_setup_hw_state()
      collects the hardware state set by the BIOS.
      This inconsistency will be fixed in intel_sanitize_crtc()
      (when intel_crtc_update_dpms() is called), this however only happens
      when the encoder is associated with a crtc.
      
      This patch also reverts:
      
           commit bd6946e8
           Author: Daniel Vetter <daniel.vetter@ffwll.ch>
           Date:   Tue Apr 2 21:30:34 2013 +0200
      
               drm/i915: Fix sdvo connector get_hw_state function
      Signed-off-by: NEgbert Eich <eich@suse.de>
      Suggested-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63031
      Cc: stable@vger.kernel.org
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      7a7d1fb7
  26. 03 4月, 2013 1 次提交
  27. 28 3月, 2013 3 次提交
    • D
      drm/i915: clean up pipe bpp confusion · 5d2d38dd
      Daniel Vetter 提交于
      - gen4 and earlier (save for g4x) only really have a 8bpc pipe, with
        the possibility to dither to 6bpc using the panel fitter
      - g4x has hdmi, but no 12 bpc pipe ... !? Clamp hdmi accordingly.
      - TV/SDVO out are the only connectors available on platforms with
        a pipe bpp != 8, add code to force the pipe to 8bpc unconditionally.
      
      <rant>
      The dither handling on gmch platforms is one giant disaster. I'm hoping
      somewhat that vlv enabling will fix this up, but given that the 6bpc
      handling for edp was simply added with another quick hack, I don't have
      high hopes ...
      </rant>
      
      v2: Neither vlv nor g4x have 12bpc pipes. Still set pipe_bpp to 12*3,
      but let the crtc code clamp things down to 10bpc on these platforms.
      
      v3: Fix a bpc vs. bpp mixup in the gen4 and earlier pipe_bpp limiter
      code.
      
      v4: Drop the hunk in intel_hdmi.c about g4x/vlv 12bpc, it was wrong.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      5d2d38dd
    • D
      drm/i915: add pipe_config->limited_color_range · 50f3b016
      Daniel Vetter 提交于
      Now that we have a useful struct for this, let's use it. Some neat
      pointer-chasing required, but it's all there already.
      
      v2: Rebased on top of the added Haswell limited color range support.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      50f3b016
    • D
      drm/i915: add pipe_config->has_pch_encoder · 5bfe2ac0
      Daniel Vetter 提交于
      This is used way too often in the enable/disable paths. And will
      be even more useful in the future.
      
      Note that correct semantics of this change highly depend upon
      correct updating of intel_crtc->config: Like with all other
      modeset state, we need to call ->disable with the old config,
      but ->mode_set and ->enable with the new config.
      
      v2: Do not yet use the flag in the ->disable callbacks - atm we don't
      yet have support for the information stored in the pipe_config in the
      hw state readout code, so this will be wrong at boot-up/resume.
      
      v3: Rebased on top of the hdmi/dp ddi encoder merging.
      
      v4: Fixup stupid rebase error which lead to a NULL vfunc deref.
      
      v5: On haswell the VGA port is on the PCH!
      
      v6: s/IS_HASWELL/HAS_DDI/, spotted by Paulo Zanoni. Also add a missing
      parameter name in a function declaration.
      
      v7: Don't forget to git add ...
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      5bfe2ac0