This patch add some helpers to control modem lines (CTS/RTS/DSR...) via
GPIO.
This will be useful for many boards which have a serial controller that
only handle CTS/RTS pins (or even just RX/TX).
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tested-by: NYegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The SC16IS7xx is a slave I2C-bus/SPI interface to a single-channel
high performance UART. The SC16IS7xx's internal register set is
backward-compatible with the widely used and widely popular 16C450.

The SC16IS7xx also provides additional advanced features such as
auto hardware and software flow control, automatic RS-485 support, and
software reset.
Signed-off-by: NJon Ringle <jringle@gridpoint.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add earlycon support for the arm/arm64 semihosting debug serial
interface. This allows enabling a debug console when early_params are
processed. This is based on the arm64 earlyprintk smh support and is
intended to replace it.
Signed-off-by: NRob Herring <robh@kernel.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This introduces generic earlycon infrastructure for serial devices
based on the 8250 earlycon. This allows for supporting earlycon option
with other serial devices. The earlycon output is enabled at the time
early_params are processed.

Only architectures that have fixmap support or have functional ioremap
when early_params are processed are supported. This is the same
restriction that the 8250 driver had.
Signed-off-by: NRob Herring <robh@kernel.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add driver for MEN's 16z135 High Speed UART.

The 16z135 is a memory mapped UART Core on an MCB FPGA and has 1024 byte
deep FIFO buffers for the RX and TX path. It also has configurable FIFO
fill level IRQs and data copied to and from the hardware has to be
acknowledged.
Signed-off-by: NJohannes Thumshirn <johannes.thumshirn@men.de>
Reviewed-by: NAlan Cox <gnomes@lxorguk.ukuu.org.uk>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

New driver for NXP (Philips) UART ICs was introduced in September 2012.
Old driver no longer used anywhere, this patch removes it.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop box platforms.

ASC is embedded in ST COMMS IP block. It supports Rx & Tx functionality.
It support all industry standard baud rates.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add Freescale lpuart driver support. The lpuart device
can be found on Vybrid VF610 and Layerscape LS-1 SoCs.
Signed-off-by: NJingchang Lu <b35083@freescale.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This driver supports the RocketPort EXPRESS and RocketPort INFINITY
families of PCI/PCIe multiport serial adapters.  These adapters use a
"RocketPort 2" ASIC that is not compatible with the original RocketPort
driver (CONFIG_ROCKETPORT).

Tested with the RocketPort EXPRESS Octa DB9 and Quad DB9.  Also added an
old RocketPort 8J PCI card to the same system to verify that rocket.c and
rp2.c coexist peacefully.
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

NVIDIA's Tegra has multiple UART controller which supports:
- APB DMA based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
  of frame achieve or not.
- HW controlled RTS and CTS flow control to reduce SW overhead.

Add serial driver to use all above feature.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Acked-by: NAlan Cox <alan@linux.intel.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Driver for non-standard on-chip UART, instantiated in the ARC (Synopsys)
FPGA Boards such as ARCAngel4/ML50x
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This special driver makes it possible to temporary use NMI debugger port
as a normal console by issuing 'nmi_console' command (assuming that the
port is attached to KGDB).

Unlike KDB's disable_nmi command, with this driver you are always able
to go back to the debugger using KGDB escape sequence ($3#33).  This is
because this console driver processes the input in NMI context, and thus
is able to intercept the magic sequence.

Note that since the console interprets input and uses polling
communication methods, for things like PPP it is still better to fully
detach debugger port from the KGDB NMI (i.e. disable_nmi), and use raw
console.

Usually, to enter the debugger one have to type the magic sequence, so
initially the kernel will print the following prompt on the NMI debugger
console:

	Type $3#33 to enter the debugger>

For convenience, there is a kgdb_fiq.knock kernel command line option,
when set to 0, this turns the special command to just a return key
press, so the kernel will be printing this:

	Hit <return> to enter the debugger>

This is more convenient for long debugging sessions, although it makes
nmi_console feature somewhat useless.

And for the cases when NMI connected to a dedicated button, the knocking
can be disabled altogether by setting kgdb_fiq.knock to -1.
Suggested-by: NColin Cross <ccross@android.com>
Signed-off-by: NAnton Vorontsov <anton.vorontsov@linaro.org>
Acked-by: NAlan Cox <alan@linux.intel.com>
Acked-by: NJason Wessel <jason.wessel@windriver.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This driver is a replacement for a SC26XX driver with a lot of
improvements and new features.
The main differences from the SC26XX driver:
- Removed dependency on MIPS. Driver can be used on any platform.
- Added support for SCC2681, SCC2691, SCC2692, SC28L91, SC28L92,
  SC28L202, SCC68681 and SCC68692 ICs.
- Using devm_-related functions.
- Improved error handling of serial port, improved FIFO handling.
- Ability to load multiple instances of drivers.

To avoid the possibility of regression, driver SC26XX left in the
system to confirm the stability of the driver on platforms where
it is being used.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This driver is a replacement for a MAX3107 driver with a lot of
improvements and new features.
The main differences from the old version:
- Using the regmap.
- Using devm_XXX-related functions.
- The use of threaded IRQ with IRQF_ONESHOT flag allows the driver to
  the hardware that supports only level IRQ.
- Improved error handling of serial port, improved FIFO handling,
  improved hardware & software flow control.
- Advanced flags allows turn on RS-485 mode (Auto direction control).
- Ability to load multiple instances of drivers.
- Added support for MAX3108.
- GPIO support.
- Driver is quite ready for adding I2C support and support other ICs
  with compatible registers set (MAX3109, MAX14830).
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This patch adds a driver for the 3 High Speed UARTs of the LPC32xx SoC that
support up to 921600bps. These UARTs are different from the 4 "Standard" UARTs
of the LPC32xx.
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This allows altera_uart to be used for KGDB debugging over serial line.
Signed-off-by: NTobias Klauser <tklauser@distanz.ch>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

All production devices operate in the Oaktrail configuration with legacy PC
elements present and an ACPI BIOS. Continue stripping out the Moorestown
elements from the tree leaving Medfield.
Signed-off-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The drivers/tty/serial dir is already getting rather busy.
Relocate the 8250 related drivers to their own subdir to
reduce the clutter.

Note that sunsu.c is not included in this move -- it is
8250-like hardware, but it does not use any of the existing
infrastructure -- and does not depend on SERIAL_8250.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

With reset port, set clock and get clock functions in SoC specific extentions
being removed, only the driver probe is left over in these extensions. The
probe function itself can be merged into one and moved into the samsung common
serial driver. With driver probe also moved, all the SoC specific extentions
are no longer required and they are deleted.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Sending a break on the SOC UARTs found in some MPC83xx/85xx/86xx
chips seems to cause a short lived IRQ storm (/proc/interrupts
typically shows somewhere between 300 and 1500 events).  Unfortunately
this renders SysRQ over the serial console completely inoperable.

The suggested workaround in the errata is to read the Rx register,
wait one character period, and then read the Rx register again.
We achieve this by tracking the old LSR value, and on the subsequent
interrupt event after a break, we don't read LSR, instead we just
read the RBR again and return immediately.

The "fsl,ns16550" is used in the compatible field of the serial
device to mark UARTs known to have this issue.

Thanks to Scott Wood for providing the errata data which led to
a much cleaner fix.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch adds the driver for the built-in UART of the
Atheros AR933X SoCs.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: linux-serial@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2526/Signed-off-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

SiRFprimaII is the latest generation application processor from CSR’s
multi-function SoC product family.
The SoC support codes are in arch/arm/mach-prima2 from Linux mainline
3.0.

There are three dedicated UARTs in system. This patch adds basic driver
support for them.

It has used the newest pinmux subsystem from Linus Walleij.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NRong Wang <Rong.Wang@csr.com>
Signed-off-by: NBin Shi <Bin.Shi@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This driver has been broken at least since 2008. At that time,
a88487c7 (Fix compile errors in SGI console drivers) broke this
driver completely.

And since nobody noticed for the past 3 years, move it into staging. I
think this will rot there and we will throw it away completely after
some time. Or maybe someone will volunteer to fix it ;).
Signed-off-by: NJiri Slaby <jslaby@suse.cz>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Alan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The Synopsys DesignWare 8250 is an 8250 that has an extra interrupt that
gets raised when writing to the LCR when busy.  To handle this we need
special serial_out, serial_in and handle_irq methods.  Add a new
platform driver that uses these accessors.

Cc: Alan Cox <alan@linux.intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This reverts commit 6b1a98d1.

It causes a build error that needs to be resolved differently.

Cc: Alan Cox <alan@linux.intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The Synopsys DesignWare 8250 is an 8250 that has an extra interrupt that
gets raised when writing to the LCR when busy.  To handle this we need
special serial_out, serial_in and handle_irq methods.  Add a new
function serial8250_use_designware_io() that configures a uart_port with
these accessors.

Cc: Alan Cox <alan@linux.intel.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

bfin_5xx.c is not a general name for all Blackfin chips.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

On Tue, 28 Jun 2011, Ben Dooks wrote:

> On Tue, Jun 28, 2011 at 11:22:57PM +0200, Arnd Bergmann wrote:
>
> > On a related note, what about mach-s3c2400? It seems to be even more
> > incomplete.
>
> Probably the same fate awaits that. It is so old that there's little
> incentive to do anything with it.

So out it goes as well.

The PORT_S3C2400 definition in include/linux/serial_core.h is left there
to prevent a reuse of the same number for another port type.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Commit bcae8aeb "[ARM] S3C24A0: Initial architecture support files"
brought in a bunch of files while explicitly leaving out the corresponding
Kconfig entry, stating that the series is not complete.

More than 2.5 years later, the support for this has not seen any progress.
This is therefore dead code.  If someone wants to revive this code, it is
always possible to retrieve it from the Git repository.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NBen Dooks <ben-linux@fluff.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com>
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Cc: alan@lxorguk.ukuu.org.uk
Cc: linux-mips@linux-mips.org
Cc: linux-serial@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2269/Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The Xilinx PS Uart is used on the new ARM based SoC. This
UART is not compatible with others such that a seperate
driver is required.
Signed-off-by: NJohn Linn <john.linn@xilinx.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This driver supports UART-DM HW on MSM platforms. It uses the on
chip DMA to drive data transfers and has optional support for UART
power management independent of Linux suspend/resume and wakeup
from Rx.

The driver was originally developed by Google. It is functionally
equivalent to the version available at:
http://android.git.kernel.org/?p=kernel/experimental.git
the differences being:
1) Remove wakelocks and change unsupported DMA API.
2) Replace clock selection register codes by macros.
3) Fix checkpatch errors and add inline documentation.
4) Add runtime PM hooks for active power state transitions.
5) Handle error path and cleanup resources if required.

CC: Nick Pelly <npelly@google.com>
Signed-off-by: NSankalp Bose <sankalpb@codeaurora.org>
Signed-off-by: NMayank Rana <mrana@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

msm_smd_tty driver provides tty device interface
to 'DS' and 'GPSNMEA' streaming SMD ports.

Cc: Brian Swetland <swetland@google.com>
Signed-off-by: NNiranjana Vishwanathapura <nvishwan@codeaurora.org>
Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

lh7a40x has only been receiving updates for updates to generic code.
The last involvement from the maintainer according to the git logs was
in 2006.  As such, it is a maintainence burden with no benefit.

This gets rid of two defconfigs.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The serial drivers are really just tty drivers, so move them to
drivers/tty/ to make things a bit neater overall.

This is part of the tty/serial driver movement proceedure as proposed by
Arnd Bergmann and approved by everyone involved a number of months ago.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Rogier Wolff <R.E.Wolff@bitwizard.nl>
Cc: Michael H. Warfield <mhw@wittsend.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The kgdb invokes the poll_put_char and poll_get_char when communicating
with the host. This patch also changes the initialization order because the
kgdb will check at the very beginning, if there is a valid serial
driver.
Signed-off-by: NCosmin Cojocar <cosmin.cojocar@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

UART driver of Intel EG20T(Topcliff) PCH

Intel EG20T PCH is the platform controller hub that is going to be used in
Intel's general embedded platform. All IO peripherals in
Intel EG20T PCH are actually devices sitting on AMBA bus.
Intel EG20T PCH has UART I/F. Using this I/F, it is able to access system
devices connected to UART.
Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This adds a driver for the serial ports found in VIA and WonderMedia
Systems-on-Chip. Interrupt-driven FIFO operation is implemented.
The hardware also supports pure register-based operation (which is
slower) and DMA-based FIFO operation. As the FIFOs are only 16 bytes
long, DMA operation is probably not worth the hassle.
Signed-off-by: NAlexey Charkov <alchark@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>