1. 05 11月, 2009 4 次提交
  2. 04 11月, 2009 1 次提交
  3. 02 11月, 2009 1 次提交
    • P
      sh: intc: Handle legacy IRQ reservation in vector map. · 45b9deaf
      Paul Mundt 提交于
      Different CPUs will have different starting vectors, with varying
      amounts of reserved or unusable vector space prior to the first slot.
      This introduces a legacy vector reservation system that inserts itself in
      between the CPU vector map registration and the platform specific IRQ
      setup. This works fine in practice as the only new vectors that boards
      need to establish on their own should be dynamically allocated rather
      than arbitrarily assigned. As a plus, this also makes all of the
      converted platforms sparseirq ready.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      45b9deaf
  4. 30 10月, 2009 8 次提交
  5. 28 10月, 2009 2 次提交
  6. 27 10月, 2009 4 次提交
  7. 26 10月, 2009 5 次提交
  8. 20 10月, 2009 1 次提交
  9. 19 10月, 2009 2 次提交
  10. 18 10月, 2009 1 次提交
    • P
      sh: Disable SCIF2 on the SH-X3 proto CPU. · 15dfdddb
      Paul Mundt 提交于
      SCIF2 and the FPU exceptions happen to share vector numbers, one in
      EXPEVT and the other in INTEVT. This is a violation of the interface and
      should have never made it in to silicon. On top of that, the demux hack
      that was added for special dispatch is rather error prone, and introduces
      more problems than it solves. Kill all of it off, and just refuse to deal
      with SCIF2 outright.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      15dfdddb
  11. 17 10月, 2009 1 次提交
  12. 16 10月, 2009 6 次提交
    • P
      sh: Kill off legacy UBC wakeup cruft. · cae19b59
      Paul Mundt 提交于
      This code was added for some ancient SH-4 solution engines with peculiar
      boot ROMs that did silly things to the UBC MSTP bits. None of these have
      been in the wild for years, and these days the clock framework wraps up
      the MSTP bits, meaning that the UBC code is one of the few interfaces
      that is stomping MSTP bits underneath the clock framework. At this point
      the risks far outweigh any benefit this code provided, so just kill it
      off.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      cae19b59
    • P
      sh: Support SCHED_MC for SH-X3 multi-cores. · 896f0c0e
      Paul Mundt 提交于
      This enables SCHED_MC support for SH-X3 multi-cores. Presently this is
      just a simple wrapper around the possible map, but this allows for
      tying in support for some of the more exotic NUMA clusters where we can
      actually do something with the topology.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      896f0c0e
    • P
      sh: Fix up IRQ re-enabling for the need_resched() case. · 9dbe00a5
      Paul Mundt 提交于
      In the case where need_resched() is set in between the cpu_idle() and
      pm_idle() calls we were missing an else case for just re-enabling local
      IRQs and bailing out. This was noticed by the irqs_disabled() warning,
      even though IRQs were being re-enabled elsewhere.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      9dbe00a5
    • P
      sh: Make check_pgt_cache() more aggressive while idling. · 0e6d4986
      Paul Mundt 提交于
      This follows the x86 change and moves check_pgt_cache() up under the
      !need_resched() tight loop, rather than simply calling in to it when
      exiting idle.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      0e6d4986
    • P
      sh: Idle loop chainsawing for SMP-based light sleep. · f533c3d3
      Paul Mundt 提交于
      This does a bit of chainsawing of the idle loop code to get light sleep
      working on SMP. Previously this was forcing secondary CPUs in to sleep
      mode with them not coming back if they didn't have their own local
      timers. Given that we use clockevents broadcasting by default, the CPU
      managing the clockevents can't have IRQs disabled before entering its
      sleep state.
      
      This unfortunately leaves us with the age-old need_resched() race in
      between local_irq_enable() and cpu_sleep(), but at present this is
      unavoidable. After some more experimentation it may be possible to layer
      on SR.BL bit manipulation over top of this scheme to inhibit the race
      condition, but given the current potential for missing wakeups, this is
      left as a future exercise.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      f533c3d3
    • P
      sh: Force boot CPU in to light sleep mode for SH-X3 SMP. · 94eab0bb
      Paul Mundt 提交于
      All of the secondary CPUs are forced in to light sleep mode, but we were
      missing the same initialization for the boot CPU. This resulted in
      inconsistent sleep modes depending on which CPU we were on, confusing the
      idle loop when not polling.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      94eab0bb
  13. 14 10月, 2009 4 次提交