1. 21 9月, 2005 4 次提交
  2. 19 9月, 2005 4 次提交
  3. 18 9月, 2005 1 次提交
  4. 15 9月, 2005 1 次提交
  5. 13 9月, 2005 2 次提交
  6. 12 9月, 2005 1 次提交
    • A
      [PATCH] ppc64: Add definitions for new PTRACE calls · a94d3085
      Anton Blanchard 提交于
      - Add PTRACE_GET_DEBUGREG/PTRACE_SET_DEBUGREG. The definition is
        as follows:
      
      /*
       * Get or set a debug register. The first 16 are DABR registers and the
       * second 16 are IABR registers.
       */
      #define PTRACE_GET_DEBUGREG    25
      #define PTRACE_SET_DEBUGREG    26
      
        DABR == data breakpoint and IABR = instruction breakpoint in IBM
        speak. We could split out the IABR into 2 more ptrace calls but I
        figured there was no need and 16 DABR registers should be more
        than enough (POWER4/POWER5 have one).
      
      - Add 2 new SIGTRAP si_codes: TRAP_HWBKPT and TRAP_BRANCH. I couldnt
        find any standards on either of these so I copied what ia64 is
        doing. Again this might be better placed in
        include/asm-generic/siginfo.h
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a94d3085
  7. 11 9月, 2005 4 次提交
    • J
      [WATCHDOG] mv64x60_wdt.patch · 3be10211
      James Chapman 提交于
      Add mv64x60 (Marvell Discovery) watchdog support.
      Signed-off-by: NJames Chapman <jchapman@katalix.com>
      Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
      3be10211
    • P
      [PATCH] ppc32: support hotplug cpu on powermacs · 31139971
      Paul Mackerras 提交于
      This allows cpus to be off-lined on 32-bit SMP powermacs.  When a cpu
      is off-lined, it is put into sleep mode with interrupts disabled.  It
      can be on-lined again by asserting its soft-reset pin, which is
      connected to a GPIO pin.
      
      With this I can off-line the second cpu in my dual G4 powermac, which
      means that I can then suspend the machine (the suspend/resume code
      refuses to suspend if more than one cpu is online, and making it cope
      with multiple cpus is surprisingly messy).
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      31139971
    • P
      [PATCH] ppc32: Kill init on unhandled synchronous signals · bb0bb3b6
      Paul Mackerras 提交于
      This is a patch that I have had in my tree for ages.  If init causes
      an exception that raises a signal, such as a SIGSEGV, SIGILL or
      SIGFPE, and it hasn't registered a handler for it, we don't deliver
      the signal, since init doesn't get any signals that it doesn't have a
      handler for.  But that means that we just return to userland and
      generate the same exception again immediately.  With this patch we
      print a message and kill init in this situation.
      
      This is very useful when you have a bug in the kernel that means that
      init doesn't get as far as executing its first instruction. :)
      Without this patch the system hangs when it gets to starting the
      userland init; with it you at least get a message giving you a clue
      about what has gone wrong.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      bb0bb3b6
    • I
      [PATCH] spinlock consolidation · fb1c8f93
      Ingo Molnar 提交于
      This patch (written by me and also containing many suggestions of Arjan van
      de Ven) does a major cleanup of the spinlock code.  It does the following
      things:
      
       - consolidates and enhances the spinlock/rwlock debugging code
      
       - simplifies the asm/spinlock.h files
      
       - encapsulates the raw spinlock type and moves generic spinlock
         features (such as ->break_lock) into the generic code.
      
       - cleans up the spinlock code hierarchy to get rid of the spaghetti.
      
      Most notably there's now only a single variant of the debugging code,
      located in lib/spinlock_debug.c.  (previously we had one SMP debugging
      variant per architecture, plus a separate generic one for UP builds)
      
      Also, i've enhanced the rwlock debugging facility, it will now track
      write-owners.  There is new spinlock-owner/CPU-tracking on SMP builds too.
      All locks have lockup detection now, which will work for both soft and hard
      spin/rwlock lockups.
      
      The arch-level include files now only contain the minimally necessary
      subset of the spinlock code - all the rest that can be generalized now
      lives in the generic headers:
      
       include/asm-i386/spinlock_types.h       |   16
       include/asm-x86_64/spinlock_types.h     |   16
      
      I have also split up the various spinlock variants into separate files,
      making it easier to see which does what. The new layout is:
      
         SMP                         |  UP
         ----------------------------|-----------------------------------
         asm/spinlock_types_smp.h    |  linux/spinlock_types_up.h
         linux/spinlock_types.h      |  linux/spinlock_types.h
         asm/spinlock_smp.h          |  linux/spinlock_up.h
         linux/spinlock_api_smp.h    |  linux/spinlock_api_up.h
         linux/spinlock.h            |  linux/spinlock.h
      
      /*
       * here's the role of the various spinlock/rwlock related include files:
       *
       * on SMP builds:
       *
       *  asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the
       *                        initializers
       *
       *  linux/spinlock_types.h:
       *                        defines the generic type and initializers
       *
       *  asm/spinlock.h:       contains the __raw_spin_*()/etc. lowlevel
       *                        implementations, mostly inline assembly code
       *
       *   (also included on UP-debug builds:)
       *
       *  linux/spinlock_api_smp.h:
       *                        contains the prototypes for the _spin_*() APIs.
       *
       *  linux/spinlock.h:     builds the final spin_*() APIs.
       *
       * on UP builds:
       *
       *  linux/spinlock_type_up.h:
       *                        contains the generic, simplified UP spinlock type.
       *                        (which is an empty structure on non-debug builds)
       *
       *  linux/spinlock_types.h:
       *                        defines the generic type and initializers
       *
       *  linux/spinlock_up.h:
       *                        contains the __raw_spin_*()/etc. version of UP
       *                        builds. (which are NOPs on non-debug, non-preempt
       *                        builds)
       *
       *   (included on UP-non-debug builds:)
       *
       *  linux/spinlock_api_up.h:
       *                        builds the _spin_*() APIs.
       *
       *  linux/spinlock.h:     builds the final spin_*() APIs.
       */
      
      All SMP and UP architectures are converted by this patch.
      
      arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via
      crosscompilers.  m32r, mips, sh, sparc, have not been tested yet, but should
      be mostly fine.
      
      From: Grant Grundler <grundler@parisc-linux.org>
      
        Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU).
        Builds 32-bit SMP kernel (not booted or tested).  I did not try to build
        non-SMP kernels.  That should be trivial to fix up later if necessary.
      
        I converted bit ops atomic_hash lock to raw_spinlock_t.  Doing so avoids
        some ugly nesting of linux/*.h and asm/*.h files.  Those particular locks
        are well tested and contained entirely inside arch specific code.  I do NOT
        expect any new issues to arise with them.
      
       If someone does ever need to use debug/metrics with them, then they will
        need to unravel this hairball between spinlocks, atomic ops, and bit ops
        that exist only because parisc has exactly one atomic instruction: LDCW
        (load and clear word).
      
      From: "Luck, Tony" <tony.luck@intel.com>
      
         ia64 fix
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NArjan van de Ven <arjanv@infradead.org>
      Signed-off-by: NGrant Grundler <grundler@parisc-linux.org>
      Cc: Matthew Wilcox <willy@debian.org>
      Signed-off-by: NHirokazu Takata <takata@linux-m32r.org>
      Signed-off-by: NMikael Pettersson <mikpe@csd.uu.se>
      Signed-off-by: NBenoit Boissinot <benoit.boissinot@ens-lyon.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      fb1c8f93
  8. 10 9月, 2005 2 次提交
  9. 09 9月, 2005 2 次提交
    • J
      [PATCH] powerpc: Merge a few more include files · dd56fdf2
      jdl@freescale.com 提交于
      Merge a few asm-ppc and asm-ppc64 header files.
      Note: the merge of setup.h intentionally does not carry
      forward the m68k cruft.  That means this patch continues
      to break the already broken amiga on the ppc32.
      Signed-off-by: NJon Loeliger <jdl@freescale.com>
      Signed-off-by: NKumar Gala <kumar.gala@freescale.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      dd56fdf2
    • D
      [PATCH] Make sparc64 use setup-res.c · 085ae41f
      David S. Miller 提交于
      There were three changes necessary in order to allow
      sparc64 to use setup-res.c:
      
      1) Sparc64 roots the PCI I/O and MEM address space using
         parent resources contained in the PCI controller structure.
         I'm actually surprised no other platforms do this, especially
         ones like Alpha and PPC{,64}.  These resources get linked into the
         iomem/ioport tree when PCI controllers are probed.
      
         So the hierarchy looks like this:
      
         iomem --|
      	   PCI controller 1 MEM space --|
      				        device 1
      					device 2
      					etc.
      	   PCI controller 2 MEM space --|
      				        ...
         ioport --|
                  PCI controller 1 IO space --|
      					...
                  PCI controller 2 IO space --|
      					...
      
         You get the idea.  The drivers/pci/setup-res.c code allocates
         using plain iomem_space and ioport_space as the root, so that
         wouldn't work with the above setup.
      
         So I added a pcibios_select_root() that is used to handle this.
         It uses the PCI controller struct's io_space and mem_space on
         sparc64, and io{port,mem}_resource on every other platform to
         keep current behavior.
      
      2) quirk_io_region() is buggy.  It takes in raw BUS view addresses
         and tries to use them as a PCI resource.
      
         pci_claim_resource() expects the resource to be fully formed when
         it gets called.  The sparc64 implementation would do the translation
         but that's absolutely wrong, because if the same resource gets
         released then re-claimed we'll adjust things twice.
      
         So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource()
         conversion before passing it on to pci_claim_resource().
      
      3) I was mistakedly __init'ing the function methods the PCI controller
         drivers provide on sparc64 to implement some parts of these
         routines.  This was, of course, easy to fix.
      
      So we end up with the following, and that nasty SPARC64 makefile
      ifdef in drivers/pci/Makefile is finally zapped.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      085ae41f
  10. 08 9月, 2005 12 次提交
  11. 06 9月, 2005 3 次提交
  12. 05 9月, 2005 4 次提交