1. 19 9月, 2012 2 次提交
    • D
      ARM: virt: allow the kernel to be entered in HYP mode · 80c59daf
      Dave Martin 提交于
      This patch does two things:
      
        * Ensure that asynchronous aborts are masked at kernel entry.
          The bootloader should be masking these anyway, but this reduces
          the damage window just in case it doesn't.
      
        * Enter svc mode via exception return to ensure that CPU state is
          properly serialised.  This does not matter when switching from
          an ordinary privileged mode ("PL1" modes in ARMv7-AR rev C
          parlance), but it potentially does matter when switching from a
          another privileged mode such as hyp mode.
      
      This should allow the kernel to boot safely either from svc mode or
      hyp mode, even if no support for use of the ARM Virtualization
      Extensions is built into the kernel.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      80c59daf
    • M
      ARM: opcodes: add __ERET/__MSR_ELR_HYP instruction encoding · b9a348cb
      Marc Zyngier 提交于
      Enabling boot from HYP mode requires the use of some more
      virt-specific instructions ("eret" and "msr elr_hyp, reg").
      
      Add the necessary encoding to asm/opcode-virt.h.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      b9a348cb
  2. 16 9月, 2012 4 次提交
    • D
      ARM: 7511/1: opcodes: Opcode definitions for the Virtualization Extensions · 508514ed
      Dave Martin 提交于
      For now, this patch just adds a definition for the HVC instruction.
      More can be added here later, as needed.
      
      Now that we have a real example of how to use the opcode injection
      macros properly, this patch also adds a cross-reference from the
      explanation in opcodes.h (since without an example, figuring out
      how to use the macros is not that easy).
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      508514ed
    • D
      ARM: 7510/1: opcodes: Add helpers for emitting custom opcodes · a61a41a0
      Dave Martin 提交于
      This patch adds some __inst_() macros for injecting custom opcodes
      in assembler (both inline and in .S files).  They should make it
      easier and cleaner to get things right in little-/big-
      endian/ARM/Thumb-2 kernels without a lot of #ifdefs.
      
      This pure-preprocessor approach is preferred over the alternative
      method of wedging extra assembler directives into the assembler
      input using top-level asm() blocks, since there is no way to
      guarantee that the compiler won't reorder those with respect to
      each other or with respect to non-toplevel asm() blocks, unless
      -fno-toplevel-reorder is passed (which is in itself somewhat
      undesirable because it defeats some potential optimisations).
      
      Currently <asm/unified.h> _does_ silently rely on the compiler not
      reordering at the top level, but it seems better to avoid adding
      extra code which depends on this if the same result can be achieved
      in another way.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a61a41a0
    • D
      ARM: 7509/1: opcodes: Make opcode byteswapping macros assembly-compatible · 0ce3de23
      Dave Martin 提交于
      Most of the existing macros don't work with assembler, due to the
      use of type casts and C functions from <linux/swab.h>.
      
      This patch abstracts out those operations and provides simple
      explicit versions for use in assembly code.
      
      __opcode_is_thumb32() and __opcode_is_thumb16() are also converted
      to do bitmask-based testing to avoid confusion if these are used in
      assembly code (the assembler typically treats all arithmetic values
      as signed).
      
      These changes avoid the need for the compiler to pre-evaluate
      constant expressions used to generate opcodes.  By ensuring that
      the forms of these expressions can be evaluated directly by the
      assembler, we can just stringify the expressions directly into the
      asm during the preprocessing pass.  The alternative approach
      (passing the evaluated expression via an inline asm "i" constraint)
      gets painful because the contents of the asm and the constraints
      must be kept in sync.  This makes the resulting macros awkward to
      use.
      
      Retaining the C forms of the macros allows more efficient code to
      be generated when opcodes are generated programmatically at run-
      time, but there is no way to embed run-time-generated opcodes in
      asm() blocks.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      0ce3de23
    • D
      ARM: 7508/1: opcodes: Don't define the thumb32 byteswapping macros for BE32 · 57b9da32
      Dave Martin 提交于
      The existing __mem_to_opcode_thumb32() is incorrect for BE32
      platforms.  However, these don't support Thumb-2 kernels, so this
      option is not so relevant for those platforms anyway.
      
      This operation is complicated by the lack of unaligned memory
      access support prior to ARMv6.
      
      Rather than provide a "working" macro which will probably won't get
      used (or worse, will get misused), this patch removes the macro for
      BE32 kernels.  People manipulating Thumb opcodes prior to ARMv6
      should almost certainly be splitting these operations into
      halfwords anyway, using __opcode_thumb32_{first,second,compose}()
      and the 16-bit opcode transformations.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      57b9da32
  3. 05 9月, 2012 1 次提交
  4. 03 9月, 2012 1 次提交
  5. 31 8月, 2012 3 次提交
  6. 30 8月, 2012 1 次提交
  7. 29 8月, 2012 8 次提交
  8. 25 8月, 2012 2 次提交
  9. 23 8月, 2012 12 次提交
    • A
      ARM: ux500: don't select LEDS_GPIO for snowball · db43b184
      Arnd Bergmann 提交于
      Using 'select' in Kconfig is hard, a platform cannot just
      enable a driver without also making sure that its subsystem
      is there. Also, there is no actual code dependency between
      the platform and the gpio leds driver.
      
      Without this patch, building without LEDS_CLASS esults in:
      
      drivers/built-in.o: In function `create_gpio_led.part.2':
      governor_userspace.c:(.devinit.text+0x5a58): undefined reference to `led_classdev_register'
      drivers/built-in.o: In function `gpio_led_remove':
      governor_userspace.c:(.devexit.text+0x6b8): undefined reference to `led_classdev_unregister'
      
      This reverts 8733f53c "ARM: ux500: Kconfig: Compile in leds-gpio
      support for Snowball" that introduced the regression and did not
      provide a helpful explanation.
      
      In order to leave the GPIO LED code still present in normal
      builds, this also enables the symbol in u8500_defconfig, in addition
      to the other LED drivers that are already selected there.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: Lee Jones <lee.jones@linaro.org>
      db43b184
    • A
      ARM: imx: build i.MX6 functions only when needed · 1fc593fe
      Arnd Bergmann 提交于
      The head-v7.S contains a call to the generic cpu_suspend function,
      which is only available when selected by the i.MX6 code. As
      pointed out by Shawn Guo, i.MX5 does not actually use any
      functions defined in head-v7.S. It is also needed only for
      the i.MX6 power management code and for the SMP code, so
      we can restrict building this file to situations in which
      at least one of those two is present.
      
      Finally, other platforms with a similar file call it headsmp.S,
      so we can rename it to the same for consistency.
      
      Without this patch, building imx5 standalone results in:
      
      arch/arm/mach-imx/built-in.o: In function `v7_cpu_resume':
      arch/arm/mach-imx/head-v7.S:104: undefined reference to `cpu_resume'
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NShawn Guo <shawn.guo@linaro.org>
      Cc: Eric Miao <eric.miao@linaro.org>
      Cc: stable@vger.kernel.org
      1fc593fe
    • A
      ARM: imx: select CPU_FREQ_TABLE when needed · f637c4c9
      Arnd Bergmann 提交于
      The i.MX cpufreq implementation uses the CPU_FREQ_TABLE helpers,
      so it needs to select that code to be built. This problem has
      apparently existed since the i.MX cpufreq code was first merged
      in v2.6.37.
      
      Building IMX without CPU_FREQ_TABLE results in:
      
      arch/arm/plat-mxc/built-in.o: In function `mxc_cpufreq_exit':
      arch/arm/plat-mxc/cpufreq.c:173: undefined reference to `cpufreq_frequency_table_put_attr'
      arch/arm/plat-mxc/built-in.o: In function `mxc_set_target':
      arch/arm/plat-mxc/cpufreq.c:84: undefined reference to `cpufreq_frequency_table_target'
      arch/arm/plat-mxc/built-in.o: In function `mxc_verify_speed':
      arch/arm/plat-mxc/cpufreq.c:65: undefined reference to `cpufreq_frequency_table_verify'
      arch/arm/plat-mxc/built-in.o: In function `mxc_cpufreq_init':
      arch/arm/plat-mxc/cpufreq.c:154: undefined reference to `cpufreq_frequency_table_cpuinfo'
      arch/arm/plat-mxc/cpufreq.c:162: undefined reference to `cpufreq_frequency_table_get_attr'
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NShawn Guo <shawn.guo@linaro.org>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Yong Shen <yong.shen@linaro.org>
      Cc: stable@vger.kernel.org
      f637c4c9
    • A
      ARM: imx: fix ksz9021rn_phy_fixup · 9f9ba0fd
      Arnd Bergmann 提交于
      The ksz9021rn_phy_fixup and mx6q_sabrelite functions try to
      set up an ethernet phy if they can. They do check whether
      phylib is enabled, but unfortunately the functions can only
      be called from platform code if phylib is builtin, not
      if it is a module
      
      Without this patch, building with a modular phylib results in:
      
      arch/arm/mach-imx/mach-imx6q.c: In function 'imx6q_sabrelite_init':
      arch/arm/mach-imx/mach-imx6q.c:120:5: error: 'ksz9021rn_phy_fixup' undeclared (first use in this function)
      arch/arm/mach-imx/mach-imx6q.c:120:5: note: each undeclared identifier is reported only once for each function it appears in
      
      The bug was originally reported by Artem Bityutskiy but only
      partially fixed in ef441806 "ARM: imx6q: register phy fixup only when
      CONFIG_PHYLIB is enabled".
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NShawn Guo <shawn.guo@linaro.org>
      Cc: Artem Bityutskiy <dedekind1@gmail.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      9f9ba0fd
    • A
      ARM: imx: build pm-imx5 code only when PM is enabled · a28eecef
      Arnd Bergmann 提交于
      This moves the imx5 pm code out of the list of unconditionally
      compiled files for imx5, mirroring what we already do for imx6
      and how it was done before the code was move from mach-mx5 to
      mach-imx in v3.3.
      
      Without this patch, building with CONFIG_PM disabled results in:
      
      arch/arm/mach-imx/pm-imx5.c:202:116: error: redefinition of 'imx51_pm_init'
      arch/arm/mach-imx/include/mach-imx/common.h:154:91: note: previous definition of 'imx51_pm_init' was here
      arch/arm/mach-imx/pm-imx5.c:209:116: error: redefinition of 'imx53_pm_init'
      arch/arm/mach-imx/include/mach-imx/common.h:155:91: note: previous definition of 'imx53_pm_init' was here
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NShawn Guo <shawn.guo@linaro.org>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: stable@vger.kernel.org
      a28eecef
    • A
      ARM: omap: allow building omap44xx without SMP · c7a9b09b
      Arnd Bergmann 提交于
      The new omap4 cpuidle implementation currently requires
      ARCH_NEEDS_CPU_IDLE_COUPLED, which only works on SMP.
      
      This patch makes it possible to build a non-SMP kernel
      for that platform. This is not normally desired for
      end-users but can be useful for testing.
      
      Without this patch, building rand-0y2jSKT results in:
      
      drivers/cpuidle/coupled.c: In function 'cpuidle_coupled_poke':
      drivers/cpuidle/coupled.c:317:3: error: implicit declaration of function '__smp_call_function_single' [-Werror=implicit-function-declaration]
      
      It's not clear if this patch is the best solution for
      the problem at hand. I have made sure that we can now
      build the kernel in all configurations, but that does
      not mean it will actually work on an OMAP44xx.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      c7a9b09b
    • S
      ARM: dts: imx51-babbage: fix esdhc cd/wp properties · a46d2619
      Shawn Guo 提交于
      The binding doc and dts use properties "fsl,{cd,wp}-internal" while
      esdhc driver uses "fsl,{cd,wp}-controller".  Fix binding doc and dts
      to get them match driver code.
      Reported-by: NChris Ball <cjb@laptop.org>
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      Cc: <stable@vger.kernel.org>
      Acked-by: NChris Ball <cjb@laptop.org>
      a46d2619
    • S
      ARM: imx6: spin the cpu until hardware takes it down · c944b0b9
      Shawn Guo 提交于
      Though commit 602bf409 (ARM: imx6: exit coherency when shutting down
      a cpu) improves the stability of imx6q cpu hotplug a lot, there are
      still hangs seen with a more stressful hotplug testing.
      
      It's expected that once imx_enable_cpu(cpu, false) is called, the cpu
      will be taken down by hardware immediately, and the code after that
      will not get any chance to execute.  However, this is not always the
      case from the testing.  The cpu could possibly be alive for a few
      cycles before hardware actually takes it down.  So rather than letting
      cpu execute some code that could cause a hang in these cycles, let's
      make the cpu spin there and wait for hardware to take it down.
      
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      c944b0b9
    • B
      ARM: at91/dts: remove partial parameter in at91sam9g25ek.dts · 9e0255dd
      Bo Shen 提交于
      Remove the malformed "mem=" bootargs parameter in at91sam9g25ek.dts
      Signed-off-by: NBo Shen <voice.shen@atmel.com>
      Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
      9e0255dd
    • N
      ARM: at91/clock: fix PLLA overclock warning · 2ed1f589
      Nicolas Ferre 提交于
      Fix PLLA overclock warning in relation with datasheet numbers.
      Add new > 240 MHz and > 210 MHz SoC categories.
      Reported-by: NJiri Prchal <jiri.prchal@aksignal.cz>
      Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
      2ed1f589
    • L
      ARM: at91: fix rtc-at91sam9 irq issue due to sparse irq support · e402af6c
      Ludovic Desroches 提交于
      AT91_ID_SYS as virq is incorrect because of spare irq support which
      introduces NR_IRQS_LEGACY offset. It modifies rtc-at91sam9 driver in
      order to get irq from resources.
      Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
      Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
      e402af6c
    • L
      ARM: at91: fix system timer irq issue due to sparse irq support · 85ebea12
      Ludovic Desroches 提交于
      AT91_ID_SYS as virq is incorrect because of spare irq support which
      introduces NR_IRQS_LEGACY offset.
      Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
      Tested-by: NJoachim Eastwood <joachim.eastwood@jotron.com>
      Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
      85ebea12
  10. 22 8月, 2012 1 次提交
  11. 17 8月, 2012 3 次提交
  12. 15 8月, 2012 2 次提交