1. 13 1月, 2010 2 次提交
    • M
      sh: Don't perform an icbi on a P2 address · 6430a598
      Matt Fleming 提交于
      The legacy P2 area may not always be mapped (for example when using
      PMB). So perform an icbi on an address that we know will always be
      mapped.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      6430a598
    • P
      sh: Move over to dynamically allocated FPU context. · 0ea820cf
      Paul Mundt 提交于
      This follows the x86 xstate changes and implements a task_xstate slab
      cache that is dynamically sized to match one of hard FP/soft FP/FPU-less.
      
      This also tidies up and consolidates some of the SH-2A/SH-4 FPU
      fragmentation. Now fpu state restorers are commonly defined, with the
      init_fpu()/fpu_init() mess reworked to follow the x86 convention.
      The fpu_init() register initialization has been replaced by xstate setup
      followed by writing out to hardware via the standard restore path.
      
      As init_fpu() now performs a slab allocation a secondary lighterweight
      restorer is also introduced for the context switch.
      
      In the future the DSP state will be rolled in here, too.
      
      More work remains for math emulation and the SH-5 FPU, which presently
      uses its own special (UP-only) interfaces.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      0ea820cf
  2. 12 1月, 2010 7 次提交
  3. 08 1月, 2010 1 次提交
    • P
      sh: consolidate atomic_cmpxchg()/atomic_add_unless() definitions. · 8c0b8139
      Paul Mundt 提交于
      The LL/SC and IRQ versions were using generic stubs while the GRB version
      was just reimplementing what it already had for the standard cmpxchg()
      code. As we have optimized cmpxchg() implementations that are decoupled
      from the atomic code, simply falling back on the generic wrapper does the
      right thing. With this in place the GRB case is unaffected while the
      LL/SC case gets to use its optimized cmpxchg().
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      8c0b8139
  4. 05 1月, 2010 4 次提交
    • P
      sh: Reclaim TIF_DEBUG. · 9fae4fb3
      Paul Mundt 提交于
      This was used by the old hw-breakpoints API, but now there is nothing
      is using it anymore, so just kill it off.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      9fae4fb3
    • P
      sh: Kill off dead UBC headers. · 7025bec9
      Paul Mundt 提交于
      Nothing is using these now, so kill them all off.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      7025bec9
    • P
      sh: Abstracted SH-4A UBC support on hw-breakpoint core. · 4352fc1b
      Paul Mundt 提交于
      This is the next big chunk of hw_breakpoint support. This decouples
      the SH-4A support from the core and moves it out in to its own stub,
      following many of the conventions established with the perf events
      layering.
      
      In addition to extending SH-4A support to encapsulate the remainder
      of the UBC channels, clock framework support for handling the UBC
      interface clock is added as well, allowing for dynamic clock gating.
      
      This also fixes up a regression introduced by the SIGTRAP handling that
      broke the ksym_tracer, to the extent that the current support works well
      with all of the ksym_tracer/ptrace/kgdb. The kprobes singlestep code will
      follow in turn.
      
      With this in place, the remaining UBC variants (SH-2A and SH-4) can now
      be trivially plugged in.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      4352fc1b
    • P
      sh: Drop down to a single quicklist. · 0176bd3d
      Paul Mundt 提交于
      We previously had 2 quicklists, one for the PGD case and one for PTEs.
      Now that the PGD/PMD cases are handled through slab caches due to the
      multi-level configurability, only the PTE quicklist remains. As such,
      reduce NR_QUICK to its appropriate size and bump down the PTE quicklist
      index.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      0176bd3d
  5. 02 1月, 2010 2 次提交
    • M
      sh: Move page table allocation out of line · 2a5eacca
      Matt Fleming 提交于
      We also switched away from quicklists and instead moved to slab
      caches. After benchmarking both implementations the difference is
      negligible. The slab caches suit us better though because the size of a
      pgd table is just 4 entries when we're using a 3-level page table layout
      and quicklists always deal with pages.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      2a5eacca
    • M
      sh: Correct the PTRS_PER_PMD and PMD_SHIFT values · 3f5ab768
      Matt Fleming 提交于
      The previous expressions were wrong which made free_pmd_range() explode
      when using anything other than 4KB pages (which is why 8KB and 64KB
      pages were disabled with the 3-level page table layout).
      
      The problem was that pmd_offset() was returning an index of non-zero
      when it should have been returning 0. This non-zero offset was used to
      calculate the address of the pmd table to free in free_pmd_range(),
      which ended up trying to free an object that was not aligned on a page
      boundary.
      
      Now 3-level page tables should work with 4KB, 8KB and 64KB pages.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      3f5ab768
  6. 31 12月, 2009 1 次提交
  7. 29 12月, 2009 1 次提交
    • P
      sh: Only provide a PCLK definition for legacy CPG CPUs. · 8152a74b
      Paul Mundt 提交于
      As CPUs are migrated over to more fully-featured clock frameworks of
      their own and off of the legacy CPG code, they no longer have any real
      need for defining the PCLK value. The PCLK define in itself is already
      fairly misleading, as many boards get their input clocks from different
      sources, making this value fairly arbitrary anyways.
      
      Outside of the legacy CPG clock framework, the only place where this
      value is used is for deriving CLOCK_TICK_RATE, which we set back to the
      legacy PIT value that it was before the PCLK definitions were added in
      the first place.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      8152a74b
  8. 28 12月, 2009 1 次提交
  9. 17 12月, 2009 4 次提交
  10. 16 12月, 2009 1 次提交
  11. 15 12月, 2009 5 次提交
  12. 14 12月, 2009 3 次提交
  13. 12 12月, 2009 2 次提交
  14. 11 12月, 2009 1 次提交
  15. 09 12月, 2009 1 次提交
    • M
      sh: LCDC start_transfer() for the KFR2R09 board · 657bf0bd
      Magnus Damm 提交于
      This patch adds a ->start_transfer() callback to the
      KFR2R09 lcd handling code. The callback is used to
      notify the lcd controller that a new frame of data
      is about to be transferred. The callback is only used
      in combination with deferred io, but the code has
      been tested both with and without deferred io enabled.
      
      Without this patch the display data on the KFR2R09
      lcd panel becomes corrupted over time.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      657bf0bd
  16. 08 12月, 2009 1 次提交
    • P
      sh: hw-breakpoints: Add preliminary support for SH-4A UBC. · 09a07294
      Paul Mundt 提交于
      This adds preliminary support for the SH-4A UBC to the hw-breakpoints API.
      Presently only a single channel is implemented, and the ptrace interface
      still needs to be converted. This is the first step to cleaning up the
      long-standing UBC mess, making the UBC more generally accessible, and
      finally making it SMP safe.
      
      An additional abstraction will be layered on top of this as with the perf
      events code to permit the various CPU families to wire up support for
      their own specific UBCs, as many variations exist.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      09a07294
  17. 05 12月, 2009 1 次提交
  18. 04 12月, 2009 1 次提交
  19. 30 11月, 2009 1 次提交