- 03 7月, 2009 1 次提交
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由 Matt Reimer 提交于
The DMA flow control in pxamci_setup_data() is backwards; fix it. Signed-off-by: NMatt Reimer <mreimer@sdgsystems.com> Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 14 6月, 2009 1 次提交
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由 Daniel Ribeiro 提交于
Changes pxamci.c to use the regulator subsystem. Uses the regulator case CONFIG_REGULATOR is defined and a matching is regulator is provided, or falls back to pdata->setpower otherwise. A warning is displayed case both a valid regulator and pdata is set, and the regulator is used. Signed-off-by: NDaniel Ribeiro <drwyrm@gmail.com> Acked-by: NEric Miao <eric.miao@marvell.com> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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- 09 3月, 2009 1 次提交
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由 Eric Miao 提交于
1. Driver code where pxa_request_dma() is called will most likely reference DMA registers as well, and it is really unnecessary to include pxa-regs.h just for this. Move the definitions into <mach/dma.h> and make relevant drivers include it instead of <mach/pxa-regs.h>. 2. Introduce DMAC_REGS_VIRT as the virtual address base for these DMA registers. This allows later processors to re-use the same IP while registers may start at different I/O address. Signed-off-by: NEric Miao <eric.miao@marvell.com>
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- 03 2月, 2009 2 次提交
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由 Cliff Brake 提交于
With the PXA270 MMC hardware, there seems to be an issue of data corruption on writes where a 4KB data block is offset by one byte. If we delay enabling the DMA for writes until after the CMD/RESP has finished, the problem seems to be fixed. related to PXA270 Erratum #91 Tested-by: NVernon Sauder <VernonInHand@gmail.com> Signed-off-by: NCliff Brake <cbrake@bec-systems.com> Acked-by: NEric Miao <eric.miao@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Cliff Brake 提交于
Signed-off-by: NCliff Brake <cbrake@bec-systems.com> Acked-by: NEric Miao <eric.miao@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 01 1月, 2009 1 次提交
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由 Vernon Sauder 提交于
dma_unmap_sg should be given the same length as dma_map_sg, not the value returned from dma_map_sg Signed-off-by: NVernon Sauder <vsauder@inhand.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 30 11月, 2008 1 次提交
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由 Russell King 提交于
When ISA_DMA_API is unset, we're not implementing the ISA DMA API, so there's no point in publishing the prototypes via asm/dma.h, nor including the machine dependent parts of that API. This allows us to remove a lot of mach/dma.h files which don't contain any useful code. Unfortunately though, some platforms put their own private non-ISA definitions into mach/dma.h, so we leave these behind and fix the appropriate #include statments. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 11月, 2008 1 次提交
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由 Russell King 提交于
Avoid unnecessarily pollution of the kernel's namespace by avoiding mach/hardware.h. Include this header file where necessary. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 11月, 2008 1 次提交
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由 Russell King 提交于
Where devices only have one consumer, passing a consumer clock ID has no real benefit. Remove it. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 9月, 2008 1 次提交
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由 Eric Miao 提交于
1. add a CPUID table in the comment 2. make cpu_is_pxa25x() true for PXA210/250/255/26x 3. PXA210 is treated as PXA25x, all related code modified to reflect this Signed-off-by: NEric Miao <eric.miao@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 8月, 2008 1 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 7月, 2008 1 次提交
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由 Karl Beldan 提交于
Signed-off-by: NKarl Beldan <karl.beldan@gmail.com> Acked-by: NEric Miao <eric.miao@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 15 7月, 2008 1 次提交
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由 Anton Vorontsov 提交于
Now get_ro() callback must return 0/1 values for its logical states, and negative errno values in case of error. If particular host instance doesn't support RO/WP switch, it should return -ENOSYS. This patch changes some hosts in two ways: 1. Now functions should be smart to not return negative values in "RO asserted" case (particularly gpio_ calls could return negative values for the outermost GPIOs). Also, board code usually passes get_ro() callbacks that directly return gpioreg & bit result, so at91_mci, imxmmc, pxamci and mmc_spi's get_ro() handlers need take special care when returning platform's values to the mmc core. 2. In case of host instance didn't implement get_ro() callback, it should really return -ENOSYS and let the mmc core decide what to do about it (mmc core thinks the same way as the hosts, so it isn't functional change). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 07 7月, 2008 1 次提交
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由 Philipp Zabel 提交于
The pxa27x DMA controller defaults to 64-bit alignment. This caused the SCR reads to fail (and, depending on card type, error out) when card->raw_scr was not aligned on a 8-byte boundary. For performance reasons all scatter-gather addresses passed to pxamci_request should be aligned on 8-byte boundaries, but if this can't be guaranteed, byte aligned DMA transfers in the have to be enabled in the controller to get correct behaviour. Signed-off-by: NPhilipp Zabel <philipp.zabel@gmail.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 16 4月, 2008 1 次提交
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由 Kay Sievers 提交于
Since 43cc71ee, the platform modalias is prefixed with "platform:". Add MODULE_ALIAS() to the hotpluggable MMC host platform drivers, to re-enable auto loading. Also, add missing owner declarations in driver init. [dbrownell@users.sourceforge.net: registration fixes] Signed-off-by: NKay Sievers <kay.sievers@vrfy.org> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Acked-by: NPierre Ossman <drzeus@drzeus.cx> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 26 1月, 2008 2 次提交
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由 Bridge Wu 提交于
This patch is to move pxamci DMA specific code to corresponding platform layer because using DRCMRRXMMC/DRCMRTXMMC in pxamci.c makes the driver code dedicated to platform which is not extensible. It is applicable to all pxa platforms. Signed-off-by: NBridge Wu <bridge.wu@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Bridge Wu 提交于
pxa3[0|1]0 mmc controller can support 26MHz clock mode, they support SD spec 1.1 and MMC spec 4.0 which specify high speed mode. So host caps will include MMC_CAP_MMC_HIGHSPEED and MMC_CAP_SD_HIGHSPEED for pxa3[0|1]0. This patch is to add 26MHz support for them. pxa host clock will be set to 26MHz mode when the card supported max clock rate is higher than or equal to 26MHz. Signed-off-by: NBridge Wu <bridge.wu@marvell.com> Acked-by: NPierre Ossman <drzeus@drzeus.cx> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 31 10月, 2007 1 次提交
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由 Russell King 提交于
Fix: WARNING: at arch/arm/mach-pxa/clock.c:69 clk_disable() [<c002d7c8>] (dump_stack+0x0/0x14) from [<c00334f4>] (clk_disable+0x34/0xa0) [<c00334c0>] (clk_disable+0x0/0xa0) from [<c028a43c>] (pxamci_set_ios+0x74/0xf0) [<c028a3c8>] (pxamci_set_ios+0x0/0xf0) from [<c0281548>] (mmc_power_off+0x90/0x9c) [<c02814b8>] (mmc_power_off+0x0/0x9c) from [<c0281a30>] (mmc_start_host+0x18/0x28) [<c0281a18>] (mmc_start_host+0x0/0x28) from [<c02825a0>] (mmc_add_host+0xe8/0x104) [<c02824b8>] (mmc_add_host+0x0/0x104) from [<c028a7d0>] (pxamci_probe+0x24c/0x2f4) [<c028a584>] (pxamci_probe+0x0/0x2f4) from [<c01e5948>] (platform_drv_probe+0x20/0x24) ... Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 10月, 2007 1 次提交
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由 Jens Axboe 提交于
Do a full scan of the directory to try and be a bit more proactive, instead of waiting for things to break. Signed-off-by: NJens Axboe <jens.axboe@oracle.com>
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- 13 10月, 2007 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 11 10月, 2007 1 次提交
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由 Nicolas Pitre 提交于
The PXA has two transmit FIFOes, each32 byte deep. when one FIFO is full and the other one has been transmitted, they are automatically swapped and DMA is triggered for another 32 byte burst. However, when there is less than 32 bytes left to send, the FIFO swap has to be done manually. This is required for some SDIO transfers which are not required to be multiples of 32 bytes. A DMA completion interrupt is set for each descriptor which length isn't a multiple of 32 in order to force the FIFO swap. While at it, the DMA interrupt handler has been made a bit more resilient against errors. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 26 9月, 2007 4 次提交
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由 Bridge Wu 提交于
Again, only available from PXA27x. Signed-off-by: NBridge Wu <mingqiao.wu@gmail.com> Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Bridge Wu 提交于
From PXA27x, it is possible to do 4-bit data transfers. Signed-off-by: NBridge Wu <mingqiao.wu@gmail.com> Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Nicolas Pitre 提交于
From PXA27x, it is possible to do 2048-byte block transfers. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Bridge Wu 提交于
Pending interrupts should be determined from both I_REG and I_MASK registers. Signed-off-by: NBridge Wu <mingqiao.wu@gmail.com> Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 23 9月, 2007 1 次提交
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由 Pierre Ossman 提交于
Convert the MMC layer to use standard error codes and not its own, incompatible values. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 26 7月, 2007 1 次提交
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由 Pierre Ossman 提交于
Make sure all headers in the files reflect their true position in the tree. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 15 5月, 2007 1 次提交
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由 Nicolas Pitre 提交于
... and make it depend on the response flag instead of the command type. Signed-off-by: NNicolas Pitre <npitre@mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 01 5月, 2007 2 次提交
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由 Pierre Ossman 提交于
Clean up the drivers/mmc directory by moving card and host drivers into subdirectories. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Pierre Ossman 提交于
All host drivers were #include:ing mmc/protocol.h just to get access to the OCR bit defines. Move these to host.h instead. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 22 4月, 2007 1 次提交
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由 Eric Miao 提交于
This patch removes the unnecessary bit number from CKENnn_XXXX definitions for PXA, so that CKEN0_PWM0 --> CKEN_PWM0 CKEN1_PWM1 --> CKEN_PWM1 ... CKEN24_CAMERA --> CKEN_CAMERA The reasons for the change of these defitions are: 1. they do not scale - they are currently valid for pxa2xx, but definitely not valid for pxa3xx, e.g., pxa3xx has bit 3 for camera instead of bit 24 2. they are unnecessary - the peripheral name within the definition has already announced its usage, we don't need those bit numbers to know which peripheral we are going to enable/disable clock for 3. they are inconvenient - think about this: a driver programmer for pxa has to remember which bit in the CKEN register to turn on/off Another change in the patch is to make the definitions equal to its clock bit index, so that #define CKEN_CAMERA (24) instead of #define CKEN_CAMERA (1 << 24) this change, however, will add a run-time bit shift operation in pxa_set_cken(), but the benefit of this change is that it scales when bit index exceeds 32, e.g., pxa3xx has two registers CKENA and CKENB, totally 64 bit for this, suppose CAMERA clock enabling bit is CKENB:10, one can simply define CKEN_CAMERA to be (32 + 10) and so that pxa_set_cken() need minimum change to adapt to that. Signed-off-by: Neric miao <eric.y.miao@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 2月, 2007 2 次提交
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由 Pierre Ossman 提交于
Many controllers have an upper limit on the number of blocks that can be transferred in one request. Allow the host drivers to specify this and make sure we avoid hitting this limit. Also change the max_sectors field to avoid confusion. This makes it map less directly to the block layer limits, but as they didn't apply directly on MMC cards anyway, this isn't a great loss. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Pierre Ossman 提交于
Most controllers have an upper limit on the block size. Allow the host drivers to specify this and make sure we avoid hitting this limit. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 15 1月, 2007 1 次提交
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由 Philip Langdale 提交于
During development of SDHC support, it was discovered that the definition for R6 was incorrect. This patch fixes that and patches the drivers that do switch on the response type. Signed-off-by: NPhilip Langdale <philipl@overt.org> Cc: Alex Dubov <oakad@yahoo.com> Cc: Pavel Pisa <ppisa@pikron.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 05 12月, 2006 1 次提交
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由 Sascha Hauer 提交于
since commit fcaf71fd struct mmc_host does not have a dev field. Retrieve the device with mmc_dev() instead. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 02 12月, 2006 1 次提交
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由 David Brownell 提交于
Now that mmc_host_ops can be constified, update the various drivers to constify those method tables and shrink the writable data segment. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 05 10月, 2006 1 次提交
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由 David Howells 提交于
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead of passing regs around manually through all ~1800 interrupt handlers in the Linux kernel. The regs pointer is used in few places, but it potentially costs both stack space and code to pass it around. On the FRV arch, removing the regs parameter from all the genirq function results in a 20% speed up of the IRQ exit path (ie: from leaving timer_interrupt() to leaving do_IRQ()). Where appropriate, an arch may override the generic storage facility and do something different with the variable. On FRV, for instance, the address is maintained in GR28 at all times inside the kernel as part of general exception handling. Having looked over the code, it appears that the parameter may be handed down through up to twenty or so layers of functions. Consider a USB character device attached to a USB hub, attached to a USB controller that posts its interrupts through a cascaded auxiliary interrupt controller. A character device driver may want to pass regs to the sysrq handler through the input layer which adds another few layers of parameter passing. I've build this code with allyesconfig for x86_64 and i386. I've runtested the main part of the code on FRV and i386, though I can't test most of the drivers. I've also done partial conversion for powerpc and MIPS - these at least compile with minimal configurations. This will affect all archs. Mostly the changes should be relatively easy. Take do_IRQ(), store the regs pointer at the beginning, saving the old one: struct pt_regs *old_regs = set_irq_regs(regs); And put the old one back at the end: set_irq_regs(old_regs); Don't pass regs through to generic_handle_irq() or __do_IRQ(). In timer_interrupt(), this sort of change will be necessary: - update_process_times(user_mode(regs)); - profile_tick(CPU_PROFILING, regs); + update_process_times(user_mode(get_irq_regs())); + profile_tick(CPU_PROFILING); I'd like to move update_process_times()'s use of get_irq_regs() into itself, except that i386, alone of the archs, uses something other than user_mode(). Some notes on the interrupt handling in the drivers: (*) input_dev() is now gone entirely. The regs pointer is no longer stored in the input_dev struct. (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does something different depending on whether it's been supplied with a regs pointer or not. (*) Various IRQ handler function pointers have been moved to type irq_handler_t. Signed-Off-By: NDavid Howells <dhowells@redhat.com> (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
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- 01 7月, 2006 1 次提交
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由 Jörn Engel 提交于
Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 20 5月, 2006 1 次提交
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由 Pavel Pisa 提交于
Patch from Pavel Pisa There has been problems that for some paths that clock are not stopped during new command programming and initiation. Result is issuing of incorrect command to the card. Some other problems are cleaned too. Noisy report of known ERRATUM #4 has been suppressed. Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 5月, 2006 1 次提交
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由 Russell King 提交于
Rather than having every driver duplicate the set_ios debugging, provide a single version in mmc.c which can be expanded as we add additional functionality. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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