1. 17 3月, 2012 1 次提交
  2. 16 3月, 2012 7 次提交
  3. 23 2月, 2012 2 次提交
    • K
      powerpc/mpic: Remove duplicate MPIC_WANTS_RESET flag · e55d7f73
      Kyle Moffett 提交于
      There are two separate flags controlling whether or not the MPIC is
      reset during initialization, which is completely unnecessary, and only
      one of them can be specified in the device tree.
      
      Also, most platforms in-tree right now do actually want to reset the
      MPIC during initialization anyways, which means lots of duplicate code
      passing the MPIC_WANTS_RESET flag.
      
      Fix all of the callers which currently do not pass the MPIC_WANTS_RESET
      flag to pass the MPIC_NO_RESET flag, then remove the MPIC_WANTS_RESET
      flag and make the code reset the MPIC by default.
      Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e55d7f73
    • K
      powerpc/mpic: Remove MPIC_BROKEN_FRR_NIRQS and duplicate irq_count · 5019609f
      Kyle Moffett 提交于
      The mpic->irq_count variable is only used as a software error-checking
      limit to determine whether or not an IRQ number is valid.  In board code
      which does not manually specify an IRQ count to mpic_alloc(), i.e. 0, it
      is automatically detected from the number of ISUs and the ISU size.
      
      In practice, all hardware ends up with irq_count == num_sources, so all
      of the runtime checks on mpic->irq_count should just check the value of
      mpic->num_sources instead.
      
      When platform hardware does not correctly report the number of IRQs,
      which only happens on the MPC85xx/MPC86xx, the MPIC_BROKEN_FRR_NIRQS
      flag is used to override the detected value of num_sources with the
      manual irq_count parameter.  Since there's no need to manually specify
      the number of IRQs except in this case, the extra flag can be eliminated
      and the test changed to "irq_count != 0".
      Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      5019609f
  4. 18 1月, 2012 1 次提交
  5. 05 1月, 2012 2 次提交
    • T
      powerpc: fix compile error with 85xx/p1010rdb.c · ef88e391
      Tony Breeds 提交于
      Current linux-next compiled with mpc85xx_defconfig causes this:
      
      arch/powerpc/platforms/85xx/p1010rdb.c:41:14: error: 'np' undeclared (first use in this function)
      arch/powerpc/platforms/85xx/p1023_rds.c:102:14: error: 'np' undeclared (first use in this function)
      
      Introduced in:
        commit 996983b7
        Author: Kyle Moffett <Kyle.D.Moffett@boeing.com>
        Date:   Fri Dec 2 06:28:02 2011 +0000
        powerpc/mpic: Search for open-pic device-tree node if NULL
      Signed-off-by: NTony Breeds <tony@bakeyournoodle.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      ef88e391
    • M
      powerpc: fix compile error with 85xx/p1023_rds.c · 2c1c7430
      Michael Neuling 提交于
      Current linux-next compiled with mpc85xx_smp_defconfig causes this:
      arch/powerpc/platforms/85xx/p1023_rds.c: In function 'mpc85xx_rds_pic_init':
      arch/powerpc/platforms/85xx/p1023_rds.c:102:14: error: 'np' undeclared (first use in this function)
      arch/powerpc/platforms/85xx/p1023_rds.c:102:14: note: each undeclared identifier is reported only once for each function it appears in
      
      Introduced in:
        commit 996983b7
        Author: Kyle Moffett <Kyle.D.Moffett@boeing.com>
        Date:   Fri Dec 2 06:28:02 2011 +0000
        powerpc/mpic: Search for open-pic device-tree node if NULL
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      2c1c7430
  6. 07 12月, 2011 4 次提交
  7. 25 11月, 2011 1 次提交
  8. 24 11月, 2011 7 次提交
  9. 04 11月, 2011 2 次提交
    • S
      powerpc/p3060qds: Add support for P3060QDS board · 96cc017c
      Shengzhou Liu 提交于
      The P3060QDS is a Freescale reference board that hosts the six-core P3060 SOC.
      The P3060 Processor combines six e500mc Power Architecture processor cores with
      high-performance datapath acceleration architecture(DPAA), CoreNet fabric
      infrastructure, as well as network and peripheral interfaces.
      
      P3060QDS Board Overview:
      Memory subsystem:
        - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
        - 128M Bytes NOR flash single-chip memory
        - 16M Bytes SPI flash
        - 8K Bytes AT24C64 I2C EEPROM
      Ethernet:
        - 4x1G + 4x1G/2.5G Ethernet controllers
        - 2xRGMII + 1xMII, three VSC8641 PHYs on board
        - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
      PCIe: Two PCI Express 2.0 controllers/ports
      USB:  Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
      I2C:  Four I2C controllers
      UART: Supports up to four UARTs
      RapidIO: Supports two serial RapidIO ports
      Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      96cc017c
    • M
      powerpc/85xx: Make kexec to interate over online cpus · 43a327b7
      Matthew McClintock 提交于
      This is not strictly required, because this iterates over logical
      cpus and they are not (currently) discontigous. But, it's cleaner
      code and more obvious what is going on
      Signed-off-by: NMatthew McClintock <msm@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      43a327b7
  10. 01 11月, 2011 1 次提交
  11. 14 10月, 2011 1 次提交
  12. 13 10月, 2011 1 次提交
    • K
      powerpc/85xx: Setup secondary cores PIR with hard SMP id · 45116806
      Kumar Gala 提交于
      Normally logical and hard cpu ID are the same, however in same cases like
      on the P3060 they may differ.  Where the logical is 0..5, the hard id
      goes 0,1,4..7.  This can causes issues for places we utilize PIR to index
      into array like in debug exception handlers for finding the exception
      stack.
      
      Move to setting up PIR with hard_smp_processor_id fixes the issue.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      45116806
  13. 12 10月, 2011 3 次提交
  14. 07 10月, 2011 2 次提交
  15. 23 9月, 2011 1 次提交
  16. 27 7月, 2011 1 次提交
  17. 22 7月, 2011 1 次提交
    • F
      powerpc/85xx: fix mpic configuration in CAMP mode · a63e23b9
      Fabio Baltieri 提交于
      Change the string to check for CAMP mode boot on MPC85xx (eg. P2020) to match
      the one in the corresponding dts files (p2020rdb_camp_core{0,1}.dts).
      
      Without this fix the mpic is configured as in the SMP boot mode, which causes
      the first core to report a protected source interrupt error for devices
      of the other core and lock up.
      
      Also add MPIC_SINGLE_DEST_CPU on both P2020 based architectures in CAMP
      mode as suggested by Scott Wood. Thanks.
      
      Cc: Scott Wood <scottwood@freescale.com>
      Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NFabio Baltieri <fabio.baltieri@gmail.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      a63e23b9
  18. 13 7月, 2011 1 次提交
  19. 08 7月, 2011 1 次提交