1. 10 11月, 2007 1 次提交
    • P
      sched: restore deterministic CPU accounting on powerpc · fa13a5a1
      Paul Mackerras 提交于
      Since powerpc started using CONFIG_GENERIC_CLOCKEVENTS, the
      deterministic CPU accounting (CONFIG_VIRT_CPU_ACCOUNTING) has been
      broken on powerpc, because we end up counting user time twice: once in
      timer_interrupt() and once in update_process_times().
      
      This fixes the problem by pulling the code in update_process_times
      that updates utime and stime into a separate function called
      account_process_tick.  If CONFIG_VIRT_CPU_ACCOUNTING is not defined,
      there is a version of account_process_tick in kernel/timer.c that
      simply accounts a whole tick to either utime or stime as before.  If
      CONFIG_VIRT_CPU_ACCOUNTING is defined, then arch code gets to
      implement account_process_tick.
      
      This also lets us simplify the s390 code a bit; it means that the s390
      timer interrupt can now call update_process_times even when
      CONFIG_VIRT_CPU_ACCOUNTING is turned on, and can just implement a
      suitable account_process_tick().
      
      account_process_tick() now takes the task_struct * as an argument.
      Tested both with and without CONFIG_VIRT_CPU_ACCOUNTING.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      fa13a5a1
  2. 20 10月, 2007 1 次提交
  3. 17 10月, 2007 1 次提交
  4. 12 10月, 2007 1 次提交
    • P
      [POWERPC] Use 1TB segments · 1189be65
      Paul Mackerras 提交于
      This makes the kernel use 1TB segments for all kernel mappings and for
      user addresses of 1TB and above, on machines which support them
      (currently POWER5+, POWER6 and PA6T).
      
      We detect that the machine supports 1TB segments by looking at the
      ibm,processor-segment-sizes property in the device tree.
      
      We don't currently use 1TB segments for user addresses < 1T, since
      that would effectively prevent 32-bit processes from using huge pages
      unless we also had a way to revert to using 256MB segments.  That
      would be possible but would involve extra complications (such as
      keeping track of which segment size was used when HPTEs were inserted)
      and is not addressed here.
      
      Parts of this patch were originally written by Ben Herrenschmidt.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1189be65
  5. 03 10月, 2007 1 次提交
  6. 25 9月, 2007 1 次提交
  7. 14 9月, 2007 1 次提交
  8. 29 8月, 2007 1 次提交
    • K
      [POWERPC] Flush registers to proper task context · 0ee6c15e
      Kumar Gala 提交于
      When we flush register state for FP, Altivec, or SPE in flush_*_to_thread
      we need to respect the task_struct that the caller has passed to us.
      
      Most cases we are called with current, however sometimes (ptrace) we may
      be passed a different task_struct.
      
      This showed up when using gdbserver debugging a simple program that used
      floating point. When gdb tried to show the FP regs they all showed up as
      0, because the child's FP registers were never properly flushed to memory.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      0ee6c15e
  9. 26 7月, 2007 1 次提交
  10. 14 6月, 2007 1 次提交
  11. 09 5月, 2007 1 次提交
  12. 13 4月, 2007 1 次提交
    • B
      [POWERPC] Make tlb flush batch use lazy MMU mode · a741e679
      Benjamin Herrenschmidt 提交于
      The current tlb flush code on powerpc 64 bits has a subtle race since we
      lost the page table lock due to the possible faulting in of new PTEs
      after a previous one has been removed but before the corresponding hash
      entry has been evicted, which can leads to all sort of fatal problems.
      
      This patch reworks the batch code completely. It doesn't use the mmu_gather
      stuff anymore. Instead, we use the lazy mmu hooks that were added by the
      paravirt code. They have the nice property that the enter/leave lazy mmu
      mode pair is always fully contained by the PTE lock for a given range
      of PTEs. Thus we can guarantee that all batches are flushed on a given
      CPU before it drops that lock.
      
      We also generalize batching for any PTE update that require a flush.
      
      Batching is now enabled on a CPU by arch_enter_lazy_mmu_mode() and
      disabled by arch_leave_lazy_mmu_mode(). The code epects that this is
      always contained within a PTE lock section so no preemption can happen
      and no PTE insertion in that range from another CPU. When batching
      is enabled on a CPU, every PTE updates that need a hash flush will
      use the batch for that flush.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a741e679
  13. 26 3月, 2007 1 次提交
  14. 22 3月, 2007 1 次提交
  15. 16 3月, 2007 1 次提交
    • M
      [POWERPC] Fix atomicity of TIF update in flush_thread() · f144e7c7
      Mathieu Desnoyers 提交于
      Fix atomicity of TIF update in flush_thread() for powerpc
      
      Fixes it correctly with *_ti_thread_flag.
      
      Race :
      
      parent process executing :
      sys_ptrace()
       (lock_kernel())
       (ptrace_get_task_struct(pid))
       arch_ptrace()
         ptrace_detach()
           ptrace_disable(child);
             clear_singlestep(child);
               clear_tsk_thread_flag(child, TIF_SINGLESTEP);
               (which clears the TIF_SINGLESTEP flag atomically from a different
                process)
       (put_task_struct(child))
       (unlock_kernel())
      
      And at the same time, in the child process :
      sys_execve()
       do_execve()
         search_binary_handler()
           load_elf_binary()
             flush_old_exec()
               flush_thread()
                 doing a non-atomic thread flag update
      
      Applies on 2.6.20.
      Signed-off-by: NMathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      f144e7c7
  16. 08 3月, 2007 1 次提交
    • P
      [POWERPC] Harden validate_sp against stack corruption · bb72c481
      Paul Mackerras 提交于
      If something has overflowed or corrupted the stack and causes an oops,
      and we try to print a stack trace, that will call validate_sp, which
      can itself cause an oops if the cpu field of the thread_info struct at
      the bottom of the stack has been corrupted (if CONFIG_IRQSTACKS is
      set).  This makes debugging harder.
      
      To avoid the second oops, this adds a check to make sure that the cpu
      number is reasonable before using it to check whether the stack is on
      the softirq or hardirq stack.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      bb72c481
  17. 16 10月, 2006 1 次提交
  18. 02 10月, 2006 1 次提交
    • S
      [PATCH] namespaces: utsname: use init_utsname when appropriate · 96b644bd
      Serge E. Hallyn 提交于
      In some places, particularly drivers and __init code, the init utsns is the
      appropriate one to use.  This patch replaces those with a the init_utsname
      helper.
      
      Changes: Removed several uses of init_utsname().  Hope I picked all the
      	right ones in net/ipv4/ipconfig.c.  These are now changed to
      	utsname() (the per-process namespace utsname) in the previous
      	patch (2/7)
      
      [akpm@osdl.org: CIFS fix]
      Signed-off-by: NSerge E. Hallyn <serue@us.ibm.com>
      Cc: Kirill Korotaev <dev@openvz.org>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Herbert Poetzl <herbert@13thfloor.at>
      Cc: Andrey Savochkin <saw@sw.ru>
      Cc: Serge Hallyn <serue@us.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      96b644bd
  19. 01 7月, 2006 1 次提交
  20. 09 6月, 2006 2 次提交
    • P
      [PATCH] powerpc: Implement PR_[GS]ET_UNALIGN prctls for powerpc · e9370ae1
      Paul Mackerras 提交于
      This gives the ability to control whether alignment exceptions get
      fixed up or reported to the process as a SIGBUS, using the existing
      PR_SET_UNALIGN and PR_GET_UNALIGN prctls.  We do not implement the
      option of logging a message on alignment exceptions.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e9370ae1
    • P
      [PATCH] powerpc: Implement support for setting little-endian mode via prctl · fab5db97
      Paul Mackerras 提交于
      This adds the PowerPC part of the code to allow processes to change
      their endian mode via prctl.
      
      This also extends the alignment exception handler to be able to fix up
      alignment exceptions that occur in little-endian mode, both for
      "PowerPC" little-endian and true little-endian.
      
      We always enter signal handlers in big-endian mode -- the support for
      little-endian mode does not amount to the creation of a little-endian
      user/kernel ABI.  If the signal handler returns, the endian mode is
      restored to what it was when the signal was delivered.
      
      We have two new kernel CPU feature bits, one for PPC little-endian and
      one for true little-endian.  Most of the classic 32-bit processors
      support PPC little-endian, and this is reflected in the CPU feature
      table.  There are two corresponding feature bits reported to userland
      in the AT_HWCAP aux vector entry.
      
      This is based on an earlier patch by Anton Blanchard.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      fab5db97
  21. 01 4月, 2006 1 次提交
  22. 28 3月, 2006 1 次提交
  23. 27 3月, 2006 3 次提交
  24. 24 2月, 2006 2 次提交
    • P
      powerpc: Implement accurate task and CPU time accounting · c6622f63
      Paul Mackerras 提交于
      This implements accurate task and cpu time accounting for 64-bit
      powerpc kernels.  Instead of accounting a whole jiffy of time to a
      task on a timer interrupt because that task happened to be running at
      the time, we now account time in units of timebase ticks according to
      the actual time spent by the task in user mode and kernel mode.  We
      also count the time spent processing hardware and software interrupts
      accurately.  This is conditional on CONFIG_VIRT_CPU_ACCOUNTING.  If
      that is not set, we do tick-based approximate accounting as before.
      
      To get this accurate information, we read either the PURR (processor
      utilization of resources register) on POWER5 machines, or the timebase
      on other machines on
      
      * each entry to the kernel from usermode
      * each exit to usermode
      * transitions between process context, hard irq context and soft irq
        context in kernel mode
      * context switches.
      
      On POWER5 systems with shared-processor logical partitioning we also
      read both the PURR and the timebase at each timer interrupt and
      context switch in order to determine how much time has been taken by
      the hypervisor to run other partitions ("steal" time).  Unfortunately,
      since we need values of the PURR on both threads at the same time to
      accurately calculate the steal time, and since we can only calculate
      steal time on a per-core basis, the apportioning of the steal time
      between idle time (time which we ceded to the hypervisor in the idle
      loop) and actual stolen time is somewhat approximate at the moment.
      
      This is all based quite heavily on what s390 does, and it uses the
      generic interfaces that were added by the s390 developers,
      i.e. account_system_time(), account_user_time(), etc.
      
      This patch doesn't add any new interfaces between the kernel and
      userspace, and doesn't change the units in which time is reported to
      userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
      times(), etc.  Internally the various task and cpu times are stored in
      timebase units, but they are converted to USER_HZ units (1/100th of a
      second) when reported to userspace.  Some precision is therefore lost
      but there should not be any accumulating error, since the internal
      accumulation is at full precision.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c6622f63
    • A
      [PATCH] powerpc: Fix runlatch performance issues · cb2c9b27
      Anton Blanchard 提交于
      The runlatch SPR can take a lot of time to write. My original runlatch
      code would set it on every exception entry even though most of the time
      this was not required. It would also continually set it in the idle
      loop, which is an issue on an SMT capable processor.
      
      Now we cache the runlatch value in a threadinfo bit, and only check for
      it in decrementer and hardware interrupt exceptions as well as the idle
      loop. Boot on POWER3, POWER5 and iseries, and compile tested on pmac32.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      cb2c9b27
  25. 10 2月, 2006 1 次提交
  26. 13 1月, 2006 2 次提交
  27. 12 1月, 2006 2 次提交
    • P
      powerpc: make ARCH=ppc use arch/powerpc/kernel/process.c · 624cee31
      Paul Mackerras 提交于
      Commit 5388fb10 made signal_32.c
      use discard_lazy_cpu_state, which broke ARCH=ppc because that
      uses the common signal_32.c but has its own process.c.  Make ARCH=ppc
      use the common process.c to fix this and to reduce the amount
      of duplicated code.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      624cee31
    • P
      [PATCH] powerpc: Avoid potential FP corruption with preempt and UP · 5388fb10
      Paul Mackerras 提交于
      Heikki Lindholm pointed out that there was a potential race with the
      lazy CPU state (FP, VR, EVR) stuff if preempt is enabled.  The race
      is that in the process of restoring FP state on sigreturn, the task
      gets preempted by a user task that wants to use the FPU.  It will take
      an FP unavailable exception, which will write the current FPU state
      to the thread_struct, overwriting the values which sigreturn has
      stored.  Note that this can only happen on UP since we don't implement
      lazy CPU state on SMP.
      
      The fix is to flush the lazy CPU state before updating the
      thread_struct.  To do this we re-use the flush_lazy_cpu_state()
      function from process.c.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      5388fb10
  28. 30 11月, 2005 1 次提交
    • P
      powerpc: Fix bug causing FP registers corruption on UP + preempt · 48abec07
      Paul Mackerras 提交于
      This fixes a bug noticed by Paolo Galtieri and fixed for ARCH=ppc in
      the previous commit (ppc: fix floating point register corruption).
      This fixes the arch/powerpc code by adding preempt_disable/enable,
      and also cleans it up a bit by pulling out the code that discards
      any lazily-switched CPU register state into a new function, rather
      than having that code repeated in three places.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      48abec07
  29. 24 11月, 2005 1 次提交
    • J
      [PATCH] kprobes: Fix return probes on sys_execve · 8bf1101b
      Jim Keniston 提交于
      Fix a bug in kprobes that can cause an Oops or even a crash when a return
      probe is installed on one of the following functions: sys_execve,
      do_execve, load_*_binary, flush_old_exec, or flush_thread.  The fix is to
      remove the call to kprobe_flush_task() in flush_thread().  This fix has
      been tested on all architectures for which the return-probes feature has
      been implemented (i386, x86_64, ppc64, ia64).  Please apply.
      
      BACKGROUND
      
      Up to now, we have called kprobe_flush_task() under two situations: when a
      task exits, and when it execs.  Flushing kretprobe_instances on exit is
      correct because (a) do_exit() doesn't return, and (b) one or more
      return-probed functions may be active when a task calls do_exit().  Neither
      is the case for sys_execve() and its callees.
      
      Initially, the mistaken call to kprobe_flush_task() on exec was harmless
      because we put the "real" return address of each active probed function
      back in the stack, just to be safe, when we recycled its
      kretprobe_instance.  When support for ppc64 and ia64 was added, this safety
      measure couldn't be employed, and was eventually dropped even for i386 and
      x86_64.  sys_execve() and its callees were informally blacklisted for
      return probes until this fix was developed.
      Acked-by: NPrasanna S Panchamukhi <prasanna@in.ibm.com>
      Signed-off-by: NJim Keniston <jkenisto@us.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      8bf1101b
  30. 07 11月, 2005 2 次提交
  31. 03 11月, 2005 1 次提交
  32. 27 10月, 2005 1 次提交
    • D
      [PATCH] powerpc: Fix handling of fpscr on 64-bit · 25c8a78b
      David Gibson 提交于
      The recent merge of fpu.S broken the handling of fpscr for
      ARCH=powerpc and CONFIG_PPC64=y.  FP registers could be corrupted,
      leading to strange random application crashes.
      
      The confusion arises, because the thread_struct has (and requires) a
      64-bit area to save the fpscr, because we use load/store double
      instructions to get it in to/out of the FPU.  However, only the low
      32-bits are actually used, so we want to treat it as a 32-bit quantity
      when manipulating its bits to avoid extra load/stores on 32-bit.  This
      patch replaces the current definition with a structure of two 32-bit
      quantities (pad and val), to clarify things as much as is possible.
      The 'val' field is used when manipulating bits, the structure itself
      is used when obtaining the address for loading/unloading the value
      from the FPU.
      
      While we're at it, consolidate the 4 (!) almost identical versions of
      cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
      arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
      arch/powerpc/kernel/misc_64.S) into a single version in fpu.S.  The
      new version takes a pointer to thread_struct and applies the correct
      offset itself, rather than a pointer to the fpscr field itself, again
      to avoid confusion as to which is the correct field to use.
      
      Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
      code, which it previously did not.
      
      Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
      and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
      Booted on G5 (ARCH=powerpc) and things which previously fell over no
      longer do.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      25c8a78b
  33. 21 10月, 2005 1 次提交