- 12 11月, 2012 7 次提交
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由 Viresh Kumar 提交于
This reverts earlier commit which removed pinctrl_remove_gpio_range(), because at that time there weren't any more users of that routine. It was removed as the removal of ranges was done in unregister of pinctrl. But as we are now registering stuff from gpiolib, we may remove and insert a gpio module multiple times. So, we need this routine again. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
The of_device_id table is supposed to be zero-terminated. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
The driver supports old up SiRFprimaII SoCs, this patch makes it support the new SiRFmarco as well. SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to disable GPIO pad, we should write 1 to the corresponding bit in the new CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thomas Petazzoni 提交于
Like the spear platform, the mvebu platform has multiple files: one core file, and then one file per SoC family. More files will be added later, as support for mach-orion5x and mach-mv78xx0 SoCs is added to pinctrl-mvebu. For those reasons, having a separate subdirectory, drivers/pinctrl/mvebu/ makes sense, and it had already been suggested by Linus Wallej when the driver was originally submitted. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thomas Petazzoni 提交于
Including the core.h header for the pinctrl subsystem is not necessary, and it is actually causing problems when moving the pinctrl-mvebu drivers into a separate subdirectory. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thomas Petazzoni 提交于
The mach-kirkwood and mach-dove architectures have not yet been integrated into the mach-mvebu directory, which should ultimately contain the support for all Marvell SoCs from the Engineering Business Unit. However, before this can happen, we need to let mach-kirkwood and mach-dove use the pinctrl-mvebu driver, which supports the kirkwood and dove SoC families. In order to do that, we make this driver available as soon as PLAT_ORION is selected, instead of using ARCH_MVEBU as a condition. In the long term, PLAT_ORION should disappear and be fully replaced by ARCH_MVEBU, but the plan is to make the migration step by step, by first having the existing mach-* directories for Marvell SoCs converge on several infrastructures, including the pinctrl one. Also, like the spear pinctrl driver, we put all pinctrl-mvebu Kconfig options under a if, in order to avoid having certain options (PINCTRL_DOVE, PINCTRL_KIRKWOOD, etc.) selecting an option (PINCTLR_MVEBU) which itself has a dependency (on ARCH_MVEBU). In this a construct, the dependency is in fact ignored due to the selects. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This switches the way that pins are reserved for multiplexing: We used to do this when the map was parsed, at the creation of the settings inside the pinctrl handle, in pinmux_map_to_setting(). However this does not work for us, because we want to use the same set of pins with different devices at different times: the current code assumes that the pin groups in a pinmux state will only be used with one single device, albeit different groups can be active at different times. For example if a single I2C driver block is used to drive two different busses located on two pin groups A and B, then the pins for all possible states of a function are reserved when fetching the pinctrl handle: the I2C bus can choose either set A or set B by a mux state at runtime, but all pins in both group A and B (the superset) are effectively reserved for that I2C function and mapped to the device. Another device can never get in and use the pins in group A, even if the device/function is using group B at the moment. Instead: let use reserve the pins when the state is activated and drop them when the state is disabled, i.e. when we move to another state. This way different devices/functions can use the same pins at different times. We know that this is an odd way of doing things, but we really need to switch e.g. an SD-card slot to become a tracing output sink at runtime: we plug in a special "tracing card" then mux the pins that used to be an SD slot around to the tracing unit and push out tracing data there instead of SD-card traffic. As a side effect pinmux_free_setting() is unused but the stubs are kept for future additions of code. Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Loic Pallardy <loic.pallardy@st.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NJean Nicolas Graux <jean-nicolas.graux@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 06 11月, 2012 1 次提交
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由 Axel Lin 提交于
This patch fixes below build error when !CONFIG_OF_GPIO. CC drivers/pinctrl/pinctrl-samsung.o drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins': drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable] drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register': drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node' make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 The samsung pinctrl driver supports only device tree enabled platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB. The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available when GPIOLIB is selected. Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make PINCTRL_EXYNOS4 depend on OF && GPIOLIB. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 11月, 2012 9 次提交
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由 Vipul Kumar Samar 提交于
CLCD pads must be configured differently for sleep mode. This patch adds support for clcd_sleep_pingroup. Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Deepak Sikri 提交于
Some gpio pins are used to control DDR reset and clock enable while the system is moved into Low power. This patch adds in the corresponding GPIO entries in the pads_as_gpio_pins to ensure the pads are available as gpio's. Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Shiraz Hashim 提交于
Pad direction must also be updated for SPEAr1310, while setting pads values. This patch adds support for that. Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Vipul Kumar Samar 提交于
SPEAr1310 has separate PCI and PCIe implementations which are not muxed with each other. Presently they have been implemented as muxed together with SATA and are represented wrongly in the software. In reality only PCIe and SATA implementations are muxed with each other. This patch separates out pci pins creating a new pingroup and function for pci. Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NShiraz Hashim <shiraz.hashim@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Vipul Kumar Samar 提交于
This patch fixes two macros: PERIP_CFG registers offset and MCIF selection shift. Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Shiraz Hashim 提交于
All group names in SPEAr pinctrl have "_grp" at the end of their name. Do the same for clcd_high_res_grp. Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Deepak Sikri 提交于
pin entries of rmii and smii are interchanged by mistake. Fix it. Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Shiraz Hashim 提交于
To have pwm on pad no. 34 we also need to select between pwm and SD_LED functions. Add this to pwm pin mux register configuration. Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NVipin Kumar <vipin.kumar@st.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Viresh Kumar 提交于
Not all bits of a register are used for pinctrl in SPEAr. So only update bits relevant to pinctrl using muxreg->mask. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 10月, 2012 4 次提交
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由 Linus Walleij 提交于
When creating the simple irqdomain, pass the DT node pointer along, as is apropriate. Acked-by: NLee Jones <lee.jones@linaro.org> Reported-by: NGabriel Fernandez <gabriel.fernandez@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The irqdomain semantics were supposed to be such that a linear domain would be used if the passed first_irq was zero or negative, but I got it wrong so only passing zero as first_irq will work properly. Well, zero is NO_IRQ these days so let's pass zero. The semantics of irqdomain_add_simple() will be fixed in a separate patch. Acked-by: NLee Jones <lee.jones@linaro.org> Reported-by: NRikard Olsson <rikard.p.olsson@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Wei Yongjun 提交于
Add the missing unlock on the error handle path in function pinctrl_groups_show(). Cc: stable@kernel.org Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Since in the DT case, the linear domain path will not allocate descriptors for the IRQs, we need to use irq_create_mapping() for mapping hwirqs to Linux IRQs, so these descriptors get created on-the-fly in this case. ChangeLog v1->v2: - Just use irq_create_mapping() in the .to_irq function since this is called before unmasking or enabling any interrupt lines, so irq_find_mapping() should be sufficient for the IRQ handler function. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 10月, 2012 1 次提交
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由 Haojian Zhuang 提交于
Mutex is locked duplicatly by pinconf_groups_show() and pin_config_group_get(). It results dead lock. So avoid to lock mutex in pinconf_groups_show(). Cc: stable@kernel.org Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 18 10月, 2012 2 次提交
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由 Pritesh Raithatha 提交于
Cc: stable@kernel.org Signed-off-by: NPritesh Raithatha <praithatha@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Pritesh Raithatha 提交于
Cc: stable@kernel.org Signed-off-by: NPritesh Raithatha <praithatha@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 15 10月, 2012 8 次提交
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由 Linus Walleij 提交于
Since the simple irqdomain will fall back to a linear domain if the first_irq provided is <= 0, just use this, just make sure the first_irq is negative in the device tree case. Cc: Rob Herring <rob.herring@calxeda.com> Acked-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The compilation of the pinctrl driver failed on the legacy Nomadik NHK8815 platform because it was not providing the PRCMU interfaces needed to support the extended alternate functions used by the ux500 series. Solve this by providing some stubs for the legacy platform, to avoid too much #ifdefs in the code per se. Theoretically this actually allows the Nomadik and Ux500 to have a single kernel image with support for the PRCM registers on the Ux500 (though they have incompatible archs, but the spirit is there). Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Wei Yongjun 提交于
Remove duplicated include. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
The prima2 platform advertises needing no mach/gpio.h header file, but its pinctrl driver now has a sirfsoc_gpio_set_pull function that uses constants defined in arch/arm/mach-prima2/include/mach/gpio.h, which fails to build. Fortunately, the sirfsoc_gpio_set_pull is not used anywhere in the kernel, so we can safely remove it. Any out of tree drivers using it will have to be converted to use proper pinctrl functions to do the same. Without this patch, building prima2_defconfig results in: drivers/pinctrl/pinctrl-sirf.c: In function 'sirfsoc_gpio_set_pull': drivers/pinctrl/pinctrl-sirf.c:1331:7: error: 'SIRFSOC_GPIO_PULL_NONE' undeclared (first use in this function) drivers/pinctrl/pinctrl-sirf.c:1331:7: note: each undeclared identifier is reported only once for each function it appears in drivers/pinctrl/pinctrl-sirf.c:1334:7: error: 'SIRFSOC_GPIO_PULL_UP' undeclared (first use in this function) drivers/pinctrl/pinctrl-sirf.c:1338:7: error: 'SIRFSOC_GPIO_PULL_DOWN' undeclared (first use in this function) Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Wei Yongjun 提交于
In case of error, the function pinctrl_register() returns NULL not ERR_PTR(). The PTR_ERR() in the return value should be replaced with error no. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Wei Yongjun 提交于
Remove duplicated include. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tobias Klauser 提交于
The pointer to "pdev->dev" is already stored in "dev", so use it in devm_request_and_ioremap(). Signed-off-by: NTobias Klauser <tklauser@distanz.ch> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
The samsung pinctrl driver has a probe function that is __devinit and that calls a lot of other functions that are marked __init, which kbuild complains about. Marking everything __devinit means that the code does not discarded when CONFIG_HOTPLUG is set, which is a little more wasteful, but also more consistent Without this patch, building exynos_defconfig results in: WARNING: drivers/pinctrl/built-in.o(.devinit.text+0x124): Section mismatch in reference from the function samsung_pinctrl_probe() to the function .init.text:samsung_gpiolib_register() The function __devinit samsung_pinctrl_probe() references a function __init samsung_gpiolib_register(). If samsung_gpiolib_register is only used by samsung_pinctrl_probe then annotate samsung_gpiolib_register with a matching annotation. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 10月, 2012 2 次提交
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由 Linus Walleij 提交于
This alters the Nomadik pinctrl driver to: - Call irqdomain_add_linear() for the DT case so we get all independent from IRQ numbers in this case. - Call irqdomain_add_simple() for the legacy case, which allocates the IRQ descriptors for the Nomadik pin controller dynamically. Cc: Lee Jones <lee.jones@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jean-Nicolas Graux 提交于
Upgrade nomadik pinctrl driver to enable selection of other alternate-C[1-4] functions on some specific ux500 SoC pins. Handling of those functions is done thanks to PRCM GPIOCR registers. This was previously managed in PRCMU driver and it was not really convenient. Idea is to provide a common way to control all alternate functions. Note that this improvement does not support the old-fashioned way used to control nomadik pins, namely the "nmk_config_pin()" function and its derivatives. Signed-off-by: NJean-Nicolas Graux <jean-nicolas.graux@stericsson.com> Reviewed-by: NPhilippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 10月, 2012 1 次提交
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由 Simon Arlott 提交于
The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt controller, and pinmux/control device. Original driver by Simon Arlott. Rewrite including GPIO chip device by Chris Boot. Upstreaming changes by Stephen Warren: * Wrote DT binding documentation. * Changed brcm,function to an integer to more directly match the datasheet, and to match brcm,pins being an integer. * Implemented pull-up/down pin config. * Removed read-only DT property and related code. The restriction this implemented are driven by the board, not the GPIO HW block, so don't really make sense of a HW block binding, were in general incomplete (since they could only know about the few pins hard-coded into the Raspberry Pi B board design and not the uncommitted GPIOS), and are better represented simply by not writing incorrect data into pin configuration nodes. * Don't set GPIO_IN function select in gpio_request_enable() to avoid glitches; defer this to gpio_set_direction(). Consequently, removed empty bcm2835_pmx_gpio_request_enable(). * Simplified enabled_irq_map[]; make it explicitly 1 entry per bank. * Lifted use of enabled_irq_map[] outside the per-interrupt loop in IRQ handler, thus fixing an issue where the code was indexing into enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID. * Removed locking in IRQ handler, since all other code uses spin_lock_irqsave() and so guarantees it doesn't run concurrently with the handler. * Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of bcm2835_gpio_pins[]. * Remove range-checking from bcm2835_pctl_get_groups_count() since we've decided to trust the pinctrl core. * Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set() directly for simplicity. * Fixed body of dt_free_map() to match latest dt_node_to_map(). * Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl core owns doing this. * Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more descriptive. * Simplified remove(); removed call to non-existent pinctrl_remove_gpio_range(), remove early return on error. * Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's base GPIO number. * Error-handling cleanups in probe(). * Switched to module_platform_driver() rather than open-coding. * Made pin, group, and function names lower-case. * s/broadcom/brcm/ in DT property names. * s/2708/2835/. * Fixed a couple minor checkpatch warnings, and other minor cleanup. Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NChris Boot <bootc@bootc.net> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 9月, 2012 5 次提交
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由 Linus Walleij 提交于
The code was using a homegrown method of looking up the offset from the irq domain, not to be encouraged. Use the proper irq_find_mapping() call instead. Cc: Lee Jones <lee.jones@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
This patch fixes the chained irq hang issue, tested by DM9000 driver using GPIO0-3(irqnr=131) as the external IRQ on SiRFmarco: $ cat /proc/interrupts CPU0 CPU1 32: 1608 0 GIC sirfsoc_timer0 33: 0 3197 GIC sirfsoc_timer1 50: 10207 0 GIC sirfsoc-uart 56: 2 0 GIC cc0e0000.i2c 70: 44 0 GIC mmc0 131: 333 0 sirf-gpio-irq eth0 ... Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
This patch initializes the optional irq_chip pointer gc in sirfsoc pinctrl_gpio_range. Signed-off-by: NBaohua Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
sirfsoc_gpio_set_input() is called in those functions which have held the spinlock, so delete the duplicated locking. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Barry Song 提交于
We always use pinctrl_request_gpio() to get GPIO, If we don't have these missing pins in the pin list, gpio_request and related operations will fail for them. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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