1. 21 9月, 2016 4 次提交
    • T
      drm/rockchip: Avoid race with vblank count increment · 7caecdbe
      Tomasz Figa 提交于
      Since VOP does not have a hardware vblank count register, the ongoing
      commit might be racing with a requested vblank interrupt, which would
      increment the software vblank counter before the changes being committed
      actually happen.
      
      To avoid this, we can extend .atomic_flush(), so after it sets cfg_done
      bit, it polls the vblank interrupt bit until it's inactive to make sure
      that any old vblank interrupt gets to the handler and then uses
      synchronize_irq(vop->irq) to make sure the handler finishes running.
      
      The polling case should happen very rarely, but even if, the total wait
      time should be relatively low and in practice almost equal to the vop
      hardirq handler running time.
      Signed-off-by: NTomasz Figa <tfiga@chromium.org>
      7caecdbe
    • T
      drm/rockchip: Get rid of some unnecessary code · 65bcb6bc
      Tomasz Figa 提交于
      Current code implements prepare_fb and cleanup_fb callbacks only to
      grab/release fb references, which is already done by atomic framework
      when creating/destryoing plane state. Let's remove these
      unused bits.
      Signed-off-by: NTomasz Figa <tfiga@chromium.org>
      65bcb6bc
    • T
      drm/rockchip: Clear interrupt status bits before enabling · fa374107
      Tomasz Figa 提交于
      The enable register only masks the raw status bits to signal CPU
      interrupt only for enabled interrupts. The status bits are activated
      regardless of the enable register. This means that we might have an old
      interrupt event queued, which we are not interested in. To avoid getting
      a spurious interrupt signalled, we have to clear the old bit before we
      update the enable register.
      Signed-off-by: NTomasz Figa <tfiga@chromium.org>
      fa374107
    • S
      drm/rockchip: Don't key off vblank for psr · b883c9ba
      Sean Paul 提交于
      Instead of keying off vblank for psr, just flush every time
      we get an atomic update. This ensures that cursor updates
      will properly disable psr (without turning vblank on/off),
      and unifies the paths between fb_dirty and atomic psr
      enable/disable.
      Reviewed-by: NYakir Yang <ykk@rock-chips.com>
      Signed-off-by: NSean Paul <seanpaul@chromium.org>
      b883c9ba
  2. 23 8月, 2016 6 次提交
  3. 19 8月, 2016 2 次提交
  4. 09 8月, 2016 2 次提交
  5. 19 7月, 2016 3 次提交
  6. 17 6月, 2016 1 次提交
  7. 10 6月, 2016 4 次提交
  8. 03 6月, 2016 1 次提交
  9. 17 5月, 2016 2 次提交
  10. 03 5月, 2016 3 次提交
  11. 28 3月, 2016 5 次提交
  12. 18 1月, 2016 1 次提交
    • J
      drm/rockchip: vop: fix mask when updating interrupts · c7647f86
      John Keeping 提交于
      Commit dbb3d944 (drm/rockchip: vop: move interrupt registers into
      vop_data) introduced new macros for updating the interrupt control
      registers but these always use the mask from the register definition
      without refining it for the particular bits that are being changed.
      
      This means that whenever we enable/disable a particular interrupt we end
      up disabling all of the others as a side effect.
      Signed-off-by: NJohn Keeping <john@metanate.com>
      c7647f86
  13. 06 1月, 2016 2 次提交
  14. 31 12月, 2015 1 次提交
  15. 28 12月, 2015 3 次提交