1. 27 12月, 2019 8 次提交
  2. 17 12月, 2018 1 次提交
    • T
      PCI: imx6: Fix link training status detection in link up check · 2a031cab
      Trent Piepho 提交于
      [ Upstream commit 68bc10bf992180f269816ff3d22eb30383138577 ]
      
      This bug was introduced in the interaction for two commits on either
      branch of the merge commit 562df5c8 ("Merge branch
      'pci/host-designware' into next").
      
      Commit 4d107d3b ("PCI: imx6: Move link up check into
      imx6_pcie_wait_for_link()"), changed imx6_pcie_wait_for_link() to poll
      the link status register directly, checking for link up and not
      training, and made imx6_pcie_link_up() only check the link up bit (once,
      not a polling loop).
      
      While commit 886bc5ce ("PCI: designware: Add generic
      dw_pcie_wait_for_link()"), replaced the loop in
      imx6_pcie_wait_for_link() with a call to a new dwc core function, which
      polled imx6_pcie_link_up(), which still checked both link up and not
      training in a loop.
      
      When these two commits were merged, the version of
      imx6_pcie_wait_for_link() from 886bc5ce was kept, which eliminated
      the link training check placed there by 4d107d3b. However, the
      version of imx6_pcie_link_up() from 4d107d3b was kept, which
      eliminated the link training check that had been there and was moved to
      imx6_pcie_wait_for_link().
      
      The result was the link training check got lost for the imx6 driver.
      
      Eliminate imx6_pcie_link_up() so that the default handler,
      dw_pcie_link_up(), is used instead. The default handler has the correct
      code, which checks for link up and also that it still is not training,
      fixing the regression.
      
      Fixes: 562df5c8 ("Merge branch 'pci/host-designware' into next")
      Signed-off-by: NTrent Piepho <tpiepho@impinj.com>
      [lorenzo.pieralisi@arm.com: rewrote the commit log]
      Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Reviewed-by: NLucas Stach <l.stach@pengutronix.de>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Joao Pinto <Joao.Pinto@synopsys.com>
      Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Cc: Richard Zhu <hongxing.zhu@nxp.com>
      Signed-off-by: NSasha Levin <sashal@kernel.org>
      2a031cab
  3. 06 12月, 2018 2 次提交
  4. 14 11月, 2018 4 次提交
  5. 06 10月, 2018 1 次提交
    • K
      treewide: Replace more open-coded allocation size multiplications · 329e0989
      Kees Cook 提交于
      As done treewide earlier, this catches several more open-coded
      allocation size calculations that were added to the kernel during the
      merge window. This performs the following mechanical transformations
      using Coccinelle:
      
      	kvmalloc(a * b, ...) -> kvmalloc_array(a, b, ...)
      	kvzalloc(a * b, ...) -> kvcalloc(a, b, ...)
      	devm_kzalloc(..., a * b, ...) -> devm_kcalloc(..., a, b, ...)
      Signed-off-by: NKees Cook <keescook@chromium.org>
      329e0989
  6. 02 10月, 2018 1 次提交
  7. 22 9月, 2018 1 次提交
  8. 21 9月, 2018 1 次提交
  9. 17 9月, 2018 1 次提交
    • S
      PCI: hv: support reporting serial number as slot information · a15f2c08
      Stephen Hemminger 提交于
      The Hyper-V host API for PCI provides a unique "serial number" which
      can be used as basis for sysfs PCI slot table. This can be useful
      for cases where userspace wants to find the PCI device based on
      serial number.
      
      When an SR-IOV NIC is added, the host sends an attach message
      with serial number. The kernel doesn't use the serial number, but
      it is useful when doing the same thing in a userspace driver such
      as the DPDK. By having /sys/bus/pci/slots/N it provides a direct
      way to find the matching PCI device.
      
      There maybe some cases where serial number is not unique such
      as when using GPU's. But the PCI slot infrastructure will handle
      that.
      
      This has a side effect which may also be useful. The common udev
      network device naming policy uses the slot information (rather
      than PCI address).
      Signed-off-by: NStephen Hemminger <sthemmin@microsoft.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a15f2c08
  10. 08 8月, 2018 6 次提交
  11. 06 8月, 2018 1 次提交
  12. 05 8月, 2018 1 次提交
    • N
      x86: Don't include linux/irq.h from asm/hardirq.h · 447ae316
      Nicolai Stange 提交于
      The next patch in this series will have to make the definition of
      irq_cpustat_t available to entering_irq().
      
      Inclusion of asm/hardirq.h into asm/apic.h would cause circular header
      dependencies like
      
        asm/smp.h
          asm/apic.h
            asm/hardirq.h
              linux/irq.h
                linux/topology.h
                  linux/smp.h
                    asm/smp.h
      
      or
      
        linux/gfp.h
          linux/mmzone.h
            asm/mmzone.h
              asm/mmzone_64.h
                asm/smp.h
                  asm/apic.h
                    asm/hardirq.h
                      linux/irq.h
                        linux/irqdesc.h
                          linux/kobject.h
                            linux/sysfs.h
                              linux/kernfs.h
                                linux/idr.h
                                  linux/gfp.h
      
      and others.
      
      This causes compilation errors because of the header guards becoming
      effective in the second inclusion: symbols/macros that had been defined
      before wouldn't be available to intermediate headers in the #include chain
      anymore.
      
      A possible workaround would be to move the definition of irq_cpustat_t
      into its own header and include that from both, asm/hardirq.h and
      asm/apic.h.
      
      However, this wouldn't solve the real problem, namely asm/harirq.h
      unnecessarily pulling in all the linux/irq.h cruft: nothing in
      asm/hardirq.h itself requires it. Also, note that there are some other
      archs, like e.g. arm64, which don't have that #include in their
      asm/hardirq.h.
      
      Remove the linux/irq.h #include from x86' asm/hardirq.h.
      
      Fix resulting compilation errors by adding appropriate #includes to *.c
      files as needed.
      
      Note that some of these *.c files could be cleaned up a bit wrt. to their
      set of #includes, but that should better be done from separate patches, if
      at all.
      Signed-off-by: NNicolai Stange <nstange@suse.de>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      447ae316
  13. 30 7月, 2018 3 次提交
    • L
      PCI: mobiveil: Add Kconfig/Makefile entries · 6f2c73c1
      Lorenzo Pieralisi 提交于
      commit 9af6bcb1 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP
      driver") did not add the configuration and build infrastructure to
      configure and build the mobiveil controller driver, so at present the
      driver code is in the kernel but cannot be compiled.
      
      Add the mobiveil controller driver Kconfig/Makefile infrastructure.
      
      Fixes: 9af6bcb1 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP
      driver")
      Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
      6f2c73c1
    • L
      PCI: mobiveil: Add missing ../pci.h include · d3743012
      Lorenzo Pieralisi 提交于
      PCI mobiveil host controller driver currently fails to compile
      with the following error:
      
      drivers/pci/controller/pcie-mobiveil.c: In function
      'mobiveil_pcie_probe':
      drivers/pci/controller/pcie-mobiveil.c:788:8: error: implicit
      declaration of function 'devm_of_pci_get_host_bridge_resources'; did you
      mean 'pci_get_host_bridge_device'?
      [-Werror=implicit-function-declaration]
        ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
              pci_get_host_bridge_device
      
      Add the missing include file to pull in the required function declaration.
      
      Fixes: 9af6bcb1 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP
      driver")
      Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
      d3743012
    • L
      PCI: mobiveil: Fix struct mobiveil_pcie.pcie_reg_base address type · af3f606e
      Lorenzo Pieralisi 提交于
      The field pcie_reg_base in struct mobiveil_pcie represents a physical
      address so it should be of phys_addr_t type rather than void __iomem*;
      this results in the following compilation  warnings:
      
      drivers/pci/controller/pcie-mobiveil.c: In function
      'mobiveil_pcie_parse_dt':
      drivers/pci/controller/pcie-mobiveil.c:326:22: warning: assignment makes
      pointer from integer without a cast [-Wint-conversion]
        pcie->pcie_reg_base = res->start;
                            ^
      drivers/pci/controller/pcie-mobiveil.c: In function
      'mobiveil_pcie_enable_msi':
      drivers/pci/controller/pcie-mobiveil.c:485:25: warning: initialization
      makes integer from pointer without a cast [-Wint-conversion]
        phys_addr_t msg_addr = pcie->pcie_reg_base;
                               ^~~~
      drivers/pci/controller/pcie-mobiveil.c: In function
      'mobiveil_compose_msi_msg':
      drivers/pci/controller/pcie-mobiveil.c:640:21: warning: initialization
      makes integer from pointer without a cast [-Wint-conversion]
        phys_addr_t addr = pcie->pcie_reg_base + (data->hwirq * sizeof(int));
      
      Fix the type and with it the compilation warnings.
      
      Fixes: 9af6bcb1 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP
      driver")
      Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
      af3f606e
  14. 28 7月, 2018 1 次提交
  15. 26 7月, 2018 1 次提交
  16. 19 7月, 2018 7 次提交