1. 16 5月, 2015 4 次提交
  2. 15 5月, 2015 1 次提交
  3. 10 5月, 2015 1 次提交
    • J
      net: amd-xgbe: Add hardware dependency · 74a78b15
      Jean Delvare 提交于
      The amd-xgbe driver currently only works with the Seattle SoC, which
      is ARM64 architecture, so there is no point in building this driver on
      other architectures except for build testing purpose. The dependency
      list can be updated later if the driver ever supports other
      architectures.
      Signed-off-by: NJean Delvare <jdelvare@suse.de>
      Cc: Tom Lendacky <thomas.lendacky@amd.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      74a78b15
  4. 24 4月, 2015 1 次提交
    • G
      ethernet: amd: AMD_XGBE should depend on HAS_DMA · 61e77d29
      Geert Uytterhoeven 提交于
      If NO_DMA=y:
      
          drivers/built-in.o: In function `xgbe_probe':
          xgbe-main.c:(.text+0x2def0a): undefined reference to `dma_set_mask'
          xgbe-main.c:(.text+0x2def20): undefined reference to `dma_supported'
          drivers/built-in.o: In function `xgbe_rx_poll':
          xgbe-drv.c:(.text+0x2e0320): undefined reference to `dma_sync_single_for_cpu'
          xgbe-drv.c:(.text+0x2e035e): undefined reference to `dma_sync_single_for_cpu'
          drivers/built-in.o: In function `xgbe_unmap_rdata':
          xgbe-desc.c:(.text+0x2e5fe4): undefined reference to `dma_unmap_page'
          xgbe-desc.c:(.text+0x2e5ffa): undefined reference to `dma_unmap_single'
          xgbe-desc.c:(.text+0x2e604a): undefined reference to `dma_unmap_page'
          xgbe-desc.c:(.text+0x2e6084): undefined reference to `dma_unmap_page'
          drivers/built-in.o: In function `xgbe_alloc_pages':
          xgbe-desc.c:(.text+0x2e6156): undefined reference to `dma_map_page'
          xgbe-desc.c:(.text+0x2e6164): undefined reference to `dma_mapping_error'
          drivers/built-in.o: In function `xgbe_free_ring':
          xgbe-desc.c:(.text+0x2e63d4): undefined reference to `dma_unmap_page'
          xgbe-desc.c:(.text+0x2e640e): undefined reference to `dma_unmap_page'
          xgbe-desc.c:(.text+0x2e644a): undefined reference to `dma_free_coherent'
          drivers/built-in.o: In function `xgbe_init_ring':
          xgbe-desc.c:(.text+0x2e64d4): undefined reference to `dma_alloc_coherent'
          drivers/built-in.o: In function `xgbe_map_tx_skb':
          xgbe-desc.c:(.text+0x2e6628): undefined reference to `dma_map_single'
          xgbe-desc.c:(.text+0x2e6638): undefined reference to `dma_mapping_error'
          xgbe-desc.c:(.text+0x2e66b2): undefined reference to `dma_map_single'
          xgbe-desc.c:(.text+0x2e66c2): undefined reference to `dma_mapping_error'
          xgbe-desc.c:(.text+0x2e6762): undefined reference to `dma_map_page'
          xgbe-desc.c:(.text+0x2e6772): undefined reference to `dma_mapping_error'
      Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      61e77d29
  5. 10 4月, 2015 3 次提交
  6. 01 4月, 2015 1 次提交
  7. 21 3月, 2015 8 次提交
  8. 09 3月, 2015 1 次提交
  9. 04 3月, 2015 1 次提交
  10. 28 2月, 2015 1 次提交
    • L
      amd-xgbe: Request IRQs only after driver is fully setup · c30e76a7
      Lendacky, Thomas 提交于
      It is possible that the hardware may not have been properly shutdown
      before this driver gets control, through use by firmware, for example.
      Until the driver is loaded, interrupts associated with the hardware
      could go pending. When the IRQs are requested napi support has not
      been initialized yet, but the ISR will get control and schedule napi
      processing resulting in a kernel panic because the poll routine has not
      been set.
      
      Adjust the code so that the driver is fully ready to handle and process
      interrupts as soon as the IRQs are requested. This involves requesting
      and freeing IRQs during start and stop processing and ordering the napi
      add and delete calls appropriately.
      
      Also adjust the powerup and powerdown routines to match the start and
      stop routines in regards to the ordering of tasks, including napi
      related calls.
      Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c30e76a7
  11. 08 2月, 2015 1 次提交
  12. 05 2月, 2015 2 次提交
  13. 30 1月, 2015 2 次提交
    • A
      net: am2150: fix nmclan_cs.c shared interrupt handling · 96a30175
      Arnd Bergmann 提交于
      A recent patch tried to work around a valid warning for the use of a
      deprecated interface by blindly changing from the old
      pcmcia_request_exclusive_irq() interface to pcmcia_request_irq().
      
      This driver has an interrupt handler that is not currently aware
      of shared interrupts, but can be easily converted to be.
      At the moment, the driver reads the interrupt status register
      repeatedly until it contains only zeroes in the interesting bits,
      and handles each bit individually.
      
      This patch adds the missing part of returning IRQ_NONE in case none
      of the bits are set to start with, so we can move on to the next
      interrupt source.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Fixes: 5f5316fc ("am2150: Update nmclan_cs.c to use update PCMCIA API")
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      96a30175
    • A
      net: lance,ni64: don't build for ARM · e9b106b8
      Arnd Bergmann 提交于
      The ni65 and lance ethernet drivers manually program the ISA DMA
      controller that is only available on x86 PCs and a few compatible
      systems. Trying to build it on ARM results in this error:
      
      ni65.c: In function 'ni65_probe1':
      ni65.c:496:62: error: 'DMA1_STAT_REG' undeclared (first use in this function)
           ((inb(DMA1_STAT_REG) >> 4) & 0x0f)
                                                                    ^
      ni65.c:496:62: note: each undeclared identifier is reported only once for each function it appears in
      ni65.c:497:63: error: 'DMA2_STAT_REG' undeclared (first use in this function)
           | (inb(DMA2_STAT_REG) & 0xf0);
      
      The DMA1_STAT_REG and DMA2_STAT_REG registers are only defined for
      alpha, mips, parisc, powerpc and x86, although it is not clear
      which subarchitectures actually have them at the correct location.
      
      This patch for now just disables it for ARM, to avoid randconfig
      build errors. We could also decide to limit it to the set of
      architectures on which it does compile, but that might look more
      deliberate than guessing based on where the drivers build.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e9b106b8
  14. 24 1月, 2015 1 次提交
  15. 20 1月, 2015 1 次提交
  16. 17 1月, 2015 7 次提交
  17. 15 1月, 2015 1 次提交
  18. 14 1月, 2015 1 次提交
  19. 31 12月, 2014 2 次提交