1. 06 12月, 2009 1 次提交
  2. 03 12月, 2009 1 次提交
    • D
      x86, Calgary IOMMU quirk: Find nearest matching Calgary while walking up the PCI tree · 4528752f
      Darrick J. Wong 提交于
      On a multi-node x3950M2 system, there's a slight oddity in the
      PCI device tree for all secondary nodes:
      
       30:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev e1)
        \-33:00.0 PCI bridge: IBM CalIOC2 PCI-E Root Port (rev 01)
           \-34:00.0 RAID bus controller: LSI Logic / Symbios Logic MegaRAID SAS 1078 (rev 04)
      
      ...as compared to the primary node:
      
       00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev e1)
        \-01:00.0 VGA compatible controller: ATI Technologies Inc ES1000 (rev 02)
       03:00.0 PCI bridge: IBM CalIOC2 PCI-E Root Port (rev 01)
        \-04:00.0 RAID bus controller: LSI Logic / Symbios Logic MegaRAID SAS 1078 (rev 04)
      
      In both nodes, the LSI RAID controller hangs off a CalIOC2
      device, but on the secondary nodes, the BIOS hides the VGA
      device and substitutes the device tree ending with the disk
      controller.
      
      It would seem that Calgary devices don't necessarily appear at
      the top of the PCI tree, which means that the current code to
      find the Calgary IOMMU that goes with a particular device is
      buggy.
      
      Rather than walk all the way to the top of the PCI
      device tree and try to match bus number with Calgary descriptor,
      the code needs to examine each parent of the particular device;
      if it encounters a Calgary with a matching bus number, simply
      use that.
      
      Otherwise, we BUG() when the bus number of the Calgary doesn't
      match the bus number of whatever's at the top of the device tree.
      
      Extra note: This patch appears to work correctly for the x3950
      that came before the x3950 M2.
      Signed-off-by: NDarrick J. Wong <djwong@us.ibm.com>
      Acked-by: NMuli Ben-Yehuda <muli@il.ibm.com>
      Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Cc: Joerg Roedel <joerg.roedel@amd.com>
      Cc: Yinghai Lu <yhlu.kernel@gmail.com>
      Cc: Jon D. Mason <jdmason@kudzu.us>
      Cc: Corinna Schultz <coschult@us.ibm.com>
      Cc: <stable@kernel.org>
      LKML-Reference: <20091202230556.GG10295@tux1.beaverton.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      4528752f
  3. 27 11月, 2009 34 次提交
  4. 25 11月, 2009 2 次提交
    • F
      x86: Fix iommu=soft boot option · 273bee27
      FUJITA Tomonori 提交于
      iommu=soft boot option forces the kernel to use swiotlb.
      
      ( This has the side-effect of enabling the swiotlb over the
        GART if this boot option is provided. This is the desired
        behavior of the swiotlb boot option and works like that
        for all other hw-IOMMU drivers. )
      Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Cc: yinghai@kernel.org
      LKML-Reference: <20091125084611O.fujita.tomonori@lab.ntt.co.jp>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      273bee27
    • H
      [CPUFREQ] Enable ACPI PDC handshake for VIA/Centaur CPUs · d77b8197
      Harald Welte 提交于
      In commit 0de51088, we introduced the
      use of acpi-cpufreq on VIA/Centaur CPU's by removing a vendor check for
      VENDOR_INTEL.  However, as it turns out, at least the Nano CPU's also
      need the PDC (processor driver capabilities) handshake in order to
      activate the methods required for acpi-cpufreq.
      
      Since arch_acpi_processor_init_pdc() contains another vendor check for
      Intel, the PDC is not initialized on VIA CPU's.  The resulting behavior
      of a current mainline kernel on such systems is:  acpi-cpufreq
      loads and it indicates CPU frequency changes.  However, the CPU stays at
      a single frequency
      
      This trivial patch ensures that init_intel_pdc() is called on Intel and
      VIA/Centaur CPU's alike.
      Signed-off-by: NHarald Welte <HaraldWelte@viatech.com>
      Signed-off-by: NDave Jones <davej@redhat.com>
      d77b8197
  5. 23 11月, 2009 2 次提交