- 12 5月, 2012 10 次提交
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由 Shawn Guo 提交于
Cc: linux-fbdev@vger.kernel.org Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Cc: linux-i2c@vger.kernel.org Cc: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Cc: linux-mtd@lists.infradead.org Cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Cc: linux-mmc@vger.kernel.org Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NChris Ball <cjb@laptop.org>
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由 Shawn Guo 提交于
Cc: linux-serial@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Cc: linux-serial@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Shawn Guo 提交于
Cc: spi-devel-general@lists.sourceforge.net Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
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由 Shawn Guo 提交于
Cc: linux-i2c@vger.kernel.org Cc: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
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由 Shawn Guo 提交于
Cc: linux-can@vger.kernel.org Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMarc Kleine-Budde <mkl@pengutronix.de> Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
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由 Shawn Guo 提交于
Cc: netdev@vger.kernel.org Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NDong Aisheng <dong.aisheng@linaro.org> Acked-by: NDavid S. Miller <davem@davemloft.net>
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- 11 5月, 2012 9 次提交
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由 Linus Walleij 提交于
This implements the pin configuration interface for the Nomadik pin controller. As part of the exercise we add a bit in the pin_cfg_t for the Nomadik pinctrl driver that indicates if the pin should be forced into GPIO mode. This is not done to go behind the back of the GPIO subsystem, but to ensure that default modes can be set by hogs on boot and system suspend/resume states. It was used implicitly by the old code defining all config settings and modes in a single config word but we now have a split between pinmux and pinconf leading to the need to have this. We also add a bit for explicitly setting sleepmode of the pin. This was previously handled by custom calls with the _sleep() suffix, but we now have one single interface into the configuration so we replace this with a bit indicating that the pin shall be configured into sleep mode. Some of the configuration can be refactored later to use less custom fields on the pin_cfg_t but we are currently leaving the old function calls in place so we stay compatible. ChangeLog v1->v2: - Drop a hunk changing pinmuxing for GPIO and move it over to the preceding pinmux patch. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Implements basic pinmux for the Nomadik pin controller. The plan is to split the existing singular pin config interface nmk_config_pin(), nmk_config_pins(), that will configure muxing and other settings at the same time, into two interfaces by splitting the code in pinmux and pinctrl and eventually deleting the old interface and its helper functions when all users are gone. nmk_gpio_set_mode() and nmk_gpio_get_mode() are two older interfaces for just configuring muxing/altfunctions that will also be replaced in the end. We take some extra care to handle the glitch-avoidance here, but it is simpler now since there is only one altsetting per pingroup so we know immediately if we need to avoid altfunc C glitches for a certain group. As part of the makeover implement the .request() and .free() calls on the GPIO chips and have them call back into the pinctrl layer to reserve GPIOs. ChangeLog v1->v2: - Rebased on pinctrl-mergebase-20120418 so we get the latest driver infrastructure where function count is done by a fixed value and we can drop a few range checks since this is now handled by the core. - Include a GPIO muxing hunk erroneously part of the pin config patch. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Since all pins we can control are GPIOs, match a GPIO range to each pin in the debug function and call into the GPIO debug print function to have the per-pin information. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Break out the code displaying the status of a single pin so we can use the same code in the pinctrl debug function. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds a scratch pin control interface to the Nomadik pinctrl driver, and defines the pins and groups in the DB8500 ASIC. We define GPIO ranges to cover the pins exposed. The DB8500 has more pins than this but we restrict the driver to the pins that can be controlled from the combined GPIO and pin control hardware to begin with. ChangeLog v1->v2: - Base on the latest pinctrl development from pinctrl-mergebase-20120418 so we can get rid of legacy group count mechanism. Also drop the range checks for group index, this is handled by the core now. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
a60b57ed "drivers/gpio: gpio-nomadik: Add support for irqdomains" broke building with CONFIG_OF_GPIO disabled. Without this patch, building nhk8815_defconfig results in: /home/arnd/linux-arm/drivers/gpio/gpio-nomadik.c: In function 'nmk_gpio_probe': /home/arnd/linux-arm/drivers/gpio/gpio-nomadik.c:1238:6: error: 'struct gpio_chip' has no member named 'of_node' make[3]: *** [drivers/gpio/gpio-nomadik.o] Error 1 make[2]: *** [drivers/gpio] Error 2 make[2]: *** Waiting for unfinished jobs.... make[1]: *** [drivers] Error 2 make[1]: *** Waiting for unfinished jobs.... make: *** [sub-make] Error 2 Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
I'm moving this driver over to the pinctrl subsystem to convert the custom pin mux/config scheme over to use pinctrl. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Shawn Guo 提交于
Cc: linux-serial@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
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由 Dong Aisheng 提交于
Cc: linux-mmc@vger.kernel.org Cc: Chris Ball <cjb@laptop.org> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NStephen Warren <swarren@wwwdotorg.org>
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- 07 5月, 2012 1 次提交
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由 Stephen Warren 提交于
Additionally print which pin the request failed for, which entity already claimed it, and what entity was trying to claim it. Remove duplicate device name from a debug message. Clean up some indentation. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 5月, 2012 5 次提交
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由 Russell King 提交于
The common clock framework allocates clocks dynamically. Provide a set of helpers to streamline the clkdev registration of the clock lookups to avoid repetitive code sequences. Reviewed-by: NViresh Kumar <viresh.kumar@st.com> Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Shawn Guo 提交于
Add pinctrl support for Freescale MXS SoCs, i.MX23 and i.MX28. The driver supports device tree probe only. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dong Aisheng 提交于
Acked-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dong Aisheng 提交于
The driver has mux and config support while the gpio is still not supported. For select input setting, the driver will handle it internally and do not need user to take care of it. The pinctrl-imx core driver will parse the dts file and dynamically create the pinmux functions and groups. Each IMX SoC pinctrl driver should register pins with a pin register map including mux register and config register and select input map to core for proper operations. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dong Aisheng 提交于
As pinctrl handles, it may be possible the pinctrl gpio ranges are still not got registered when user call pinctrl_gpio_request. Thus, add defer support for it too. Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 4月, 2012 14 次提交
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由 Kenneth Graunke 提交于
Clearing bit 5 of CACHE_MODE_0 is necessary to prevent GPU hangs in OpenGL programs such as Google MapsGL, Google Earth, and gzdoom when using separate stencil buffers. Without it, the GPU tries to use the LRA eviction policy, which isn't supported. This was supposed to be off by default, but seems to be on for many machines. This cannot be done in gen6_init_clock_gating with most of the other workaround bits; the render ring needs to exist. Otherwise, the register write gets dropped on the floor (one printk will show it changed, but a second printk immediately following shows the value reverts to the old one). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47535 Cc: stable@vger.kernel.org Cc: Rob Castle <futuredub@gmail.com> Cc: Eric Appleman <erappleman@gmail.com> Cc: aaron667@gmx.net Cc: Keith Packard <keithp@keithp.com> Signed-off-by: NKenneth Graunke <kenneth@whitecape.org> Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Makes Nutmeg DP to VGA bridges work for me. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=42490 Noticed by Jerome Glisse (after weeks of debugging). Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Scott Jiang 提交于
This patch ensures that the last bit of a transfer gets correctly flushed out of the register. Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Scott Jiang 提交于
This condition is used to determine 8 bits or 16 and 32 bits transfer. Obviously it is reversed. Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Scott Jiang 提交于
Since the member was dropped from the common Blackfin header, we need to stop using it in the SPORT driver too. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Scott Jiang 提交于
No other SPI controller has this field, and SPI clients should be setting this up in their own drivers. So drop it from the Blackfin controller to keep people from using it. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Scott Jiang 提交于
Each transfer may have its own bits per word. Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Scott Jiang 提交于
This controller is only for blackfin 5xx soc, so rename it to BFIN5XX Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Viresh Kumar 提交于
Currently, if we request for frequency greater than maximum possible, spi driver returns error. For example, if the spi block src frequency is 333/4 MHz, i.e. 83.33.. MHz, maximum frequency programmable would be src/2. Which would come around 41.6... It is difficult to pass frequency in these figures. We normally try to program in round figures, like 42 MHz and it should get programmed to <= requested_frequency, i.e. 41.6... For this to happen, we must not return error even if requested freq is higher than max possible. But should program it to max possible. Reported-by: NVinit Kamalaksha Shenoy <vinit.shenoy@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Florian Fainelli 提交于
We were not properly advertising the MODE bits supported by this driver, fix that. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Florian Fainelli 提交于
We do not need to use a flag to indicate if the master driver is stopping it is sufficient to perform spi master unregistering in the platform driver's remove function. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Florian Fainelli 提交于
This patch converts the bcm63xx SPI driver to use the SPI infrastructure pump message queue. Since we were previously sleeping in the SPI driver's transfer() function (which is not allowed) this is now fixed as well. To complete that conversion a certain number of changes have been made: - the transfer len is split into multiple hardware transfers in case its size is bigger than the hardware FIFO size - the FIFO refill is no longer done in the interrupt context, which was a bad idea leading to quick interrupt handler re-entrancy Tested-by: NTanguy Bouzeloc <tanguy.bouzeloc@efixo.com> Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 H Hartley Sweeten 提交于
A new enum indicating the dma channel direction was introduced by: commit 49920bc6 dmaengine: add new enum dma_transfer_direction The following commit changed spi-ep93xx to use the new enum: commit a485df4b spi, serial: move to dma_transfer_direction In doing so a sparse warning was introduced: warning: mixing different enum types int enum dma_data_direction versus int enum dma_transfer_direction This is produced because the 'dir' passed in ep93xx_spi_dma_prepare is an enum dma_data_direction and is being used to set the dma_slave_config 'direction' which is now an enum dma_transfer_direction. Fix this by converting spi-ep93xx to use the new enum type in all places. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Viresh Kumar 提交于
calculate_effective_freq() was still not optimized and there were cases when it returned without error and with values of cpsr and scr as zero. Also, the variable named found is not used well. This patch targets to optimize and correct this routine. Tested for SPEAr. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Tested-by: NVinit Kamalaksha Shenoy <vinit.shenoy@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 27 4月, 2012 1 次提交
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由 Alan Stern 提交于
This patch (as1548) fixes a recently-introduced incompatibility between the UDC core and the dummy-hcd driver. Commit 8ae8090c (usb: gadget: udc-core: fix asymmetric calls in remove_driver) moved the usb_gadget_udc_stop() call in usb_gadget_remove_driver() below the usb_gadget_disconnect() call. As a result, usb_gadget_disconnect() gets called at a time when the gadget driver believes it has been unbound but dummy-hcd believes it has not. A nasty error ensues when dummy-hcd calls the gadget driver's disconnect method a second time. To fix the problem, this patch moves the gadget driver's unbind notification after the usb_gadget_disconnect() call. Now nothing happens between the two unbind notifications, so nothing goes wrong. Signed-off-by: NAlan Stern <stern@rowland.harvard.edu> Tested-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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