1. 24 6月, 2016 1 次提交
  2. 19 6月, 2016 1 次提交
  3. 11 6月, 2016 1 次提交
  4. 30 5月, 2016 1 次提交
  5. 29 3月, 2016 1 次提交
  6. 01 3月, 2016 1 次提交
  7. 11 2月, 2016 1 次提交
  8. 11 12月, 2015 1 次提交
  9. 18 11月, 2015 2 次提交
    • V
      drm/i915: Type safe register read/write · f0f59a00
      Ville Syrjälä 提交于
      Make I915_READ and I915_WRITE more type safe by wrapping the register
      offset in a struct. This should eliminate most of the fumbles we've had
      with misplaced parens.
      
      This only takes care of normal mmio registers. We could extend the idea
      to other register types and define each with its own struct. That way
      you wouldn't be able to accidentally pass the wrong thing to a specific
      register access function.
      
      The gpio_reg setup is probably the ugliest thing left. But I figure I'd
      just leave it for now, and wait for some divine inspiration to strike
      before making it nice.
      
      As for the generated code, it's actually a bit better sometimes. Eg.
      looking at i915_irq_handler(), we can see the following change:
        lea    0x70024(%rdx,%rax,1),%r9d
        mov    $0x1,%edx
      - movslq %r9d,%r9
      - mov    %r9,%rsi
      - mov    %r9,-0x58(%rbp)
      - callq  *0xd8(%rbx)
      + mov    %r9d,%esi
      + mov    %r9d,-0x48(%rbp)
       callq  *0xd8(%rbx)
      
      So previously gcc thought the register offset might be signed and
      decided to sign extend it, just in case. The rest appears to be
      mostly just minor shuffling of instructions.
      
      v2: i915_mmio_reg_{offset,equal,valid}() helpers added
          s/_REG/_MMIO/ in the register defines
          mo more switch statements left to worry about
          ring_emit stuff got sorted in a prep patch
          cmd parser, lrc context and w/a batch buildup also in prep patch
          vgpu stuff cleaned up and moved to a prep patch
          all other unrelated changes split out
      v3: Rebased due to BXT DSI/BLC, MOCS, etc.
      v4: Rebased due to churn, s/i915_mmio_reg_t/i915_reg_t/
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/1447853606-2751-1-git-send-email-ville.syrjala@linux.intel.com
      f0f59a00
    • V
      drm/i915: s/is_sdvob/enum port/ · 2a5c0832
      Ville Syrjälä 提交于
      Replace the is_sdvob bool and some sdvo_reg checks with enum port. This
      makes the SDVO code look more modern, and gets rid of explicit register
      offset checks in the code which will hamper register type checking.
      
      v2: Add assert_sdvo_port_valid() (Chris)
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/1446838199-3666-1-git-send-email-ville.syrjala@linux.intel.com
      2a5c0832
  10. 10 11月, 2015 1 次提交
  11. 09 10月, 2015 1 次提交
  12. 06 10月, 2015 1 次提交
  13. 30 9月, 2015 5 次提交
  14. 23 9月, 2015 1 次提交
  15. 26 8月, 2015 2 次提交
  16. 14 8月, 2015 2 次提交
  17. 27 7月, 2015 1 次提交
  18. 08 6月, 2015 1 次提交
  19. 22 5月, 2015 3 次提交
  20. 08 5月, 2015 1 次提交
  21. 13 4月, 2015 2 次提交
  22. 01 4月, 2015 3 次提交
  23. 26 3月, 2015 1 次提交
  24. 18 3月, 2015 1 次提交
  25. 27 1月, 2015 4 次提交
    • M
      drm/i915: Add atomic_get_property entrypoint for connectors (v2) · 2545e4a6
      Matt Roper 提交于
      Even though we only support atomic plane updates at the moment, we still
      need to add an .atomic_get_property() entrypoint for connectors before
      we allow the driver to flip on the DRIVER_ATOMIC bit.  As soon as that
      bit gets set, the DRM core will start adding atomic connector properties
      (in addition to the plane properties we care about at the moment), so we
      need to be able to handle the new way the DRM core will interact with
      us.
      
      For simplicity, we just lookup driver-specific connector properties in
      the usual shadow array maintained by the core.  Once we get real atomic
      modeset support for crtc's and planes, this code should be re-written to
      pull the data out of crtc/connector state structures.
      
      v2: Fix intel_dvo and intel_dsi that I missed on the first pass (Ander)
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2545e4a6
    • M
      drm/i915: Setup dummy atomic state for connectors (v3) · c6f95f27
      Matt Roper 提交于
      We want to enable/test plane updates via the atomic interface, but as
      soon as we flip DRIVER_ATOMIC on, the DRM core will take some atomic
      codepaths to lookup properties during drmModeGetConnector() and some of
      those codepaths unconditionally dereference connector->state
      (specifically when looking up the CRTC ID property in
      drm_atomic_connector_get_property()).  Create a dummy connector state
      for each connector at init time to ensure the DRM core doesn't try to
      dereference a NULL connector->state.  The actual connector properties
      will never be updated or contain useful information, but since we're
      doing this specifically for testing/debug of the plane operations (and
      only when a specific kernel module option is given), that shouldn't
      really matter.
      
      Once we start creating connector states, the DRM core will want to be
      able to clean them up for us.  We also need to hook up the destruction
      entrypoint to the core's helper.
      
      v2: Squash in the patch to set the state destruction hook (Ander & Bob)
      
      v3: Only create dummy connector states when we're actually faking
          atomic support.  (Ander)
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c6f95f27
    • A
      drm/i915: Make intel_crtc->config a pointer · 6e3c9717
      Ander Conselvan de Oliveira 提交于
      To match the semantics of drm_crtc->state, which this will eventually
      become. The allocation of the memory for config will be fixed in a
      followup patch. By adding the extra _config field to intel_crtc it was
      possible to generate this entire patch with the cocci script below.
      
      @@ @@
      struct intel_crtc {
      ...
      -struct intel_crtc_state config;
      +struct intel_crtc_state _config;
      +struct intel_crtc_state *config;
      ...
      }
      @@ struct intel_crtc *crtc; @@
      -memset(&crtc->config, 0, sizeof(crtc->config));
      +memset(crtc->config, 0, sizeof(*crtc->config));
      @@ @@
      __intel_set_mode(...) {
      <...
      -to_intel_crtc(crtc)->config = *pipe_config;
      +(*(to_intel_crtc(crtc)->config)) = *pipe_config;
      ...>
      }
      @@ @@
      intel_crtc_init(...) {
      ...
      WARN_ON(drm_crtc_index(&intel_crtc->base) != intel_crtc->pipe);
      +intel_crtc->config = &intel_crtc->_config;
      return;
      ...
      }
      @@ struct intel_crtc *crtc; @@
      -&crtc->config
      +crtc->config
      @@ struct intel_crtc *crtc; identifier member; @@
      -crtc->config.member
      +crtc->config->member
      @@ expression E; @@
      -&(to_intel_crtc(E)->config)
      +to_intel_crtc(E)->config
      @@ expression E; identifier member; @@
      -to_intel_crtc(E)->config.member
      +to_intel_crtc(E)->config->member
      
      v2: Clarify manual changes by splitting them into another patch. (Matt)
          Improve cocci script to generate even more of the changes. (Ander)
      Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
      Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      6e3c9717
    • A
      drm/i915: Embedded struct drm_crtc_state in intel_crtc_state · 2d112de7
      Ander Conselvan de Oliveira 提交于
      And get rid of the duplicate mode structures. This patch was generated
      with the following semantic patch:
      
      @@ @@
      struct intel_crtc_state {
      +struct drm_crtc_state base;
      +
      ...
      -struct drm_display_mode requested_mode;
      -struct drm_display_mode adjusted_mode;
      ...
      }
      @@ struct intel_crtc_state *state; @@
      -state->adjusted_mode
      +state->base.adjusted_mode
      @@ struct intel_crtc_state *state; @@
      -state->requested_mode
      +state->base.mode
      @@ struct intel_crtc_state state; @@
      -state.adjusted_mode
      +state.base.adjusted_mode
      @@ struct intel_crtc_state state; @@
      -state.requested_mode
      +state.base.mode
      @@ struct drm_crtc *crtc; @@
      -to_intel_crtc(crtc)->config.adjusted_mode
      +to_intel_crtc(crtc)->config.base.adjusted_mode
      @@ identifier member; expression E; @@
      -PIPE_CONF_CHECK_FLAGS(adjusted_mode.member, E);
      +PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.member, E);
      @@ identifier member; @@
      -PIPE_CONF_CHECK_I(adjusted_mode.member);
      +PIPE_CONF_CHECK_I(base.adjusted_mode.member);
      @@ identifier member; @@
      -PIPE_CONF_CHECK_CLOCK_FUZZY(adjusted_mode.member);
      +PIPE_CONF_CHECK_CLOCK_FUZZY(base.adjusted_mode.member);
      
      v2: Completely generate the patch with cocci. (Ander)
      Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
      Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2d112de7